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20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/spinlock.h>
23#include <linux/errno.h>
24#include <linux/device.h>
25#include <linux/slab.h>
26#include <linux/list.h>
27#include <linux/io.h>
28#include <linux/ioport.h>
29#include <linux/pci.h>
30#include <linux/seq_file.h>
31#include <linux/platform_device.h>
32#include <linux/mfd/core.h>
33#include <linux/mfd/sta2x11-mfd.h>
34#include <linux/regmap.h>
35
36#include <asm/sta2x11.h>
37
38static inline int __reg_within_range(unsigned int r,
39 unsigned int start,
40 unsigned int end)
41{
42 return ((r >= start) && (r <= end));
43}
44
45
46struct sta2x11_mfd {
47 struct sta2x11_instance *instance;
48 struct regmap *regmap[sta2x11_n_mfd_plat_devs];
49 spinlock_t lock[sta2x11_n_mfd_plat_devs];
50 struct list_head list;
51 void __iomem *regs[sta2x11_n_mfd_plat_devs];
52};
53
54static LIST_HEAD(sta2x11_mfd_list);
55
56
57static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev)
58{
59 struct sta2x11_instance *instance;
60 struct sta2x11_mfd *mfd;
61
62 if (!pdev && !list_empty(&sta2x11_mfd_list)) {
63 pr_warning("%s: Unspecified device, "
64 "using first instance\n", __func__);
65 return list_entry(sta2x11_mfd_list.next,
66 struct sta2x11_mfd, list);
67 }
68
69 instance = sta2x11_get_instance(pdev);
70 if (!instance)
71 return NULL;
72 list_for_each_entry(mfd, &sta2x11_mfd_list, list) {
73 if (mfd->instance == instance)
74 return mfd;
75 }
76 return NULL;
77}
78
79static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
80{
81 int i;
82 struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
83 struct sta2x11_instance *instance;
84
85 if (mfd)
86 return -EBUSY;
87 instance = sta2x11_get_instance(pdev);
88 if (!instance)
89 return -EINVAL;
90 mfd = kzalloc(sizeof(*mfd), flags);
91 if (!mfd)
92 return -ENOMEM;
93 INIT_LIST_HEAD(&mfd->list);
94 for (i = 0; i < ARRAY_SIZE(mfd->lock); i++)
95 spin_lock_init(&mfd->lock[i]);
96 mfd->instance = instance;
97 list_add(&mfd->list, &sta2x11_mfd_list);
98 return 0;
99}
100
101
102u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val,
103 enum sta2x11_mfd_plat_dev index)
104{
105 struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
106 u32 r;
107 unsigned long flags;
108 void __iomem *regs;
109
110 if (!mfd) {
111 dev_warn(&pdev->dev, ": can't access sctl regs\n");
112 return 0;
113 }
114
115 regs = mfd->regs[index];
116 if (!regs) {
117 dev_warn(&pdev->dev, ": system ctl not initialized\n");
118 return 0;
119 }
120 spin_lock_irqsave(&mfd->lock[index], flags);
121 r = readl(regs + reg);
122 r &= ~mask;
123 r |= val;
124 if (mask)
125 writel(r, regs + reg);
126 spin_unlock_irqrestore(&mfd->lock[index], flags);
127 return r;
128}
129EXPORT_SYMBOL(__sta2x11_mfd_mask);
130
131int sta2x11_mfd_get_regs_data(struct platform_device *dev,
132 enum sta2x11_mfd_plat_dev index,
133 void __iomem **regs,
134 spinlock_t **lock)
135{
136 struct pci_dev *pdev = *(struct pci_dev **)dev_get_platdata(&dev->dev);
137 struct sta2x11_mfd *mfd;
138
139 if (!pdev)
140 return -ENODEV;
141 mfd = sta2x11_mfd_find(pdev);
142 if (!mfd)
143 return -ENODEV;
144 if (index >= sta2x11_n_mfd_plat_devs)
145 return -ENODEV;
146 *regs = mfd->regs[index];
147 *lock = &mfd->lock[index];
148 pr_debug("%s %d *regs = %p\n", __func__, __LINE__, *regs);
149 return *regs ? 0 : -ENODEV;
150}
151EXPORT_SYMBOL(sta2x11_mfd_get_regs_data);
152
153
154
155
156
157static void sta2x11_regmap_lock(void *__lock)
158{
159 spinlock_t *lock = __lock;
160 spin_lock(lock);
161}
162
163static void sta2x11_regmap_unlock(void *__lock)
164{
165 spinlock_t *lock = __lock;
166 spin_unlock(lock);
167}
168
169
170static void sta2x11_regmap_nolock(void *__lock)
171{
172}
173
174static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = {
175 [sta2x11_sctl] = STA2X11_MFD_SCTL_NAME,
176 [sta2x11_apbreg] = STA2X11_MFD_APBREG_NAME,
177 [sta2x11_apb_soc_regs] = STA2X11_MFD_APB_SOC_REGS_NAME,
178 [sta2x11_scr] = STA2X11_MFD_SCR_NAME,
179};
180
181static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg)
182{
183 return !__reg_within_range(reg, SCTL_SCPCIECSBRST, SCTL_SCRSTSTA);
184}
185
186static struct regmap_config sta2x11_sctl_regmap_config = {
187 .reg_bits = 32,
188 .reg_stride = 4,
189 .val_bits = 32,
190 .lock = sta2x11_regmap_lock,
191 .unlock = sta2x11_regmap_unlock,
192 .max_register = SCTL_SCRSTSTA,
193 .writeable_reg = sta2x11_sctl_writeable_reg,
194};
195
196static bool sta2x11_scr_readable_reg(struct device *dev, unsigned int reg)
197{
198 return (reg == STA2X11_SECR_CR) ||
199 __reg_within_range(reg, STA2X11_SECR_FVR0, STA2X11_SECR_FVR1);
200}
201
202static bool sta2x11_scr_writeable_reg(struct device *dev, unsigned int reg)
203{
204 return false;
205}
206
207static struct regmap_config sta2x11_scr_regmap_config = {
208 .reg_bits = 32,
209 .reg_stride = 4,
210 .val_bits = 32,
211 .lock = sta2x11_regmap_nolock,
212 .unlock = sta2x11_regmap_nolock,
213 .max_register = STA2X11_SECR_FVR1,
214 .readable_reg = sta2x11_scr_readable_reg,
215 .writeable_reg = sta2x11_scr_writeable_reg,
216};
217
218static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg)
219{
220
221 if (reg >= APBREG_BSR_SARAC)
222 reg -= APBREG_BSR_SARAC;
223 switch (reg) {
224 case APBREG_BSR:
225 case APBREG_PAER:
226 case APBREG_PWAC:
227 case APBREG_PRAC:
228 case APBREG_PCG:
229 case APBREG_PUR:
230 case APBREG_EMU_PCG:
231 return true;
232 default:
233 return false;
234 }
235}
236
237static bool sta2x11_apbreg_writeable_reg(struct device *dev, unsigned int reg)
238{
239 if (reg >= APBREG_BSR_SARAC)
240 reg -= APBREG_BSR_SARAC;
241 if (!sta2x11_apbreg_readable_reg(dev, reg))
242 return false;
243 return reg != APBREG_PAER;
244}
245
246static struct regmap_config sta2x11_apbreg_regmap_config = {
247 .reg_bits = 32,
248 .reg_stride = 4,
249 .val_bits = 32,
250 .lock = sta2x11_regmap_lock,
251 .unlock = sta2x11_regmap_unlock,
252 .max_register = APBREG_EMU_PCG_SARAC,
253 .readable_reg = sta2x11_apbreg_readable_reg,
254 .writeable_reg = sta2x11_apbreg_writeable_reg,
255};
256
257static bool sta2x11_apb_soc_regs_readable_reg(struct device *dev,
258 unsigned int reg)
259{
260 return reg <= PCIE_SoC_INT_ROUTER_STATUS3_REG ||
261 __reg_within_range(reg, DMA_IP_CTRL_REG, SPARE3_RESERVED) ||
262 __reg_within_range(reg, MASTER_LOCK_REG,
263 SYSTEM_CONFIG_STATUS_REG) ||
264 reg == MSP_CLK_CTRL_REG ||
265 __reg_within_range(reg, COMPENSATION_REG1, TEST_CTL_REG);
266}
267
268static bool sta2x11_apb_soc_regs_writeable_reg(struct device *dev,
269 unsigned int reg)
270{
271 if (!sta2x11_apb_soc_regs_readable_reg(dev, reg))
272 return false;
273 switch (reg) {
274 case PCIE_COMMON_CLOCK_CONFIG_0_4_0:
275 case SYSTEM_CONFIG_STATUS_REG:
276 case COMPENSATION_REG1:
277 case PCIE_SoC_INT_ROUTER_STATUS0_REG...PCIE_SoC_INT_ROUTER_STATUS3_REG:
278 case PCIE_PM_STATUS_0_PORT_0_4...PCIE_PM_STATUS_7_0_EP4:
279 return false;
280 default:
281 return true;
282 }
283}
284
285static struct regmap_config sta2x11_apb_soc_regs_regmap_config = {
286 .reg_bits = 32,
287 .reg_stride = 4,
288 .val_bits = 32,
289 .lock = sta2x11_regmap_lock,
290 .unlock = sta2x11_regmap_unlock,
291 .max_register = TEST_CTL_REG,
292 .readable_reg = sta2x11_apb_soc_regs_readable_reg,
293 .writeable_reg = sta2x11_apb_soc_regs_writeable_reg,
294};
295
296static struct regmap_config *
297sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = {
298 [sta2x11_sctl] = &sta2x11_sctl_regmap_config,
299 [sta2x11_apbreg] = &sta2x11_apbreg_regmap_config,
300 [sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config,
301 [sta2x11_scr] = &sta2x11_scr_regmap_config,
302};
303
304
305
306static int sta2x11_mfd_platform_probe(struct platform_device *dev,
307 enum sta2x11_mfd_plat_dev index)
308{
309 struct pci_dev **pdev;
310 struct sta2x11_mfd *mfd;
311 struct resource *res;
312 const char *name = sta2x11_mfd_names[index];
313 struct regmap_config *regmap_config = sta2x11_mfd_regmap_configs[index];
314
315 pdev = dev_get_platdata(&dev->dev);
316 mfd = sta2x11_mfd_find(*pdev);
317 if (!mfd)
318 return -ENODEV;
319 if (!regmap_config)
320 return -ENODEV;
321
322 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
323 if (!res)
324 return -ENOMEM;
325
326 if (!request_mem_region(res->start, resource_size(res), name))
327 return -EBUSY;
328
329 mfd->regs[index] = ioremap(res->start, resource_size(res));
330 if (!mfd->regs[index]) {
331 release_mem_region(res->start, resource_size(res));
332 return -ENOMEM;
333 }
334 regmap_config->lock_arg = &mfd->lock;
335
336
337
338
339 regmap_config->cache_type = REGCACHE_NONE;
340 mfd->regmap[index] = devm_regmap_init_mmio(&dev->dev, mfd->regs[index],
341 regmap_config);
342 WARN_ON(IS_ERR(mfd->regmap[index]));
343
344 return 0;
345}
346
347static int sta2x11_sctl_probe(struct platform_device *dev)
348{
349 return sta2x11_mfd_platform_probe(dev, sta2x11_sctl);
350}
351
352static int sta2x11_apbreg_probe(struct platform_device *dev)
353{
354 return sta2x11_mfd_platform_probe(dev, sta2x11_apbreg);
355}
356
357static int sta2x11_apb_soc_regs_probe(struct platform_device *dev)
358{
359 return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs);
360}
361
362static int sta2x11_scr_probe(struct platform_device *dev)
363{
364 return sta2x11_mfd_platform_probe(dev, sta2x11_scr);
365}
366
367
368static struct platform_driver sta2x11_sctl_platform_driver = {
369 .driver = {
370 .name = STA2X11_MFD_SCTL_NAME,
371 },
372 .probe = sta2x11_sctl_probe,
373};
374
375static struct platform_driver sta2x11_platform_driver = {
376 .driver = {
377 .name = STA2X11_MFD_APBREG_NAME,
378 },
379 .probe = sta2x11_apbreg_probe,
380};
381
382static struct platform_driver sta2x11_apb_soc_regs_platform_driver = {
383 .driver = {
384 .name = STA2X11_MFD_APB_SOC_REGS_NAME,
385 },
386 .probe = sta2x11_apb_soc_regs_probe,
387};
388
389static struct platform_driver sta2x11_scr_platform_driver = {
390 .driver = {
391 .name = STA2X11_MFD_SCR_NAME,
392 },
393 .probe = sta2x11_scr_probe,
394};
395
396static struct platform_driver * const drivers[] = {
397 &sta2x11_platform_driver,
398 &sta2x11_sctl_platform_driver,
399 &sta2x11_apb_soc_regs_platform_driver,
400 &sta2x11_scr_platform_driver,
401};
402
403static int __init sta2x11_drivers_init(void)
404{
405 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
406}
407
408
409
410
411
412
413
414
415
416enum mfd0_bar0_cells {
417 STA2X11_GPIO_0 = 0,
418 STA2X11_GPIO_1,
419 STA2X11_GPIO_2,
420 STA2X11_GPIO_3,
421 STA2X11_SCTL,
422 STA2X11_SCR,
423 STA2X11_TIME,
424};
425
426enum mfd0_bar1_cells {
427 STA2X11_APBREG = 0,
428};
429#define CELL_4K(_name, _cell) { \
430 .name = _name, \
431 .start = _cell * 4096, .end = _cell * 4096 + 4095, \
432 .flags = IORESOURCE_MEM, \
433 }
434
435static const struct resource gpio_resources[] = {
436 {
437
438 .name = STA2X11_MFD_GPIO_NAME,
439 .start = 0,
440 .end = (4 * 4096) - 1,
441 .flags = IORESOURCE_MEM,
442 }
443};
444static const struct resource sctl_resources[] = {
445 CELL_4K(STA2X11_MFD_SCTL_NAME, STA2X11_SCTL),
446};
447static const struct resource scr_resources[] = {
448 CELL_4K(STA2X11_MFD_SCR_NAME, STA2X11_SCR),
449};
450static const struct resource time_resources[] = {
451 CELL_4K(STA2X11_MFD_TIME_NAME, STA2X11_TIME),
452};
453
454static const struct resource apbreg_resources[] = {
455 CELL_4K(STA2X11_MFD_APBREG_NAME, STA2X11_APBREG),
456};
457
458#define DEV(_name, _r) \
459 { .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }
460
461static struct mfd_cell sta2x11_mfd0_bar0[] = {
462
463 DEV(STA2X11_MFD_GPIO_NAME, gpio_resources),
464 DEV(STA2X11_MFD_SCTL_NAME, sctl_resources),
465 DEV(STA2X11_MFD_SCR_NAME, scr_resources),
466 DEV(STA2X11_MFD_TIME_NAME, time_resources),
467};
468
469static struct mfd_cell sta2x11_mfd0_bar1[] = {
470 DEV(STA2X11_MFD_APBREG_NAME, apbreg_resources),
471};
472
473
474
475
476enum mfd1_bar0_cells {
477 STA2X11_VIC = 0,
478};
479
480
481enum mfd1_bar1_cells {
482 STA2X11_APB_SOC_REGS = 0,
483};
484
485static const struct resource vic_resources[] = {
486 CELL_4K(STA2X11_MFD_VIC_NAME, STA2X11_VIC),
487};
488
489static const struct resource apb_soc_regs_resources[] = {
490 CELL_4K(STA2X11_MFD_APB_SOC_REGS_NAME, STA2X11_APB_SOC_REGS),
491};
492
493static struct mfd_cell sta2x11_mfd1_bar0[] = {
494 DEV(STA2X11_MFD_VIC_NAME, vic_resources),
495};
496
497static struct mfd_cell sta2x11_mfd1_bar1[] = {
498 DEV(STA2X11_MFD_APB_SOC_REGS_NAME, apb_soc_regs_resources),
499};
500
501
502static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state)
503{
504 pci_save_state(pdev);
505 pci_disable_device(pdev);
506 pci_set_power_state(pdev, pci_choose_state(pdev, state));
507
508 return 0;
509}
510
511static int sta2x11_mfd_resume(struct pci_dev *pdev)
512{
513 int err;
514
515 pci_set_power_state(pdev, PCI_D0);
516 err = pci_enable_device(pdev);
517 if (err)
518 return err;
519 pci_restore_state(pdev);
520
521 return 0;
522}
523
524struct sta2x11_mfd_bar_setup_data {
525 struct mfd_cell *cells;
526 int ncells;
527};
528
529struct sta2x11_mfd_setup_data {
530 struct sta2x11_mfd_bar_setup_data bars[2];
531};
532
533#define STA2X11_MFD0 0
534#define STA2X11_MFD1 1
535
536static struct sta2x11_mfd_setup_data mfd_setup_data[] = {
537
538 [STA2X11_MFD0] = {
539 .bars = {
540 [0] = {
541 .cells = sta2x11_mfd0_bar0,
542 .ncells = ARRAY_SIZE(sta2x11_mfd0_bar0),
543 },
544 [1] = {
545 .cells = sta2x11_mfd0_bar1,
546 .ncells = ARRAY_SIZE(sta2x11_mfd0_bar1),
547 },
548 },
549 },
550
551 [STA2X11_MFD1] = {
552 .bars = {
553 [0] = {
554 .cells = sta2x11_mfd1_bar0,
555 .ncells = ARRAY_SIZE(sta2x11_mfd1_bar0),
556 },
557 [1] = {
558 .cells = sta2x11_mfd1_bar1,
559 .ncells = ARRAY_SIZE(sta2x11_mfd1_bar1),
560 },
561 },
562 },
563};
564
565static void sta2x11_mfd_setup(struct pci_dev *pdev,
566 struct sta2x11_mfd_setup_data *sd)
567{
568 int i, j;
569 for (i = 0; i < ARRAY_SIZE(sd->bars); i++)
570 for (j = 0; j < sd->bars[i].ncells; j++) {
571 sd->bars[i].cells[j].pdata_size = sizeof(pdev);
572 sd->bars[i].cells[j].platform_data = &pdev;
573 }
574}
575
576static int sta2x11_mfd_probe(struct pci_dev *pdev,
577 const struct pci_device_id *pci_id)
578{
579 int err, i;
580 struct sta2x11_mfd_setup_data *setup_data;
581
582 dev_info(&pdev->dev, "%s\n", __func__);
583
584 err = pci_enable_device(pdev);
585 if (err) {
586 dev_err(&pdev->dev, "Can't enable device.\n");
587 return err;
588 }
589
590 err = pci_enable_msi(pdev);
591 if (err)
592 dev_info(&pdev->dev, "Enable msi failed\n");
593
594 setup_data = pci_id->device == PCI_DEVICE_ID_STMICRO_GPIO ?
595 &mfd_setup_data[STA2X11_MFD0] :
596 &mfd_setup_data[STA2X11_MFD1];
597
598
599 sta2x11_mfd_setup(pdev, setup_data);
600
601
602 if (!sta2x11_mfd_find(pdev))
603 sta2x11_mfd_add(pdev, GFP_ATOMIC);
604
605
606 for (i = 0; i < 2; i++) {
607 err = mfd_add_devices(&pdev->dev, -1,
608 setup_data->bars[i].cells,
609 setup_data->bars[i].ncells,
610 &pdev->resource[i],
611 0, NULL);
612 if (err) {
613 dev_err(&pdev->dev,
614 "mfd_add_devices[%d] failed: %d\n", i, err);
615 goto err_disable;
616 }
617 }
618
619 return 0;
620
621err_disable:
622 mfd_remove_devices(&pdev->dev);
623 pci_disable_device(pdev);
624 pci_disable_msi(pdev);
625 return err;
626}
627
628static const struct pci_device_id sta2x11_mfd_tbl[] = {
629 {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)},
630 {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIC)},
631 {0,},
632};
633
634static struct pci_driver sta2x11_mfd_driver = {
635 .name = "sta2x11-mfd",
636 .id_table = sta2x11_mfd_tbl,
637 .probe = sta2x11_mfd_probe,
638 .suspend = sta2x11_mfd_suspend,
639 .resume = sta2x11_mfd_resume,
640};
641
642static int __init sta2x11_mfd_init(void)
643{
644 pr_info("%s\n", __func__);
645 return pci_register_driver(&sta2x11_mfd_driver);
646}
647
648
649
650
651
652
653
654subsys_initcall(sta2x11_drivers_init);
655rootfs_initcall(sta2x11_mfd_init);
656
657MODULE_LICENSE("GPL v2");
658MODULE_AUTHOR("Wind River");
659MODULE_DESCRIPTION("STA2x11 mfd for GPIO, SCTL and APBREG");
660MODULE_DEVICE_TABLE(pci, sta2x11_mfd_tbl);
661
