linux/drivers/misc/mic/host/mic_x100.c
<<
>>
Prefs
   1/*
   2 * Intel MIC Platform Software Stack (MPSS)
   3 *
   4 * Copyright(c) 2013 Intel Corporation.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License, version 2, as
   8 * published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope that it will be useful, but
  11 * WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13 * General Public License for more details.
  14 *
  15 * The full GNU General Public License is included in this distribution in
  16 * the file called "COPYING".
  17 *
  18 * Intel MIC Host driver.
  19 *
  20 */
  21#include <linux/fs.h>
  22#include <linux/pci.h>
  23#include <linux/sched.h>
  24#include <linux/firmware.h>
  25#include <linux/delay.h>
  26
  27#include "../common/mic_dev.h"
  28#include "mic_device.h"
  29#include "mic_x100.h"
  30#include "mic_smpt.h"
  31
  32/**
  33 * mic_x100_write_spad - write to the scratchpad register
  34 * @mdev: pointer to mic_device instance
  35 * @idx: index to the scratchpad register, 0 based
  36 * @val: the data value to put into the register
  37 *
  38 * This function allows writing of a 32bit value to the indexed scratchpad
  39 * register.
  40 *
  41 * RETURNS: none.
  42 */
  43static void
  44mic_x100_write_spad(struct mic_device *mdev, unsigned int idx, u32 val)
  45{
  46        dev_dbg(&mdev->pdev->dev, "Writing 0x%x to scratch pad index %d\n",
  47                val, idx);
  48        mic_mmio_write(&mdev->mmio, val,
  49                       MIC_X100_SBOX_BASE_ADDRESS +
  50                       MIC_X100_SBOX_SPAD0 + idx * 4);
  51}
  52
  53/**
  54 * mic_x100_read_spad - read from the scratchpad register
  55 * @mdev: pointer to mic_device instance
  56 * @idx: index to scratchpad register, 0 based
  57 *
  58 * This function allows reading of the 32bit scratchpad register.
  59 *
  60 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  61 */
  62static u32
  63mic_x100_read_spad(struct mic_device *mdev, unsigned int idx)
  64{
  65        u32 val = mic_mmio_read(&mdev->mmio,
  66                MIC_X100_SBOX_BASE_ADDRESS +
  67                MIC_X100_SBOX_SPAD0 + idx * 4);
  68
  69        dev_dbg(&mdev->pdev->dev,
  70                "Reading 0x%x from scratch pad index %d\n", val, idx);
  71        return val;
  72}
  73
  74/**
  75 * mic_x100_enable_interrupts - Enable interrupts.
  76 * @mdev: pointer to mic_device instance
  77 */
  78static void mic_x100_enable_interrupts(struct mic_device *mdev)
  79{
  80        u32 reg;
  81        struct mic_mw *mw = &mdev->mmio;
  82        u32 sice0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICE0;
  83        u32 siac0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SIAC0;
  84
  85        reg = mic_mmio_read(mw, sice0);
  86        reg |= MIC_X100_SBOX_DBR_BITS(0xf) | MIC_X100_SBOX_DMA_BITS(0xff);
  87        mic_mmio_write(mw, reg, sice0);
  88
  89        /*
  90         * Enable auto-clear when enabling interrupts. Applicable only for
  91         * MSI-x. Legacy and MSI mode cannot have auto-clear enabled.
  92         */
  93        if (mdev->irq_info.num_vectors > 1) {
  94                reg = mic_mmio_read(mw, siac0);
  95                reg |= MIC_X100_SBOX_DBR_BITS(0xf) |
  96                        MIC_X100_SBOX_DMA_BITS(0xff);
  97                mic_mmio_write(mw, reg, siac0);
  98        }
  99}
 100
 101/**
 102 * mic_x100_disable_interrupts - Disable interrupts.
 103 * @mdev: pointer to mic_device instance
 104 */
 105static void mic_x100_disable_interrupts(struct mic_device *mdev)
 106{
 107        u32 reg;
 108        struct mic_mw *mw = &mdev->mmio;
 109        u32 sice0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICE0;
 110        u32 siac0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SIAC0;
 111        u32 sicc0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICC0;
 112
 113        reg = mic_mmio_read(mw, sice0);
 114        mic_mmio_write(mw, reg, sicc0);
 115
 116        if (mdev->irq_info.num_vectors > 1) {
 117                reg = mic_mmio_read(mw, siac0);
 118                reg &= ~(MIC_X100_SBOX_DBR_BITS(0xf) |
 119                        MIC_X100_SBOX_DMA_BITS(0xff));
 120                mic_mmio_write(mw, reg, siac0);
 121        }
 122}
 123
 124/**
 125 * mic_x100_send_sbox_intr - Send an MIC_X100_SBOX interrupt to MIC.
 126 * @mdev: pointer to mic_device instance
 127 */
 128static void mic_x100_send_sbox_intr(struct mic_device *mdev,
 129                                    int doorbell)
 130{
 131        struct mic_mw *mw = &mdev->mmio;
 132        u64 apic_icr_offset = MIC_X100_SBOX_APICICR0 + doorbell * 8;
 133        u32 apicicr_low = mic_mmio_read(mw, MIC_X100_SBOX_BASE_ADDRESS +
 134                                        apic_icr_offset);
 135
 136        /* for MIC we need to make sure we "hit" the send_icr bit (13) */
 137        apicicr_low = (apicicr_low | (1 << 13));
 138
 139        /* Ensure that the interrupt is ordered w.r.t. previous stores. */
 140        wmb();
 141        mic_mmio_write(mw, apicicr_low,
 142                       MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset);
 143}
 144
 145/**
 146 * mic_x100_send_rdmasr_intr - Send an RDMASR interrupt to MIC.
 147 * @mdev: pointer to mic_device instance
 148 */
 149static void mic_x100_send_rdmasr_intr(struct mic_device *mdev,
 150                                      int doorbell)
 151{
 152        int rdmasr_offset = MIC_X100_SBOX_RDMASR0 + (doorbell << 2);
 153        /* Ensure that the interrupt is ordered w.r.t. previous stores. */
 154        wmb();
 155        mic_mmio_write(&mdev->mmio, 0,
 156                       MIC_X100_SBOX_BASE_ADDRESS + rdmasr_offset);
 157}
 158
 159/**
 160 * __mic_x100_send_intr - Send interrupt to MIC.
 161 * @mdev: pointer to mic_device instance
 162 * @doorbell: doorbell number.
 163 */
 164static void mic_x100_send_intr(struct mic_device *mdev, int doorbell)
 165{
 166        int rdmasr_db;
 167        if (doorbell < MIC_X100_NUM_SBOX_IRQ) {
 168                mic_x100_send_sbox_intr(mdev, doorbell);
 169        } else {
 170                rdmasr_db = doorbell - MIC_X100_NUM_SBOX_IRQ;
 171                mic_x100_send_rdmasr_intr(mdev, rdmasr_db);
 172        }
 173}
 174
 175/**
 176 * mic_x100_ack_interrupt - Read the interrupt sources register and
 177 * clear it. This function will be called in the MSI/INTx case.
 178 * @mdev: Pointer to mic_device instance.
 179 *
 180 * Returns: bitmask of interrupt sources triggered.
 181 */
 182static u32 mic_x100_ack_interrupt(struct mic_device *mdev)
 183{
 184        u32 sicr0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICR0;
 185        u32 reg = mic_mmio_read(&mdev->mmio, sicr0);
 186        mic_mmio_write(&mdev->mmio, reg, sicr0);
 187        return reg;
 188}
 189
 190/**
 191 * mic_x100_intr_workarounds - These hardware specific workarounds are
 192 * to be invoked everytime an interrupt is handled.
 193 * @mdev: Pointer to mic_device instance.
 194 *
 195 * Returns: none
 196 */
 197static void mic_x100_intr_workarounds(struct mic_device *mdev)
 198{
 199        struct mic_mw *mw = &mdev->mmio;
 200
 201        /* Clear pending bit array. */
 202        if (MIC_A0_STEP == mdev->stepping)
 203                mic_mmio_write(mw, 1, MIC_X100_SBOX_BASE_ADDRESS +
 204                        MIC_X100_SBOX_MSIXPBACR);
 205
 206        if (mdev->stepping >= MIC_B0_STEP)
 207                mdev->intr_ops->enable_interrupts(mdev);
 208}
 209
 210/**
 211 * mic_x100_hw_intr_init - Initialize h/w specific interrupt
 212 * information.
 213 * @mdev: pointer to mic_device instance
 214 */
 215static void mic_x100_hw_intr_init(struct mic_device *mdev)
 216{
 217        mdev->intr_info = (struct mic_intr_info *)mic_x100_intr_init;
 218}
 219
 220/**
 221 * mic_x100_read_msi_to_src_map - read from the MSI mapping registers
 222 * @mdev: pointer to mic_device instance
 223 * @idx: index to the mapping register, 0 based
 224 *
 225 * This function allows reading of the 32bit MSI mapping register.
 226 *
 227 * RETURNS: The value in the register.
 228 */
 229static u32
 230mic_x100_read_msi_to_src_map(struct mic_device *mdev, int idx)
 231{
 232        return mic_mmio_read(&mdev->mmio,
 233                MIC_X100_SBOX_BASE_ADDRESS +
 234                MIC_X100_SBOX_MXAR0 + idx * 4);
 235}
 236
 237/**
 238 * mic_x100_program_msi_to_src_map - program the MSI mapping registers
 239 * @mdev: pointer to mic_device instance
 240 * @idx: index to the mapping register, 0 based
 241 * @offset: The bit offset in the register that needs to be updated.
 242 * @set: boolean specifying if the bit in the specified offset needs
 243 * to be set or cleared.
 244 *
 245 * RETURNS: None.
 246 */
 247static void
 248mic_x100_program_msi_to_src_map(struct mic_device *mdev,
 249                                int idx, int offset, bool set)
 250{
 251        unsigned long reg;
 252        struct mic_mw *mw = &mdev->mmio;
 253        u32 mxar = MIC_X100_SBOX_BASE_ADDRESS +
 254                MIC_X100_SBOX_MXAR0 + idx * 4;
 255
 256        reg = mic_mmio_read(mw, mxar);
 257        if (set)
 258                __set_bit(offset, &reg);
 259        else
 260                __clear_bit(offset, &reg);
 261        mic_mmio_write(mw, reg, mxar);
 262}
 263
 264/*
 265 * mic_x100_reset_fw_ready - Reset Firmware ready status field.
 266 * @mdev: pointer to mic_device instance
 267 */
 268static void mic_x100_reset_fw_ready(struct mic_device *mdev)
 269{
 270        mdev->ops->write_spad(mdev, MIC_X100_DOWNLOAD_INFO, 0);
 271}
 272
 273/*
 274 * mic_x100_is_fw_ready - Check if firmware is ready.
 275 * @mdev: pointer to mic_device instance
 276 */
 277static bool mic_x100_is_fw_ready(struct mic_device *mdev)
 278{
 279        u32 scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO);
 280        return MIC_X100_SPAD2_DOWNLOAD_STATUS(scratch2) ? true : false;
 281}
 282
 283/**
 284 * mic_x100_get_apic_id - Get bootstrap APIC ID.
 285 * @mdev: pointer to mic_device instance
 286 */
 287static u32 mic_x100_get_apic_id(struct mic_device *mdev)
 288{
 289        u32 scratch2 = 0;
 290
 291        scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO);
 292        return MIC_X100_SPAD2_APIC_ID(scratch2);
 293}
 294
 295/**
 296 * mic_x100_send_firmware_intr - Send an interrupt to the firmware on MIC.
 297 * @mdev: pointer to mic_device instance
 298 */
 299static void mic_x100_send_firmware_intr(struct mic_device *mdev)
 300{
 301        u32 apicicr_low;
 302        u64 apic_icr_offset = MIC_X100_SBOX_APICICR7;
 303        int vector = MIC_X100_BSP_INTERRUPT_VECTOR;
 304        struct mic_mw *mw = &mdev->mmio;
 305
 306        /*
 307         * For MIC we need to make sure we "hit"
 308         * the send_icr bit (13).
 309         */
 310        apicicr_low = (vector | (1 << 13));
 311
 312        mic_mmio_write(mw, mic_x100_get_apic_id(mdev),
 313                       MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset + 4);
 314
 315        /* Ensure that the interrupt is ordered w.r.t. previous stores. */
 316        wmb();
 317        mic_mmio_write(mw, apicicr_low,
 318                       MIC_X100_SBOX_BASE_ADDRESS + apic_icr_offset);
 319}
 320
 321/**
 322 * mic_x100_hw_reset - Reset the MIC device.
 323 * @mdev: pointer to mic_device instance
 324 */
 325static void mic_x100_hw_reset(struct mic_device *mdev)
 326{
 327        u32 reset_reg;
 328        u32 rgcr = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_RGCR;
 329        struct mic_mw *mw = &mdev->mmio;
 330
 331        /* Ensure that the reset is ordered w.r.t. previous loads and stores */
 332        mb();
 333        /* Trigger reset */
 334        reset_reg = mic_mmio_read(mw, rgcr);
 335        reset_reg |= 0x1;
 336        mic_mmio_write(mw, reset_reg, rgcr);
 337        /*
 338         * It seems we really want to delay at least 1 second
 339         * after touching reset to prevent a lot of problems.
 340         */
 341        msleep(1000);
 342}
 343
 344/**
 345 * mic_x100_load_command_line - Load command line to MIC.
 346 * @mdev: pointer to mic_device instance
 347 * @fw: the firmware image
 348 *
 349 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
 350 */
 351static int
 352mic_x100_load_command_line(struct mic_device *mdev, const struct firmware *fw)
 353{
 354        u32 len = 0;
 355        u32 boot_mem;
 356        char *buf;
 357        void __iomem *cmd_line_va = mdev->aper.va + mdev->bootaddr + fw->size;
 358#define CMDLINE_SIZE 2048
 359
 360        boot_mem = mdev->aper.len >> 20;
 361        buf = kzalloc(CMDLINE_SIZE, GFP_KERNEL);
 362        if (!buf)
 363                return -ENOMEM;
 364
 365        len += snprintf(buf, CMDLINE_SIZE - len,
 366                " mem=%dM", boot_mem);
 367        if (mdev->cosm_dev->cmdline)
 368                snprintf(buf + len, CMDLINE_SIZE - len, " %s",
 369                         mdev->cosm_dev->cmdline);
 370        memcpy_toio(cmd_line_va, buf, strlen(buf) + 1);
 371        kfree(buf);
 372        return 0;
 373}
 374
 375/**
 376 * mic_x100_load_ramdisk - Load ramdisk to MIC.
 377 * @mdev: pointer to mic_device instance
 378 *
 379 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
 380 */
 381static int
 382mic_x100_load_ramdisk(struct mic_device *mdev)
 383{
 384        const struct firmware *fw;
 385        int rc;
 386        struct boot_params __iomem *bp = mdev->aper.va + mdev->bootaddr;
 387
 388        rc = request_firmware(&fw, mdev->cosm_dev->ramdisk, &mdev->pdev->dev);
 389        if (rc < 0) {
 390                dev_err(&mdev->pdev->dev,
 391                        "ramdisk request_firmware failed: %d %s\n",
 392                        rc, mdev->cosm_dev->ramdisk);
 393                goto error;
 394        }
 395        /*
 396         * Typically the bootaddr for card OS is 64M
 397         * so copy over the ramdisk @ 128M.
 398         */
 399        memcpy_toio(mdev->aper.va + (mdev->bootaddr << 1), fw->data, fw->size);
 400        iowrite32(mdev->bootaddr << 1, &bp->hdr.ramdisk_image);
 401        iowrite32(fw->size, &bp->hdr.ramdisk_size);
 402        release_firmware(fw);
 403error:
 404        return rc;
 405}
 406
 407/**
 408 * mic_x100_get_boot_addr - Get MIC boot address.
 409 * @mdev: pointer to mic_device instance
 410 *
 411 * This function is called during firmware load to determine
 412 * the address at which the OS should be downloaded in card
 413 * memory i.e. GDDR.
 414 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
 415 */
 416static int
 417mic_x100_get_boot_addr(struct mic_device *mdev)
 418{
 419        u32 scratch2, boot_addr;
 420        int rc = 0;
 421
 422        scratch2 = mdev->ops->read_spad(mdev, MIC_X100_DOWNLOAD_INFO);
 423        boot_addr = MIC_X100_SPAD2_DOWNLOAD_ADDR(scratch2);
 424        dev_dbg(&mdev->pdev->dev, "%s %d boot_addr 0x%x\n",
 425                __func__, __LINE__, boot_addr);
 426        if (boot_addr > (1 << 31)) {
 427                dev_err(&mdev->pdev->dev,
 428                        "incorrect bootaddr 0x%x\n",
 429                        boot_addr);
 430                rc = -EINVAL;
 431                goto error;
 432        }
 433        mdev->bootaddr = boot_addr;
 434error:
 435        return rc;
 436}
 437
 438/**
 439 * mic_x100_load_firmware - Load firmware to MIC.
 440 * @mdev: pointer to mic_device instance
 441 * @buf: buffer containing boot string including firmware/ramdisk path.
 442 *
 443 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
 444 */
 445static int
 446mic_x100_load_firmware(struct mic_device *mdev, const char *buf)
 447{
 448        int rc;
 449        const struct firmware *fw;
 450
 451        rc = mic_x100_get_boot_addr(mdev);
 452        if (rc)
 453                return rc;
 454        /* load OS */
 455        rc = request_firmware(&fw, mdev->cosm_dev->firmware, &mdev->pdev->dev);
 456        if (rc < 0) {
 457                dev_err(&mdev->pdev->dev,
 458                        "ramdisk request_firmware failed: %d %s\n",
 459                        rc, mdev->cosm_dev->firmware);
 460                return rc;
 461        }
 462        if (mdev->bootaddr > mdev->aper.len - fw->size) {
 463                rc = -EINVAL;
 464                dev_err(&mdev->pdev->dev, "%s %d rc %d bootaddr 0x%x\n",
 465                        __func__, __LINE__, rc, mdev->bootaddr);
 466                goto error;
 467        }
 468        memcpy_toio(mdev->aper.va + mdev->bootaddr, fw->data, fw->size);
 469        mdev->ops->write_spad(mdev, MIC_X100_FW_SIZE, fw->size);
 470        if (!strcmp(mdev->cosm_dev->bootmode, "flash")) {
 471                rc = -EINVAL;
 472                dev_err(&mdev->pdev->dev, "%s %d rc %d\n",
 473                        __func__, __LINE__, rc);
 474                goto error;
 475        }
 476        /* load command line */
 477        rc = mic_x100_load_command_line(mdev, fw);
 478        if (rc) {
 479                dev_err(&mdev->pdev->dev, "%s %d rc %d\n",
 480                        __func__, __LINE__, rc);
 481                goto error;
 482        }
 483        release_firmware(fw);
 484        /* load ramdisk */
 485        if (mdev->cosm_dev->ramdisk)
 486                rc = mic_x100_load_ramdisk(mdev);
 487
 488        return rc;
 489
 490error:
 491        release_firmware(fw);
 492        return rc;
 493}
 494
 495/**
 496 * mic_x100_get_postcode - Get postcode status from firmware.
 497 * @mdev: pointer to mic_device instance
 498 *
 499 * RETURNS: postcode.
 500 */
 501static u32 mic_x100_get_postcode(struct mic_device *mdev)
 502{
 503        return mic_mmio_read(&mdev->mmio, MIC_X100_POSTCODE);
 504}
 505
 506/**
 507 * mic_x100_smpt_set - Update an SMPT entry with a DMA address.
 508 * @mdev: pointer to mic_device instance
 509 *
 510 * RETURNS: none.
 511 */
 512static void
 513mic_x100_smpt_set(struct mic_device *mdev, dma_addr_t dma_addr, u8 index)
 514{
 515#define SNOOP_ON        (0 << 0)
 516#define SNOOP_OFF       (1 << 0)
 517/*
 518 * Sbox Smpt Reg Bits:
 519 * Bits 31:2    Host address
 520 * Bits 1       RSVD
 521 * Bits 0       No snoop
 522 */
 523#define BUILD_SMPT(NO_SNOOP, HOST_ADDR)  \
 524        (u32)(((HOST_ADDR) << 2) | ((NO_SNOOP) & 0x01))
 525
 526        uint32_t smpt_reg_val = BUILD_SMPT(SNOOP_ON,
 527                        dma_addr >> mdev->smpt->info.page_shift);
 528        mic_mmio_write(&mdev->mmio, smpt_reg_val,
 529                       MIC_X100_SBOX_BASE_ADDRESS +
 530                       MIC_X100_SBOX_SMPT00 + (4 * index));
 531}
 532
 533/**
 534 * mic_x100_smpt_hw_init - Initialize SMPT X100 specific fields.
 535 * @mdev: pointer to mic_device instance
 536 *
 537 * RETURNS: none.
 538 */
 539static void mic_x100_smpt_hw_init(struct mic_device *mdev)
 540{
 541        struct mic_smpt_hw_info *info = &mdev->smpt->info;
 542
 543        info->num_reg = 32;
 544        info->page_shift = 34;
 545        info->page_size = (1ULL << info->page_shift);
 546        info->base = 0x8000000000ULL;
 547}
 548
 549struct mic_smpt_ops mic_x100_smpt_ops = {
 550        .init = mic_x100_smpt_hw_init,
 551        .set = mic_x100_smpt_set,
 552};
 553
 554static bool mic_x100_dma_filter(struct dma_chan *chan, void *param)
 555{
 556        if (chan->device->dev->parent == (struct device *)param)
 557                return true;
 558        return false;
 559}
 560
 561struct mic_hw_ops mic_x100_ops = {
 562        .aper_bar = MIC_X100_APER_BAR,
 563        .mmio_bar = MIC_X100_MMIO_BAR,
 564        .read_spad = mic_x100_read_spad,
 565        .write_spad = mic_x100_write_spad,
 566        .send_intr = mic_x100_send_intr,
 567        .ack_interrupt = mic_x100_ack_interrupt,
 568        .intr_workarounds = mic_x100_intr_workarounds,
 569        .reset = mic_x100_hw_reset,
 570        .reset_fw_ready = mic_x100_reset_fw_ready,
 571        .is_fw_ready = mic_x100_is_fw_ready,
 572        .send_firmware_intr = mic_x100_send_firmware_intr,
 573        .load_mic_fw = mic_x100_load_firmware,
 574        .get_postcode = mic_x100_get_postcode,
 575        .dma_filter = mic_x100_dma_filter,
 576};
 577
 578struct mic_hw_intr_ops mic_x100_intr_ops = {
 579        .intr_init = mic_x100_hw_intr_init,
 580        .enable_interrupts = mic_x100_enable_interrupts,
 581        .disable_interrupts = mic_x100_disable_interrupts,
 582        .program_msi_to_src_map = mic_x100_program_msi_to_src_map,
 583        .read_msi_to_src_map = mic_x100_read_msi_to_src_map,
 584};
 585