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117#ifndef __XGBE_H__
118#define __XGBE_H__
119
120#include <linux/dma-mapping.h>
121#include <linux/netdevice.h>
122#include <linux/workqueue.h>
123#include <linux/phy.h>
124#include <linux/if_vlan.h>
125#include <linux/bitops.h>
126#include <linux/ptp_clock_kernel.h>
127#include <linux/timecounter.h>
128#include <linux/net_tstamp.h>
129#include <net/dcbnl.h>
130
131#define XGBE_DRV_NAME "amd-xgbe"
132#define XGBE_DRV_VERSION "1.0.2"
133#define XGBE_DRV_DESC "AMD 10 Gigabit Ethernet Driver"
134
135
136#define XGBE_TX_DESC_CNT 512
137#define XGBE_TX_DESC_MIN_FREE (XGBE_TX_DESC_CNT >> 3)
138#define XGBE_TX_DESC_MAX_PROC (XGBE_TX_DESC_CNT >> 1)
139#define XGBE_RX_DESC_CNT 512
140
141#define XGBE_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
142
143
144#define XGBE_TX_MAX_SPLIT ((GSO_MAX_SIZE / XGBE_TX_MAX_BUF_SIZE) + 1)
145
146
147
148
149
150
151
152#define XGBE_TX_MAX_DESCS (MAX_SKB_FRAGS + XGBE_TX_MAX_SPLIT + 2)
153
154#define XGBE_RX_MIN_BUF_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
155#define XGBE_RX_BUF_ALIGN 64
156#define XGBE_SKB_ALLOC_SIZE 256
157#define XGBE_SPH_HDSMS_SIZE 2
158
159#define XGBE_MAX_DMA_CHANNELS 16
160#define XGBE_MAX_QUEUES 16
161#define XGBE_DMA_STOP_TIMEOUT 5
162
163
164#define XGBE_DMA_OS_AXDOMAIN 0x2
165#define XGBE_DMA_OS_ARCACHE 0xb
166#define XGBE_DMA_OS_AWCACHE 0xf
167
168
169#define XGBE_DMA_SYS_AXDOMAIN 0x3
170#define XGBE_DMA_SYS_ARCACHE 0x0
171#define XGBE_DMA_SYS_AWCACHE 0x0
172
173#define XGBE_DMA_INTERRUPT_MASK 0x31c7
174
175#define XGMAC_MIN_PACKET 60
176#define XGMAC_STD_PACKET_MTU 1500
177#define XGMAC_MAX_STD_PACKET 1518
178#define XGMAC_JUMBO_PACKET_MTU 9000
179#define XGMAC_MAX_JUMBO_PACKET 9018
180
181
182#define XGBE_MAC_ADDR_PROPERTY "mac-address"
183#define XGBE_PHY_MODE_PROPERTY "phy-mode"
184#define XGBE_DMA_IRQS_PROPERTY "amd,per-channel-interrupt"
185#define XGBE_SPEEDSET_PROPERTY "amd,speed-set"
186#define XGBE_BLWC_PROPERTY "amd,serdes-blwc"
187#define XGBE_CDR_RATE_PROPERTY "amd,serdes-cdr-rate"
188#define XGBE_PQ_SKEW_PROPERTY "amd,serdes-pq-skew"
189#define XGBE_TX_AMP_PROPERTY "amd,serdes-tx-amp"
190#define XGBE_DFE_CFG_PROPERTY "amd,serdes-dfe-tap-config"
191#define XGBE_DFE_ENA_PROPERTY "amd,serdes-dfe-tap-enable"
192
193
194#define XGBE_DMA_CLOCK "dma_clk"
195#define XGBE_PTP_CLOCK "ptp_clk"
196
197
198#define XGBE_ACPI_DMA_FREQ "amd,dma-freq"
199#define XGBE_ACPI_PTP_FREQ "amd,ptp-freq"
200
201
202
203
204#define XGBE_TSTAMP_SSINC 20
205#define XGBE_TSTAMP_SNSINC 0
206
207
208#define XGMAC_DRIVER_CONTEXT 1
209#define XGMAC_IOCTL_CONTEXT 2
210
211#define XGBE_FIFO_MAX 81920
212
213#define XGBE_TC_MIN_QUANTUM 10
214
215
216
217
218
219
220
221#define XGBE_GET_DESC_DATA(_ring, _idx) \
222 ((_ring)->rdata + \
223 ((_idx) & ((_ring)->rdesc_count - 1)))
224
225
226#define XGMAC_INIT_DMA_TX_USECS 1000
227#define XGMAC_INIT_DMA_TX_FRAMES 25
228
229#define XGMAC_MAX_DMA_RIWT 0xff
230#define XGMAC_INIT_DMA_RX_USECS 30
231#define XGMAC_INIT_DMA_RX_FRAMES 25
232
233
234#define XGMAC_MAX_FLOW_CONTROL_QUEUES 8
235
236
237#define XGBE_MAC_HASH_TABLE_SIZE 8
238
239
240#define XGBE_RSS_HASH_KEY_SIZE 40
241#define XGBE_RSS_MAX_TABLE_SIZE 256
242#define XGBE_RSS_LOOKUP_TABLE_TYPE 0
243#define XGBE_RSS_HASH_KEY_TYPE 1
244
245
246#define XGBE_AN_MS_TIMEOUT 500
247#define XGBE_LINK_TIMEOUT 10
248
249#define XGBE_AN_INT_CMPLT 0x01
250#define XGBE_AN_INC_LINK 0x02
251#define XGBE_AN_PG_RCV 0x04
252#define XGBE_AN_INT_MASK 0x07
253
254
255#define XGBE_RATECHANGE_COUNT 500
256
257
258#define XGBE_SPEED_10000_BLWC 0
259#define XGBE_SPEED_10000_CDR 0x7
260#define XGBE_SPEED_10000_PLL 0x1
261#define XGBE_SPEED_10000_PQ 0x12
262#define XGBE_SPEED_10000_RATE 0x0
263#define XGBE_SPEED_10000_TXAMP 0xa
264#define XGBE_SPEED_10000_WORD 0x7
265#define XGBE_SPEED_10000_DFE_TAP_CONFIG 0x1
266#define XGBE_SPEED_10000_DFE_TAP_ENABLE 0x7f
267
268#define XGBE_SPEED_2500_BLWC 1
269#define XGBE_SPEED_2500_CDR 0x2
270#define XGBE_SPEED_2500_PLL 0x0
271#define XGBE_SPEED_2500_PQ 0xa
272#define XGBE_SPEED_2500_RATE 0x1
273#define XGBE_SPEED_2500_TXAMP 0xf
274#define XGBE_SPEED_2500_WORD 0x1
275#define XGBE_SPEED_2500_DFE_TAP_CONFIG 0x3
276#define XGBE_SPEED_2500_DFE_TAP_ENABLE 0x0
277
278#define XGBE_SPEED_1000_BLWC 1
279#define XGBE_SPEED_1000_CDR 0x2
280#define XGBE_SPEED_1000_PLL 0x0
281#define XGBE_SPEED_1000_PQ 0xa
282#define XGBE_SPEED_1000_RATE 0x3
283#define XGBE_SPEED_1000_TXAMP 0xf
284#define XGBE_SPEED_1000_WORD 0x1
285#define XGBE_SPEED_1000_DFE_TAP_CONFIG 0x3
286#define XGBE_SPEED_1000_DFE_TAP_ENABLE 0x0
287
288struct xgbe_prv_data;
289
290struct xgbe_packet_data {
291 struct sk_buff *skb;
292
293 unsigned int attributes;
294
295 unsigned int errors;
296
297 unsigned int rdesc_count;
298 unsigned int length;
299
300 unsigned int header_len;
301 unsigned int tcp_header_len;
302 unsigned int tcp_payload_len;
303 unsigned short mss;
304
305 unsigned short vlan_ctag;
306
307 u64 rx_tstamp;
308
309 u32 rss_hash;
310 enum pkt_hash_types rss_hash_type;
311
312 unsigned int tx_packets;
313 unsigned int tx_bytes;
314};
315
316
317struct xgbe_ring_desc {
318 __le32 desc0;
319 __le32 desc1;
320 __le32 desc2;
321 __le32 desc3;
322};
323
324
325struct xgbe_page_alloc {
326 struct page *pages;
327 unsigned int pages_len;
328 unsigned int pages_offset;
329
330 dma_addr_t pages_dma;
331};
332
333
334struct xgbe_buffer_data {
335 struct xgbe_page_alloc pa;
336 struct xgbe_page_alloc pa_unmap;
337
338 dma_addr_t dma_base;
339 unsigned long dma_off;
340 unsigned int dma_len;
341};
342
343
344struct xgbe_tx_ring_data {
345 unsigned int packets;
346 unsigned int bytes;
347};
348
349
350struct xgbe_rx_ring_data {
351 struct xgbe_buffer_data hdr;
352 struct xgbe_buffer_data buf;
353
354 unsigned short hdr_len;
355 unsigned short len;
356};
357
358
359
360
361
362struct xgbe_ring_data {
363 struct xgbe_ring_desc *rdesc;
364 dma_addr_t rdesc_dma;
365
366 struct sk_buff *skb;
367 dma_addr_t skb_dma;
368 unsigned int skb_dma_len;
369
370 struct xgbe_tx_ring_data tx;
371 struct xgbe_rx_ring_data rx;
372
373 unsigned int mapped_as_page;
374
375
376
377
378
379
380 unsigned int state_saved;
381 struct {
382 struct sk_buff *skb;
383 unsigned int len;
384 unsigned int error;
385 } state;
386};
387
388struct xgbe_ring {
389
390 spinlock_t lock;
391
392
393 struct xgbe_packet_data packet_data;
394
395
396 struct xgbe_ring_desc *rdesc;
397 dma_addr_t rdesc_dma;
398 unsigned int rdesc_count;
399
400
401
402
403 struct xgbe_ring_data *rdata;
404
405
406 struct xgbe_page_alloc rx_hdr_pa;
407 struct xgbe_page_alloc rx_buf_pa;
408
409
410
411
412
413
414
415 unsigned int cur;
416 unsigned int dirty;
417
418
419 unsigned int coalesce_count;
420
421 union {
422 struct {
423 unsigned int queue_stopped;
424 unsigned int xmit_more;
425 unsigned short cur_mss;
426 unsigned short cur_vlan_ctag;
427 } tx;
428 };
429} ____cacheline_aligned;
430
431
432
433
434struct xgbe_channel {
435 char name[16];
436
437
438 struct xgbe_prv_data *pdata;
439
440
441 unsigned int queue_index;
442 void __iomem *dma_regs;
443
444
445 int dma_irq;
446 char dma_irq_name[IFNAMSIZ + 32];
447
448
449 struct napi_struct napi;
450
451 unsigned int saved_ier;
452
453 unsigned int tx_timer_active;
454 struct timer_list tx_timer;
455
456 struct xgbe_ring *tx_ring;
457 struct xgbe_ring *rx_ring;
458} ____cacheline_aligned;
459
460enum xgbe_state {
461 XGBE_DOWN,
462 XGBE_LINK_INIT,
463 XGBE_LINK_ERR,
464};
465
466enum xgbe_int {
467 XGMAC_INT_DMA_CH_SR_TI,
468 XGMAC_INT_DMA_CH_SR_TPS,
469 XGMAC_INT_DMA_CH_SR_TBU,
470 XGMAC_INT_DMA_CH_SR_RI,
471 XGMAC_INT_DMA_CH_SR_RBU,
472 XGMAC_INT_DMA_CH_SR_RPS,
473 XGMAC_INT_DMA_CH_SR_TI_RI,
474 XGMAC_INT_DMA_CH_SR_FBE,
475 XGMAC_INT_DMA_ALL,
476};
477
478enum xgbe_int_state {
479 XGMAC_INT_STATE_SAVE,
480 XGMAC_INT_STATE_RESTORE,
481};
482
483enum xgbe_speed {
484 XGBE_SPEED_1000 = 0,
485 XGBE_SPEED_2500,
486 XGBE_SPEED_10000,
487 XGBE_SPEEDS,
488};
489
490enum xgbe_an {
491 XGBE_AN_READY = 0,
492 XGBE_AN_PAGE_RECEIVED,
493 XGBE_AN_INCOMPAT_LINK,
494 XGBE_AN_COMPLETE,
495 XGBE_AN_NO_LINK,
496 XGBE_AN_ERROR,
497};
498
499enum xgbe_rx {
500 XGBE_RX_BPA = 0,
501 XGBE_RX_XNP,
502 XGBE_RX_COMPLETE,
503 XGBE_RX_ERROR,
504};
505
506enum xgbe_mode {
507 XGBE_MODE_KR = 0,
508 XGBE_MODE_KX,
509};
510
511enum xgbe_speedset {
512 XGBE_SPEEDSET_1000_10000 = 0,
513 XGBE_SPEEDSET_2500_10000,
514};
515
516struct xgbe_phy {
517 u32 supported;
518 u32 advertising;
519 u32 lp_advertising;
520
521 int address;
522
523 int autoneg;
524 int speed;
525 int duplex;
526
527 int link;
528
529 int pause_autoneg;
530 int tx_pause;
531 int rx_pause;
532};
533
534struct xgbe_mmc_stats {
535
536 u64 txoctetcount_gb;
537 u64 txframecount_gb;
538 u64 txbroadcastframes_g;
539 u64 txmulticastframes_g;
540 u64 tx64octets_gb;
541 u64 tx65to127octets_gb;
542 u64 tx128to255octets_gb;
543 u64 tx256to511octets_gb;
544 u64 tx512to1023octets_gb;
545 u64 tx1024tomaxoctets_gb;
546 u64 txunicastframes_gb;
547 u64 txmulticastframes_gb;
548 u64 txbroadcastframes_gb;
549 u64 txunderflowerror;
550 u64 txoctetcount_g;
551 u64 txframecount_g;
552 u64 txpauseframes;
553 u64 txvlanframes_g;
554
555
556 u64 rxframecount_gb;
557 u64 rxoctetcount_gb;
558 u64 rxoctetcount_g;
559 u64 rxbroadcastframes_g;
560 u64 rxmulticastframes_g;
561 u64 rxcrcerror;
562 u64 rxrunterror;
563 u64 rxjabbererror;
564 u64 rxundersize_g;
565 u64 rxoversize_g;
566 u64 rx64octets_gb;
567 u64 rx65to127octets_gb;
568 u64 rx128to255octets_gb;
569 u64 rx256to511octets_gb;
570 u64 rx512to1023octets_gb;
571 u64 rx1024tomaxoctets_gb;
572 u64 rxunicastframes_g;
573 u64 rxlengtherror;
574 u64 rxoutofrangetype;
575 u64 rxpauseframes;
576 u64 rxfifooverflow;
577 u64 rxvlanframes_gb;
578 u64 rxwatchdogerror;
579};
580
581struct xgbe_ext_stats {
582 u64 tx_tso_packets;
583 u64 rx_split_header_packets;
584 u64 rx_buffer_unavailable;
585};
586
587struct xgbe_hw_if {
588 int (*tx_complete)(struct xgbe_ring_desc *);
589
590 int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
591 int (*config_rx_mode)(struct xgbe_prv_data *);
592
593 int (*enable_rx_csum)(struct xgbe_prv_data *);
594 int (*disable_rx_csum)(struct xgbe_prv_data *);
595
596 int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *);
597 int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *);
598 int (*enable_rx_vlan_filtering)(struct xgbe_prv_data *);
599 int (*disable_rx_vlan_filtering)(struct xgbe_prv_data *);
600 int (*update_vlan_hash_table)(struct xgbe_prv_data *);
601
602 int (*read_mmd_regs)(struct xgbe_prv_data *, int, int);
603 void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int);
604 int (*set_gmii_speed)(struct xgbe_prv_data *);
605 int (*set_gmii_2500_speed)(struct xgbe_prv_data *);
606 int (*set_xgmii_speed)(struct xgbe_prv_data *);
607
608 void (*enable_tx)(struct xgbe_prv_data *);
609 void (*disable_tx)(struct xgbe_prv_data *);
610 void (*enable_rx)(struct xgbe_prv_data *);
611 void (*disable_rx)(struct xgbe_prv_data *);
612
613 void (*powerup_tx)(struct xgbe_prv_data *);
614 void (*powerdown_tx)(struct xgbe_prv_data *);
615 void (*powerup_rx)(struct xgbe_prv_data *);
616 void (*powerdown_rx)(struct xgbe_prv_data *);
617
618 int (*init)(struct xgbe_prv_data *);
619 int (*exit)(struct xgbe_prv_data *);
620
621 int (*enable_int)(struct xgbe_channel *, enum xgbe_int);
622 int (*disable_int)(struct xgbe_channel *, enum xgbe_int);
623 void (*dev_xmit)(struct xgbe_channel *);
624 int (*dev_read)(struct xgbe_channel *);
625 void (*tx_desc_init)(struct xgbe_channel *);
626 void (*rx_desc_init)(struct xgbe_channel *);
627 void (*tx_desc_reset)(struct xgbe_ring_data *);
628 void (*rx_desc_reset)(struct xgbe_prv_data *, struct xgbe_ring_data *,
629 unsigned int);
630 int (*is_last_desc)(struct xgbe_ring_desc *);
631 int (*is_context_desc)(struct xgbe_ring_desc *);
632 void (*tx_start_xmit)(struct xgbe_channel *, struct xgbe_ring *);
633
634
635 int (*config_tx_flow_control)(struct xgbe_prv_data *);
636 int (*config_rx_flow_control)(struct xgbe_prv_data *);
637
638
639 int (*config_rx_coalesce)(struct xgbe_prv_data *);
640 int (*config_tx_coalesce)(struct xgbe_prv_data *);
641 unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int);
642 unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int);
643
644
645 int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int);
646 int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int);
647
648
649 int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int);
650 int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int);
651
652
653 int (*config_osp_mode)(struct xgbe_prv_data *);
654
655
656 int (*config_rx_pbl_val)(struct xgbe_prv_data *);
657 int (*get_rx_pbl_val)(struct xgbe_prv_data *);
658 int (*config_tx_pbl_val)(struct xgbe_prv_data *);
659 int (*get_tx_pbl_val)(struct xgbe_prv_data *);
660 int (*config_pblx8)(struct xgbe_prv_data *);
661
662
663 void (*rx_mmc_int)(struct xgbe_prv_data *);
664 void (*tx_mmc_int)(struct xgbe_prv_data *);
665 void (*read_mmc_stats)(struct xgbe_prv_data *);
666
667
668 int (*config_tstamp)(struct xgbe_prv_data *, unsigned int);
669 void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int);
670 void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec,
671 unsigned int nsec);
672 u64 (*get_tstamp_time)(struct xgbe_prv_data *);
673 u64 (*get_tx_tstamp)(struct xgbe_prv_data *);
674
675
676 void (*config_tc)(struct xgbe_prv_data *);
677 void (*config_dcb_tc)(struct xgbe_prv_data *);
678 void (*config_dcb_pfc)(struct xgbe_prv_data *);
679
680
681 int (*enable_rss)(struct xgbe_prv_data *);
682 int (*disable_rss)(struct xgbe_prv_data *);
683 int (*set_rss_hash_key)(struct xgbe_prv_data *, const u8 *);
684 int (*set_rss_lookup_table)(struct xgbe_prv_data *, const u32 *);
685};
686
687struct xgbe_phy_if {
688
689 void (*phy_init)(struct xgbe_prv_data *);
690
691
692 int (*phy_reset)(struct xgbe_prv_data *);
693 int (*phy_start)(struct xgbe_prv_data *);
694 void (*phy_stop)(struct xgbe_prv_data *);
695
696
697 void (*phy_status)(struct xgbe_prv_data *);
698 int (*phy_config_aneg)(struct xgbe_prv_data *);
699};
700
701struct xgbe_desc_if {
702 int (*alloc_ring_resources)(struct xgbe_prv_data *);
703 void (*free_ring_resources)(struct xgbe_prv_data *);
704 int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *);
705 int (*map_rx_buffer)(struct xgbe_prv_data *, struct xgbe_ring *,
706 struct xgbe_ring_data *);
707 void (*unmap_rdata)(struct xgbe_prv_data *, struct xgbe_ring_data *);
708 void (*wrapper_tx_desc_init)(struct xgbe_prv_data *);
709 void (*wrapper_rx_desc_init)(struct xgbe_prv_data *);
710};
711
712
713
714
715struct xgbe_hw_features {
716
717 unsigned int version;
718
719
720 unsigned int gmii;
721 unsigned int vlhash;
722 unsigned int sma;
723 unsigned int rwk;
724 unsigned int mgk;
725 unsigned int mmc;
726 unsigned int aoe;
727 unsigned int ts;
728 unsigned int eee;
729 unsigned int tx_coe;
730 unsigned int rx_coe;
731 unsigned int addn_mac;
732 unsigned int ts_src;
733 unsigned int sa_vlan_ins;
734
735
736 unsigned int rx_fifo_size;
737 unsigned int tx_fifo_size;
738 unsigned int adv_ts_hi;
739 unsigned int dma_width;
740 unsigned int dcb;
741 unsigned int sph;
742 unsigned int tso;
743 unsigned int dma_debug;
744 unsigned int rss;
745 unsigned int tc_cnt;
746 unsigned int hash_table_size;
747 unsigned int l3l4_filter_num;
748
749
750 unsigned int rx_q_cnt;
751 unsigned int tx_q_cnt;
752 unsigned int rx_ch_cnt;
753 unsigned int tx_ch_cnt;
754 unsigned int pps_out_num;
755 unsigned int aux_snap_num;
756};
757
758struct xgbe_prv_data {
759 struct net_device *netdev;
760 struct platform_device *pdev;
761 struct acpi_device *adev;
762 struct device *dev;
763
764
765 unsigned int use_acpi;
766
767
768 void __iomem *xgmac_regs;
769 void __iomem *xpcs_regs;
770 void __iomem *rxtx_regs;
771 void __iomem *sir0_regs;
772 void __iomem *sir1_regs;
773
774
775 spinlock_t lock;
776
777
778 spinlock_t xpcs_lock;
779
780
781 struct mutex rss_mutex;
782
783
784 unsigned long dev_state;
785
786 int dev_irq;
787 unsigned int per_channel_irq;
788
789 struct xgbe_hw_if hw_if;
790 struct xgbe_phy_if phy_if;
791 struct xgbe_desc_if desc_if;
792
793
794 unsigned int coherent;
795 unsigned int axdomain;
796 unsigned int arcache;
797 unsigned int awcache;
798
799
800 struct workqueue_struct *dev_workqueue;
801 struct work_struct service_work;
802 struct timer_list service_timer;
803
804
805 struct xgbe_channel *channel;
806 unsigned int channel_count;
807 unsigned int tx_ring_count;
808 unsigned int tx_desc_count;
809 unsigned int rx_ring_count;
810 unsigned int rx_desc_count;
811
812 unsigned int tx_q_count;
813 unsigned int rx_q_count;
814
815
816 unsigned int pblx8;
817
818
819 unsigned int tx_sf_mode;
820 unsigned int tx_threshold;
821 unsigned int tx_pbl;
822 unsigned int tx_osp_mode;
823
824
825 unsigned int rx_sf_mode;
826 unsigned int rx_threshold;
827 unsigned int rx_pbl;
828
829
830 unsigned int tx_usecs;
831 unsigned int tx_frames;
832
833
834 unsigned int rx_riwt;
835 unsigned int rx_usecs;
836 unsigned int rx_frames;
837
838
839 unsigned int rx_buf_size;
840
841
842 unsigned int pause_autoneg;
843 unsigned int tx_pause;
844 unsigned int rx_pause;
845
846
847 u8 rss_key[XGBE_RSS_HASH_KEY_SIZE];
848 u32 rss_table[XGBE_RSS_MAX_TABLE_SIZE];
849 u32 rss_options;
850
851
852 unsigned char mac_addr[ETH_ALEN];
853 netdev_features_t netdev_features;
854 struct napi_struct napi;
855 struct xgbe_mmc_stats mmc_stats;
856 struct xgbe_ext_stats ext_stats;
857
858
859 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
860
861
862 struct clk *sysclk;
863 unsigned long sysclk_rate;
864 struct clk *ptpclk;
865 unsigned long ptpclk_rate;
866
867
868 spinlock_t tstamp_lock;
869 struct ptp_clock_info ptp_clock_info;
870 struct ptp_clock *ptp_clock;
871 struct hwtstamp_config tstamp_config;
872 struct cyclecounter tstamp_cc;
873 struct timecounter tstamp_tc;
874 unsigned int tstamp_addend;
875 struct work_struct tx_tstamp_work;
876 struct sk_buff *tx_tstamp_skb;
877 u64 tx_tstamp;
878
879
880 struct ieee_ets *ets;
881 struct ieee_pfc *pfc;
882 unsigned int q2tc_map[XGBE_MAX_QUEUES];
883 unsigned int prio2q_map[IEEE_8021QAZ_MAX_TCS];
884 u8 num_tcs;
885
886
887 struct xgbe_hw_features hw_feat;
888
889
890 struct work_struct restart_work;
891
892
893 unsigned int power_down;
894
895
896 u32 msg_enable;
897
898
899 phy_interface_t phy_mode;
900 int phy_link;
901 int phy_speed;
902
903
904 struct xgbe_phy phy;
905 int mdio_mmd;
906 unsigned long link_check;
907
908 char an_name[IFNAMSIZ + 32];
909 struct workqueue_struct *an_workqueue;
910
911 int an_irq;
912 struct work_struct an_irq_work;
913
914 unsigned int speed_set;
915
916
917
918
919
920
921
922 u32 serdes_blwc[XGBE_SPEEDS];
923 u32 serdes_cdr_rate[XGBE_SPEEDS];
924 u32 serdes_pq_skew[XGBE_SPEEDS];
925 u32 serdes_tx_amp[XGBE_SPEEDS];
926 u32 serdes_dfe_tap_cfg[XGBE_SPEEDS];
927 u32 serdes_dfe_tap_ena[XGBE_SPEEDS];
928
929
930 unsigned int an_int;
931 struct mutex an_mutex;
932 enum xgbe_an an_result;
933 enum xgbe_an an_state;
934 enum xgbe_rx kr_state;
935 enum xgbe_rx kx_state;
936 struct work_struct an_work;
937 unsigned int an_supported;
938 unsigned int parallel_detect;
939 unsigned int fec_ability;
940 unsigned long an_start;
941
942 unsigned int lpm_ctrl;
943
944#ifdef CONFIG_DEBUG_FS
945 struct dentry *xgbe_debugfs;
946
947 unsigned int debugfs_xgmac_reg;
948
949 unsigned int debugfs_xpcs_mmd;
950 unsigned int debugfs_xpcs_reg;
951#endif
952};
953
954
955
956void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *);
957void xgbe_init_function_ptrs_phy(struct xgbe_phy_if *);
958void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *);
959struct net_device_ops *xgbe_get_netdev_ops(void);
960struct ethtool_ops *xgbe_get_ethtool_ops(void);
961#ifdef CONFIG_AMD_XGBE_DCB
962const struct dcbnl_rtnl_ops *xgbe_get_dcbnl_ops(void);
963#endif
964
965void xgbe_ptp_register(struct xgbe_prv_data *);
966void xgbe_ptp_unregister(struct xgbe_prv_data *);
967void xgbe_dump_tx_desc(struct xgbe_prv_data *, struct xgbe_ring *,
968 unsigned int, unsigned int, unsigned int);
969void xgbe_dump_rx_desc(struct xgbe_prv_data *, struct xgbe_ring *,
970 unsigned int);
971void xgbe_print_pkt(struct net_device *, struct sk_buff *, bool);
972void xgbe_get_all_hw_features(struct xgbe_prv_data *);
973int xgbe_powerup(struct net_device *, unsigned int);
974int xgbe_powerdown(struct net_device *, unsigned int);
975void xgbe_init_rx_coalesce(struct xgbe_prv_data *);
976void xgbe_init_tx_coalesce(struct xgbe_prv_data *);
977
978#ifdef CONFIG_DEBUG_FS
979void xgbe_debugfs_init(struct xgbe_prv_data *);
980void xgbe_debugfs_exit(struct xgbe_prv_data *);
981#else
982static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {}
983static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {}
984#endif
985
986
987#if 0
988#define YDEBUG
989#define YDEBUG_MDIO
990#endif
991
992
993#ifdef YDEBUG
994#define DBGPR(x...) pr_alert(x)
995#else
996#define DBGPR(x...) do { } while (0)
997#endif
998
999#ifdef YDEBUG_MDIO
1000#define DBGPR_MDIO(x...) pr_alert(x)
1001#else
1002#define DBGPR_MDIO(x...) do { } while (0)
1003#endif
1004
1005#endif
1006