LXR linux/drivers/net/ethernet/chelsio/cxgb4vf/t4vf

   1/*
   2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
   3 * driver for Linux.
   4 *
   5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
   6 *
   7 * This software is available to you under a choice of one of two
   8 * licenses.  You may choose to be licensed under the terms of the GNU
   9 * General Public License (GPL) Version 2, available from the file
  10 * COPYING in the main directory of this source tree, or the
  11 * OpenIB.org BSD license below:
  12 *
  13 *     Redistribution and use in source and binary forms, with or
  14 *     without modification, are permitted provided that the following
  15 *     conditions are met:
  16 *
  17 *      - Redistributions of source code must retain the above
  18 *        copyright notice, this list of conditions and the following
  19 *        disclaimer.
  20 *
  21 *      - Redistributions in binary form must reproduce the above
  22 *        copyright notice, this list of conditions and the following
  23 *        disclaimer in the documentation and/or other materials
  24 *        provided with the distribution.
  25 *
  26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33 * SOFTWARE.
  34 */
  35
  36#ifndef __T4VF_COMMON_H__
  37#define __T4VF_COMMON_H__
  38
  39#include "../cxgb4/t4fw_api.h"
  40
  41#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
  42#define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
  43#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
  44
  45/* All T4 and later chips have their PCI-E Device IDs encoded as 0xVFPP where:
  46 *
  47 *   V  = "4" for T4; "5" for T5, etc. or
  48 *      = "a" for T4 FPGA; "b" for T4 FPGA, etc.
  49 *   F  = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
  50 *   PP = adapter product designation
  51 */
  52#define CHELSIO_T4              0x4
  53#define CHELSIO_T5              0x5
  54#define CHELSIO_T6              0x6
  55
  56enum chip_type {
  57        T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
  58        T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
  59        T4_FIRST_REV    = T4_A1,
  60        T4_LAST_REV     = T4_A2,
  61
  62        T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
  63        T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
  64        T5_FIRST_REV    = T5_A0,
  65        T5_LAST_REV     = T5_A1,
  66};
  67
  68/*
  69 * The "len16" field of a Firmware Command Structure ...
  70 */
  71#define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16)
  72
  73/*
  74 * Per-VF statistics.
  75 */
  76struct t4vf_port_stats {
  77        /*
  78         * TX statistics.
  79         */
  80        u64 tx_bcast_bytes;             /* broadcast */
  81        u64 tx_bcast_frames;
  82        u64 tx_mcast_bytes;             /* multicast */
  83        u64 tx_mcast_frames;
  84        u64 tx_ucast_bytes;             /* unicast */
  85        u64 tx_ucast_frames;
  86        u64 tx_drop_frames;             /* TX dropped frames */
  87        u64 tx_offload_bytes;           /* offload */
  88        u64 tx_offload_frames;
  89
  90        /*
  91         * RX statistics.
  92         */
  93        u64 rx_bcast_bytes;             /* broadcast */
  94        u64 rx_bcast_frames;
  95        u64 rx_mcast_bytes;             /* multicast */
  96        u64 rx_mcast_frames;
  97        u64 rx_ucast_bytes;
  98        u64 rx_ucast_frames;            /* unicast */
  99
 100        u64 rx_err_frames;              /* RX error frames */
 101};
 102
 103/*
 104 * Per-"port" (Virtual Interface) link configuration ...
 105 */
 106struct link_config {
 107        unsigned int   supported;        /* link capabilities */
 108        unsigned int   advertising;      /* advertised capabilities */
 109        unsigned short requested_speed;  /* speed user has requested */
 110        unsigned short speed;            /* actual link speed */
 111        unsigned char  requested_fc;     /* flow control user has requested */
 112        unsigned char  fc;               /* actual link flow control */
 113        unsigned char  autoneg;          /* autonegotiating? */
 114        unsigned char  link_ok;          /* link up? */
 115};
 116
 117enum {
 118        PAUSE_RX      = 1 << 0,
 119        PAUSE_TX      = 1 << 1,
 120        PAUSE_AUTONEG = 1 << 2
 121};
 122
 123/*
 124 * General device parameters ...
 125 */
 126struct dev_params {
 127        u32 fwrev;                      /* firmware version */
 128        u32 tprev;                      /* TP Microcode Version */
 129};
 130
 131/*
 132 * Scatter Gather Engine parameters.  These are almost all determined by the
 133 * Physical Function Driver.  We just need to grab them to see within which
 134 * environment we're playing ...
 135 */
 136struct sge_params {
 137        u32 sge_control;                /* padding, boundaries, lengths, etc. */
 138        u32 sge_control2;               /* T5: more of the same */
 139        u32 sge_host_page_size;         /* PF0-7 page sizes */
 140        u32 sge_egress_queues_per_page; /* PF0-7 egress queues/page */
 141        u32 sge_ingress_queues_per_page;/* PF0-7 ingress queues/page */
 142        u32 sge_vf_hps;                 /* host page size for our vf */
 143        u32 sge_vf_eq_qpp;              /* egress queues/page for our VF */
 144        u32 sge_vf_iq_qpp;              /* ingress queues/page for our VF */
 145        u32 sge_fl_buffer_size[16];     /* free list buffer sizes */
 146        u32 sge_ingress_rx_threshold;   /* RX counter interrupt threshold[4] */
 147        u32 sge_congestion_control;     /* congestion thresholds, etc. */
 148        u32 sge_timer_value_0_and_1;    /* interrupt coalescing timer values */
 149        u32 sge_timer_value_2_and_3;
 150        u32 sge_timer_value_4_and_5;
 151};
 152
 153/*
 154 * Vital Product Data parameters.
 155 */
 156struct vpd_params {
 157        u32 cclk;                       /* Core Clock (KHz) */
 158};
 159
 160/* Stores chip specific parameters */
 161struct arch_specific_params {
 162        u32 sge_fl_db;
 163        u16 mps_tcam_size;
 164};
 165
 166/*
 167 * Global Receive Side Scaling (RSS) parameters in host-native format.
 168 */
 169struct rss_params {
 170        unsigned int mode;              /* RSS mode */
 171        union {
 172            struct {
 173                unsigned int synmapen:1;        /* SYN Map Enable */
 174                unsigned int syn4tupenipv6:1;   /* enable hashing 4-tuple IPv6 SYNs */
 175                unsigned int syn2tupenipv6:1;   /* enable hashing 2-tuple IPv6 SYNs */
 176                unsigned int syn4tupenipv4:1;   /* enable hashing 4-tuple IPv4 SYNs */
 177                unsigned int syn2tupenipv4:1;   /* enable hashing 2-tuple IPv4 SYNs */
 178                unsigned int ofdmapen:1;        /* Offload Map Enable */
 179                unsigned int tnlmapen:1;        /* Tunnel Map Enable */
 180                unsigned int tnlalllookup:1;    /* Tunnel All Lookup */
 181                unsigned int hashtoeplitz:1;    /* use Toeplitz hash */
 182            } basicvirtual;
 183        } u;
 184};
 185
 186/*
 187 * Virtual Interface RSS Configuration in host-native format.
 188 */
 189union rss_vi_config {
 190    struct {
 191        u16 defaultq;                   /* Ingress Queue ID for !tnlalllookup */
 192        unsigned int ip6fourtupen:1;    /* hash 4-tuple IPv6 ingress packets */
 193        unsigned int ip6twotupen:1;     /* hash 2-tuple IPv6 ingress packets */
 194        unsigned int ip4fourtupen:1;    /* hash 4-tuple IPv4 ingress packets */
 195        unsigned int ip4twotupen:1;     /* hash 2-tuple IPv4 ingress packets */
 196        int udpen;                      /* hash 4-tuple UDP ingress packets */
 197    } basicvirtual;
 198};
 199
 200/*
 201 * Maximum resources provisioned for a PCI VF.
 202 */
 203struct vf_resources {
 204        unsigned int nvi;               /* N virtual interfaces */
 205        unsigned int neq;               /* N egress Qs */
 206        unsigned int nethctrl;          /* N egress ETH or CTRL Qs */
 207        unsigned int niqflint;          /* N ingress Qs/w free list(s) & intr */
 208        unsigned int niq;               /* N ingress Qs */
 209        unsigned int tc;                /* PCI-E traffic class */
 210        unsigned int pmask;             /* port access rights mask */
 211        unsigned int nexactf;           /* N exact MPS filters */
 212        unsigned int r_caps;            /* read capabilities */
 213        unsigned int wx_caps;           /* write/execute capabilities */
 214};
 215
 216/*
 217 * Per-"adapter" (Virtual Function) parameters.
 218 */
 219struct adapter_params {
 220        struct dev_params dev;          /* general device parameters */
 221        struct sge_params sge;          /* Scatter Gather Engine */
 222        struct vpd_params vpd;          /* Vital Product Data */
 223        struct rss_params rss;          /* Receive Side Scaling */
 224        struct vf_resources vfres;      /* Virtual Function Resource limits */
 225        struct arch_specific_params arch; /* chip specific params */
 226        enum chip_type chip;            /* chip code */
 227        u8 nports;                      /* # of Ethernet "ports" */
 228};
 229
 230#include "adapter.h"
 231
 232#ifndef PCI_VENDOR_ID_CHELSIO
 233# define PCI_VENDOR_ID_CHELSIO 0x1425
 234#endif
 235
 236#define for_each_port(adapter, iter) \
 237        for (iter = 0; iter < (adapter)->params.nports; iter++)
 238
 239static inline bool is_10g_port(const struct link_config *lc)
 240{
 241        return (lc->supported & FW_PORT_CAP_SPEED_10G) != 0;
 242}
 243
 244static inline bool is_x_10g_port(const struct link_config *lc)
 245{
 246        return (lc->supported & FW_PORT_CAP_SPEED_10G) != 0 ||
 247                (lc->supported & FW_PORT_CAP_SPEED_40G) != 0;
 248}
 249
 250static inline unsigned int core_ticks_per_usec(const struct adapter *adapter)
 251{
 252        return adapter->params.vpd.cclk / 1000;
 253}
 254
 255static inline unsigned int us_to_core_ticks(const struct adapter *adapter,
 256                                            unsigned int us)
 257{
 258        return (us * adapter->params.vpd.cclk) / 1000;
 259}
 260
 261static inline unsigned int core_ticks_to_us(const struct adapter *adapter,
 262                                            unsigned int ticks)
 263{
 264        return (ticks * 1000) / adapter->params.vpd.cclk;
 265}
 266
 267int t4vf_wr_mbox_core(struct adapter *, const void *, int, void *, bool);
 268
 269static inline int t4vf_wr_mbox(struct adapter *adapter, const void *cmd,
 270                               int size, void *rpl)
 271{
 272        return t4vf_wr_mbox_core(adapter, cmd, size, rpl, true);
 273}
 274
 275static inline int t4vf_wr_mbox_ns(struct adapter *adapter, const void *cmd,
 276                                  int size, void *rpl)
 277{
 278        return t4vf_wr_mbox_core(adapter, cmd, size, rpl, false);
 279}
 280
 281#define CHELSIO_PCI_ID_VER(dev_id)  ((dev_id) >> 12)
 282
 283static inline int is_t4(enum chip_type chip)
 284{
 285        return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4;
 286}
 287
 288/**
 289 *      hash_mac_addr - return the hash value of a MAC address
 290 *      @addr: the 48-bit Ethernet MAC address
 291 *
 292 *      Hashes a MAC address according to the hash function used by hardware
 293 *      inexact (hash) address matching.
 294 */
 295static inline int hash_mac_addr(const u8 *addr)
 296{
 297        u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2];
 298        u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5];
 299
 300        a ^= b;
 301        a ^= (a >> 12);
 302        a ^= (a >> 6);
 303        return a & 0x3f;
 304}
 305
 306int t4vf_wait_dev_ready(struct adapter *);
 307int t4vf_port_init(struct adapter *, int);
 308
 309int t4vf_fw_reset(struct adapter *);
 310int t4vf_set_params(struct adapter *, unsigned int, const u32 *, const u32 *);
 311
 312int t4vf_fl_pkt_align(struct adapter *adapter);
 313enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS };
 314int t4vf_bar2_sge_qregs(struct adapter *adapter,
 315                        unsigned int qid,
 316                        enum t4_bar2_qtype qtype,
 317                        u64 *pbar2_qoffset,
 318                        unsigned int *pbar2_qid);
 319
 320int t4vf_get_sge_params(struct adapter *);
 321int t4vf_get_vpd_params(struct adapter *);
 322int t4vf_get_dev_params(struct adapter *);
 323int t4vf_get_rss_glb_config(struct adapter *);
 324int t4vf_get_vfres(struct adapter *);
 325
 326int t4vf_read_rss_vi_config(struct adapter *, unsigned int,
 327                            union rss_vi_config *);
 328int t4vf_write_rss_vi_config(struct adapter *, unsigned int,
 329                             union rss_vi_config *);
 330int t4vf_config_rss_range(struct adapter *, unsigned int, int, int,
 331                          const u16 *, int);
 332
 333int t4vf_alloc_vi(struct adapter *, int);
 334int t4vf_free_vi(struct adapter *, int);
 335int t4vf_enable_vi(struct adapter *, unsigned int, bool, bool);
 336int t4vf_identify_port(struct adapter *, unsigned int, unsigned int);
 337
 338int t4vf_set_rxmode(struct adapter *, unsigned int, int, int, int, int, int,
 339                    bool);
 340int t4vf_alloc_mac_filt(struct adapter *, unsigned int, bool, unsigned int,
 341                        const u8 **, u16 *, u64 *, bool);
 342int t4vf_free_mac_filt(struct adapter *, unsigned int, unsigned int naddr,
 343                       const u8 **, bool);
 344int t4vf_change_mac(struct adapter *, unsigned int, int, const u8 *, bool);
 345int t4vf_set_addr_hash(struct adapter *, unsigned int, bool, u64, bool);
 346int t4vf_get_port_stats(struct adapter *, int, struct t4vf_port_stats *);
 347
 348int t4vf_iq_free(struct adapter *, unsigned int, unsigned int, unsigned int,
 349                 unsigned int);
 350int t4vf_eth_eq_free(struct adapter *, unsigned int);
 351
 352int t4vf_handle_fw_rpl(struct adapter *, const __be64 *);
 353int t4vf_prep_adapter(struct adapter *);
 354
 355#endif /* __T4VF_COMMON_H__ */
 356