LXR linux/drivers/net/ethernet/intel/i40e/i40e

   1/*******************************************************************************
   2 *
   3 * Intel Ethernet Controller XL710 Family Linux Driver
   4 * Copyright(c) 2013 - 2014 Intel Corporation.
   5 *
   6 * This program is free software; you can redistribute it and/or modify it
   7 * under the terms and conditions of the GNU General Public License,
   8 * version 2, as published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope it will be useful, but WITHOUT
  11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13 * more details.
  14 *
  15 * You should have received a copy of the GNU General Public License along
  16 * with this program.  If not, see <http://www.gnu.org/licenses/>.
  17 *
  18 * The full GNU General Public License is included in this distribution in
  19 * the file called "COPYING".
  20 *
  21 * Contact Information:
  22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24 *
  25 ******************************************************************************/
  26
  27#ifndef _I40E_OSDEP_H_
  28#define _I40E_OSDEP_H_
  29
  30#include <linux/types.h>
  31#include <linux/if_ether.h>
  32#include <linux/if_vlan.h>
  33#include <linux/tcp.h>
  34#include <linux/pci.h>
  35#include <linux/highuid.h>
  36
  37/* get readq/writeq support for 32 bit kernels, use the low-first version */
  38#include <linux/io-64-nonatomic-lo-hi.h>
  39
  40/* File to be the magic between shared code and
  41 * actual OS primitives
  42 */
  43
  44#define hw_dbg(hw, S, A...)     do {} while (0)
  45
  46#define wr32(a, reg, value)     writel((value), ((a)->hw_addr + (reg)))
  47#define rd32(a, reg)            readl((a)->hw_addr + (reg))
  48
  49#define wr64(a, reg, value)     writeq((value), ((a)->hw_addr + (reg)))
  50#define rd64(a, reg)            readq((a)->hw_addr + (reg))
  51#define i40e_flush(a)           readl((a)->hw_addr + I40E_GLGEN_STAT)
  52
  53/* memory allocation tracking */
  54struct i40e_dma_mem {
  55        void *va;
  56        dma_addr_t pa;
  57        u32 size;
  58} __packed;
  59
  60#define i40e_allocate_dma_mem(h, m, unused, s, a) \
  61                        i40e_allocate_dma_mem_d(h, m, s, a)
  62#define i40e_free_dma_mem(h, m) i40e_free_dma_mem_d(h, m)
  63
  64struct i40e_virt_mem {
  65        void *va;
  66        u32 size;
  67} __packed;
  68
  69#define i40e_allocate_virt_mem(h, m, s) i40e_allocate_virt_mem_d(h, m, s)
  70#define i40e_free_virt_mem(h, m) i40e_free_virt_mem_d(h, m)
  71
  72#define i40e_debug(h, m, s, ...)                                \
  73do {                                                            \
  74        if (((m) & (h)->debug_mask))                            \
  75                pr_info("i40e %02x.%x " s,                      \
  76                        (h)->bus.device, (h)->bus.func,         \
  77                        ##__VA_ARGS__);                         \
  78} while (0)
  79
  80typedef enum i40e_status_code i40e_status;
  81#ifdef CONFIG_I40E_FCOE
  82#define I40E_FCOE
  83#endif
  84#endif /* _I40E_OSDEP_H_ */
  85