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26
27#include "i40e.h"
28
29
30
31
32
33
34
35
36
37
38
39
40
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
42 enum i40e_virtchnl_ops v_opcode,
43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
51 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
52
53 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
55 continue;
56
57
58
59
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65
66
67
68
69
70
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
73 struct i40e_virtchnl_pf_event pfe;
74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
77 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
78
79 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
80 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
84 (vf->link_up ? I40E_LINK_SPEED_40GB : 0);
85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
88 pfe.event_data.link_event.link_speed = ls->link_speed;
89 }
90 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
91 0, (u8 *)&pfe, sizeof(pfe), NULL);
92}
93
94
95
96
97
98
99
100void i40e_vc_notify_link_state(struct i40e_pf *pf)
101{
102 int i;
103
104 for (i = 0; i < pf->num_alloc_vfs; i++)
105 i40e_vc_notify_vf_link_state(&pf->vf[i]);
106}
107
108
109
110
111
112
113
114void i40e_vc_notify_reset(struct i40e_pf *pf)
115{
116 struct i40e_virtchnl_pf_event pfe;
117
118 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
119 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
120 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, 0,
121 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
122}
123
124
125
126
127
128
129
130void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
131{
132 struct i40e_virtchnl_pf_event pfe;
133 int abs_vf_id;
134
135
136 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
137 return;
138
139
140 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
141 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
142 return;
143
144 abs_vf_id = vf->vf_id + vf->pf->hw.func_caps.vf_base_id;
145
146 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
147 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
148 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
149 0, (u8 *)&pfe,
150 sizeof(struct i40e_virtchnl_pf_event), NULL);
151}
152
153
154
155
156
157
158
159
160
161static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf)
162{
163 i40e_vc_notify_vf_reset(vf);
164 i40e_reset_vf(vf, false);
165}
166
167
168
169
170
171
172
173
174static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
175{
176 struct i40e_pf *pf = vf->pf;
177 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
178
179 return (vsi && (vsi->vf_id == vf->vf_id));
180}
181
182
183
184
185
186
187
188
189
190static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
191 u8 qid)
192{
193 struct i40e_pf *pf = vf->pf;
194 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
195
196 return (vsi && (qid < vsi->alloc_queue_pairs));
197}
198
199
200
201
202
203
204
205
206static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
207{
208 struct i40e_pf *pf = vf->pf;
209
210 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
211}
212
213
214
215
216
217
218
219
220
221
222
223static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
224 u8 vsi_queue_id)
225{
226 struct i40e_pf *pf = vf->pf;
227 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
228 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
229
230 if (!vsi)
231 return pf_queue_id;
232
233 if (le16_to_cpu(vsi->info.mapping_flags) &
234 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
235 pf_queue_id =
236 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
237 else
238 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
239 vsi_queue_id;
240
241 return pf_queue_id;
242}
243
244
245
246
247
248
249
250
251
252static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
253 struct i40e_virtchnl_vector_map *vecmap)
254{
255 unsigned long linklistmap = 0, tempmap;
256 struct i40e_pf *pf = vf->pf;
257 struct i40e_hw *hw = &pf->hw;
258 u16 vsi_queue_id, pf_queue_id;
259 enum i40e_queue_type qtype;
260 u16 next_q, vector_id;
261 u32 reg, reg_idx;
262 u16 itr_idx = 0;
263
264 vector_id = vecmap->vector_id;
265
266 if (0 == vector_id)
267 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
268 else
269 reg_idx = I40E_VPINT_LNKLSTN(
270 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
271 (vector_id - 1));
272
273 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
274
275 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
276 goto irq_list_done;
277 }
278 tempmap = vecmap->rxq_map;
279 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
280 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
281 vsi_queue_id));
282 }
283
284 tempmap = vecmap->txq_map;
285 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
286 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
287 vsi_queue_id + 1));
288 }
289
290 next_q = find_first_bit(&linklistmap,
291 (I40E_MAX_VSI_QP *
292 I40E_VIRTCHNL_SUPPORTED_QTYPES));
293 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
294 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
295 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
296 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
297
298 wr32(hw, reg_idx, reg);
299
300 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
301 switch (qtype) {
302 case I40E_QUEUE_TYPE_RX:
303 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
304 itr_idx = vecmap->rxitr_idx;
305 break;
306 case I40E_QUEUE_TYPE_TX:
307 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
308 itr_idx = vecmap->txitr_idx;
309 break;
310 default:
311 break;
312 }
313
314 next_q = find_next_bit(&linklistmap,
315 (I40E_MAX_VSI_QP *
316 I40E_VIRTCHNL_SUPPORTED_QTYPES),
317 next_q + 1);
318 if (next_q <
319 (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
320 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
321 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
322 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id,
323 vsi_queue_id);
324 } else {
325 pf_queue_id = I40E_QUEUE_END_OF_LIST;
326 qtype = 0;
327 }
328
329
330 reg = (vector_id) |
331 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
332 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
333 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
334 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
335 wr32(hw, reg_idx, reg);
336 }
337
338
339
340
341 if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
342 (vector_id == 0)) {
343 reg = rd32(hw, I40E_GLINT_CTL);
344 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
345 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
346 wr32(hw, I40E_GLINT_CTL, reg);
347 }
348 }
349
350irq_list_done:
351 i40e_flush(hw);
352}
353
354
355
356
357
358
359static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
360{
361 struct i40e_pf *pf = vf->pf;
362 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
363 u32 msix_vf;
364 u32 i;
365
366 if (!vf->qvlist_info)
367 return;
368
369 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
370 for (i = 0; i < qvlist_info->num_vectors; i++) {
371 struct i40e_virtchnl_iwarp_qv_info *qv_info;
372 u32 next_q_index, next_q_type;
373 struct i40e_hw *hw = &pf->hw;
374 u32 v_idx, reg_idx, reg;
375
376 qv_info = &qvlist_info->qv_info[i];
377 if (!qv_info)
378 continue;
379 v_idx = qv_info->v_idx;
380 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
381
382
383
384 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
385 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
386 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
387 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
388 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
389 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
390
391 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
392 reg = (next_q_index &
393 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
394 (next_q_type <<
395 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
396
397 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
398 }
399 }
400 kfree(vf->qvlist_info);
401 vf->qvlist_info = NULL;
402}
403
404
405
406
407
408
409
410
411static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
412 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info)
413{
414 struct i40e_pf *pf = vf->pf;
415 struct i40e_hw *hw = &pf->hw;
416 struct i40e_virtchnl_iwarp_qv_info *qv_info;
417 u32 v_idx, i, reg_idx, reg;
418 u32 next_q_idx, next_q_type;
419 u32 msix_vf, size;
420
421 size = sizeof(struct i40e_virtchnl_iwarp_qvlist_info) +
422 (sizeof(struct i40e_virtchnl_iwarp_qv_info) *
423 (qvlist_info->num_vectors - 1));
424 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
425 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
426
427 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
428 for (i = 0; i < qvlist_info->num_vectors; i++) {
429 qv_info = &qvlist_info->qv_info[i];
430 if (!qv_info)
431 continue;
432 v_idx = qv_info->v_idx;
433
434
435 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
436 goto err;
437
438 vf->qvlist_info->qv_info[i] = *qv_info;
439
440 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
441
442
443
444
445 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
446 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
447 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
448 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
449 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
450
451 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
452 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
453 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
454 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
455 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
456 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
457 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
458 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
459
460 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
461 reg = (qv_info->ceq_idx &
462 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
463 (I40E_QUEUE_TYPE_PE_CEQ <<
464 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
465 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
466 }
467
468 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
469 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
470 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
471 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
472
473 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
474 }
475 }
476
477 return 0;
478err:
479 kfree(vf->qvlist_info);
480 vf->qvlist_info = NULL;
481 return -EINVAL;
482}
483
484
485
486
487
488
489
490
491
492
493static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
494 u16 vsi_queue_id,
495 struct i40e_virtchnl_txq_info *info)
496{
497 struct i40e_pf *pf = vf->pf;
498 struct i40e_hw *hw = &pf->hw;
499 struct i40e_hmc_obj_txq tx_ctx;
500 struct i40e_vsi *vsi;
501 u16 pf_queue_id;
502 u32 qtx_ctl;
503 int ret = 0;
504
505 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
506 vsi = i40e_find_vsi_from_id(pf, vsi_id);
507
508
509 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
510
511
512 tx_ctx.base = info->dma_ring_addr / 128;
513 tx_ctx.qlen = info->ring_len;
514 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
515 tx_ctx.rdylist_act = 0;
516 tx_ctx.head_wb_ena = info->headwb_enabled;
517 tx_ctx.head_wb_addr = info->dma_headwb_addr;
518
519
520 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
521 if (ret) {
522 dev_err(&pf->pdev->dev,
523 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
524 pf_queue_id, ret);
525 ret = -ENOENT;
526 goto error_context;
527 }
528
529
530 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
531 if (ret) {
532 dev_err(&pf->pdev->dev,
533 "Failed to set VF LAN Tx queue context %d error: %d\n",
534 pf_queue_id, ret);
535 ret = -ENOENT;
536 goto error_context;
537 }
538
539
540 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
541 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
542 & I40E_QTX_CTL_PF_INDX_MASK);
543 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
544 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
545 & I40E_QTX_CTL_VFVM_INDX_MASK);
546 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
547 i40e_flush(hw);
548
549error_context:
550 return ret;
551}
552
553
554
555
556
557
558
559
560
561
562static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
563 u16 vsi_queue_id,
564 struct i40e_virtchnl_rxq_info *info)
565{
566 struct i40e_pf *pf = vf->pf;
567 struct i40e_hw *hw = &pf->hw;
568 struct i40e_hmc_obj_rxq rx_ctx;
569 u16 pf_queue_id;
570 int ret = 0;
571
572 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
573
574
575 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
576
577
578 rx_ctx.base = info->dma_ring_addr / 128;
579 rx_ctx.qlen = info->ring_len;
580
581 if (info->splithdr_enabled) {
582 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
583 I40E_RX_SPLIT_IP |
584 I40E_RX_SPLIT_TCP_UDP |
585 I40E_RX_SPLIT_SCTP;
586
587 if (info->hdr_size > ((2 * 1024) - 64)) {
588 ret = -EINVAL;
589 goto error_param;
590 }
591 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
592
593
594 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
595 }
596
597
598 if (info->databuffer_size > ((16 * 1024) - 128)) {
599 ret = -EINVAL;
600 goto error_param;
601 }
602 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
603
604
605 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
606 ret = -EINVAL;
607 goto error_param;
608 }
609 rx_ctx.rxmax = info->max_pkt_size;
610
611
612 rx_ctx.dsize = 1;
613
614
615 rx_ctx.lrxqthresh = 2;
616 rx_ctx.crcstrip = 1;
617 rx_ctx.prefena = 1;
618 rx_ctx.l2tsel = 1;
619
620
621 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
622 if (ret) {
623 dev_err(&pf->pdev->dev,
624 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
625 pf_queue_id, ret);
626 ret = -ENOENT;
627 goto error_param;
628 }
629
630
631 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
632 if (ret) {
633 dev_err(&pf->pdev->dev,
634 "Failed to set VF LAN Rx queue context %d error: %d\n",
635 pf_queue_id, ret);
636 ret = -ENOENT;
637 goto error_param;
638 }
639
640error_param:
641 return ret;
642}
643
644
645
646
647
648
649
650
651static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
652{
653 struct i40e_mac_filter *f = NULL;
654 struct i40e_pf *pf = vf->pf;
655 struct i40e_vsi *vsi;
656 int ret = 0;
657
658 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
659
660 if (!vsi) {
661 dev_err(&pf->pdev->dev,
662 "add vsi failed for VF %d, aq_err %d\n",
663 vf->vf_id, pf->hw.aq.asq_last_status);
664 ret = -ENOENT;
665 goto error_alloc_vsi_res;
666 }
667 if (type == I40E_VSI_SRIOV) {
668 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
669
670 vf->lan_vsi_idx = vsi->idx;
671 vf->lan_vsi_id = vsi->id;
672
673
674
675
676
677
678 if (vf->port_vlan_id)
679 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
680
681 spin_lock_bh(&vsi->mac_filter_list_lock);
682 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
683 f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
684 vf->port_vlan_id ? vf->port_vlan_id : -1,
685 true, false);
686 if (!f)
687 dev_info(&pf->pdev->dev,
688 "Could not add MAC filter %pM for VF %d\n",
689 vf->default_lan_addr.addr, vf->vf_id);
690 }
691 f = i40e_add_filter(vsi, brdcast,
692 vf->port_vlan_id ? vf->port_vlan_id : -1,
693 true, false);
694 if (!f)
695 dev_info(&pf->pdev->dev,
696 "Could not allocate VF broadcast filter\n");
697 spin_unlock_bh(&vsi->mac_filter_list_lock);
698 }
699
700
701 ret = i40e_sync_vsi_filters(vsi);
702 if (ret)
703 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
704
705
706 if (vf->tx_rate) {
707 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
708 vf->tx_rate / 50, 0, NULL);
709 if (ret)
710 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
711 vf->vf_id, ret);
712 }
713
714error_alloc_vsi_res:
715 return ret;
716}
717
718
719
720
721
722
723
724static void i40e_enable_vf_mappings(struct i40e_vf *vf)
725{
726 struct i40e_pf *pf = vf->pf;
727 struct i40e_hw *hw = &pf->hw;
728 u32 reg, total_queue_pairs = 0;
729 int j;
730
731
732
733
734
735 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
736 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
737
738
739 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
740 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
741
742
743 for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) {
744 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j);
745
746 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
747 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
748 total_queue_pairs++;
749 }
750
751
752 for (j = 0; j < 7; j++) {
753 if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) {
754 reg = 0x07FF07FF;
755 } else {
756 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
757 j * 2);
758 reg = qid;
759 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
760 (j * 2) + 1);
761 reg |= qid << 16;
762 }
763 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id),
764 reg);
765 }
766
767 i40e_flush(hw);
768}
769
770
771
772
773
774
775
776static void i40e_disable_vf_mappings(struct i40e_vf *vf)
777{
778 struct i40e_pf *pf = vf->pf;
779 struct i40e_hw *hw = &pf->hw;
780 int i;
781
782
783 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
784 for (i = 0; i < I40E_MAX_VSI_QP; i++)
785 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
786 I40E_QUEUE_END_OF_LIST);
787 i40e_flush(hw);
788}
789
790
791
792
793
794
795
796static void i40e_free_vf_res(struct i40e_vf *vf)
797{
798 struct i40e_pf *pf = vf->pf;
799 struct i40e_hw *hw = &pf->hw;
800 u32 reg_idx, reg;
801 int i, msix_vf;
802
803
804 if (vf->lan_vsi_idx) {
805 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
806 vf->lan_vsi_idx = 0;
807 vf->lan_vsi_id = 0;
808 }
809 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
810
811
812 for (i = 0; i < msix_vf; i++) {
813
814 if (0 == i)
815 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
816 else
817 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
818 (vf->vf_id))
819 + (i - 1));
820 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
821 i40e_flush(hw);
822 }
823
824
825 for (i = 0; i < msix_vf; i++) {
826
827 if (0 == i)
828 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
829 else
830 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
831 (vf->vf_id))
832 + (i - 1));
833 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
834 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
835 wr32(hw, reg_idx, reg);
836 i40e_flush(hw);
837 }
838
839
840
841 vf->num_queue_pairs = 0;
842 vf->vf_states = 0;
843 clear_bit(I40E_VF_STAT_INIT, &vf->vf_states);
844}
845
846
847
848
849
850
851
852static int i40e_alloc_vf_res(struct i40e_vf *vf)
853{
854 struct i40e_pf *pf = vf->pf;
855 int total_queue_pairs = 0;
856 int ret;
857
858
859 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
860 if (ret)
861 goto error_alloc;
862 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
863 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
864
865
866
867
868 vf->num_queue_pairs = total_queue_pairs;
869
870
871 set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
872
873error_alloc:
874 if (ret)
875 i40e_free_vf_res(vf);
876
877 return ret;
878}
879
880#define VF_DEVICE_STATUS 0xAA
881#define VF_TRANS_PENDING_MASK 0x20
882
883
884
885
886
887
888
889static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
890{
891 struct i40e_pf *pf = vf->pf;
892 struct i40e_hw *hw = &pf->hw;
893 int vf_abs_id, i;
894 u32 reg;
895
896 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
897
898 wr32(hw, I40E_PF_PCI_CIAA,
899 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
900 for (i = 0; i < 100; i++) {
901 reg = rd32(hw, I40E_PF_PCI_CIAD);
902 if ((reg & VF_TRANS_PENDING_MASK) == 0)
903 return 0;
904 udelay(1);
905 }
906 return -EIO;
907}
908
909
910
911
912
913
914
915
916void i40e_reset_vf(struct i40e_vf *vf, bool flr)
917{
918 struct i40e_pf *pf = vf->pf;
919 struct i40e_hw *hw = &pf->hw;
920 bool rsd = false;
921 int i;
922 u32 reg;
923
924 if (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
925 return;
926
927
928 clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
929
930
931
932
933 if (!flr) {
934
935 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
936 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
937 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
938 i40e_flush(hw);
939 }
940
941 if (i40e_quiesce_vf_pci(vf))
942 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
943 vf->vf_id);
944
945
946
947
948 for (i = 0; i < 10; i++) {
949
950
951
952
953
954 usleep_range(10000, 20000);
955 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
956 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
957 rsd = true;
958 break;
959 }
960 }
961
962 if (flr)
963 usleep_range(10000, 20000);
964
965 if (!rsd)
966 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
967 vf->vf_id);
968 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
969
970 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
971 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
972 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
973
974
975 if (vf->lan_vsi_idx == 0)
976 goto complete_reset;
977
978 i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false);
979complete_reset:
980
981 i40e_free_vf_res(vf);
982 if (!i40e_alloc_vf_res(vf)) {
983 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
984 i40e_enable_vf_mappings(vf);
985 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
986 clear_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
987 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
988 }
989
990 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
991 i40e_flush(hw);
992 clear_bit(__I40E_VF_DISABLE, &pf->state);
993}
994
995
996
997
998
999
1000
1001void i40e_free_vfs(struct i40e_pf *pf)
1002{
1003 struct i40e_hw *hw = &pf->hw;
1004 u32 reg_idx, bit_idx;
1005 int i, tmp, vf_id;
1006
1007 if (!pf->vf)
1008 return;
1009 while (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
1010 usleep_range(1000, 2000);
1011
1012 i40e_notify_client_of_vf_enable(pf, 0);
1013 for (i = 0; i < pf->num_alloc_vfs; i++)
1014 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
1015 i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx],
1016 false);
1017
1018
1019
1020
1021
1022 if (!pci_vfs_assigned(pf->pdev))
1023 pci_disable_sriov(pf->pdev);
1024 else
1025 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
1026
1027 msleep(20);
1028
1029
1030 tmp = pf->num_alloc_vfs;
1031 pf->num_alloc_vfs = 0;
1032 for (i = 0; i < tmp; i++) {
1033 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
1034 i40e_free_vf_res(&pf->vf[i]);
1035
1036 i40e_disable_vf_mappings(&pf->vf[i]);
1037 }
1038
1039 kfree(pf->vf);
1040 pf->vf = NULL;
1041
1042
1043
1044
1045
1046 if (!pci_vfs_assigned(pf->pdev)) {
1047
1048
1049
1050 for (vf_id = 0; vf_id < tmp; vf_id++) {
1051 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1052 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
1053 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
1054 }
1055 }
1056 clear_bit(__I40E_VF_DISABLE, &pf->state);
1057}
1058
1059#ifdef CONFIG_PCI_IOV
1060
1061
1062
1063
1064
1065
1066
1067int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
1068{
1069 struct i40e_vf *vfs;
1070 int i, ret = 0;
1071
1072
1073 i40e_irq_dynamic_disable_icr0(pf);
1074
1075
1076 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1077 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1078 if (ret) {
1079 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
1080 pf->num_alloc_vfs = 0;
1081 goto err_iov;
1082 }
1083 }
1084 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1085
1086 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
1087 if (!vfs) {
1088 ret = -ENOMEM;
1089 goto err_alloc;
1090 }
1091 pf->vf = vfs;
1092
1093
1094 for (i = 0; i < num_alloc_vfs; i++) {
1095 vfs[i].pf = pf;
1096 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1097 vfs[i].vf_id = i;
1098
1099
1100 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
1101 vfs[i].spoofchk = true;
1102
1103 i40e_reset_vf(&vfs[i], false);
1104
1105 }
1106 pf->num_alloc_vfs = num_alloc_vfs;
1107
1108err_alloc:
1109 if (ret)
1110 i40e_free_vfs(pf);
1111err_iov:
1112
1113 i40e_irq_dynamic_enable_icr0(pf, false);
1114 return ret;
1115}
1116
1117#endif
1118
1119
1120
1121
1122
1123
1124
1125static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1126{
1127#ifdef CONFIG_PCI_IOV
1128 struct i40e_pf *pf = pci_get_drvdata(pdev);
1129 int pre_existing_vfs = pci_num_vf(pdev);
1130 int err = 0;
1131
1132 if (test_bit(__I40E_TESTING, &pf->state)) {
1133 dev_warn(&pdev->dev,
1134 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1135 err = -EPERM;
1136 goto err_out;
1137 }
1138
1139 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1140 i40e_free_vfs(pf);
1141 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1142 goto out;
1143
1144 if (num_vfs > pf->num_req_vfs) {
1145 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1146 num_vfs, pf->num_req_vfs);
1147 err = -EPERM;
1148 goto err_out;
1149 }
1150
1151 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
1152 err = i40e_alloc_vfs(pf, num_vfs);
1153 if (err) {
1154 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1155 goto err_out;
1156 }
1157
1158out:
1159 return num_vfs;
1160
1161err_out:
1162 return err;
1163#endif
1164 return 0;
1165}
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1176{
1177 struct i40e_pf *pf = pci_get_drvdata(pdev);
1178
1179 if (num_vfs) {
1180 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1181 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
1182 i40e_do_reset_safe(pf,
1183 BIT_ULL(__I40E_PF_RESET_REQUESTED));
1184 }
1185 return i40e_pci_sriov_enable(pdev, num_vfs);
1186 }
1187
1188 if (!pci_vfs_assigned(pf->pdev)) {
1189 i40e_free_vfs(pf);
1190 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
1191 i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
1192 } else {
1193 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1194 return -EINVAL;
1195 }
1196 return 0;
1197}
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1212 u32 v_retval, u8 *msg, u16 msglen)
1213{
1214 struct i40e_pf *pf;
1215 struct i40e_hw *hw;
1216 int abs_vf_id;
1217 i40e_status aq_ret;
1218
1219
1220 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1221 return -EINVAL;
1222
1223 pf = vf->pf;
1224 hw = &pf->hw;
1225 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1226
1227
1228 if (v_retval) {
1229 vf->num_invalid_msgs++;
1230 dev_err(&pf->pdev->dev, "VF %d failed opcode %d, error: %d\n",
1231 vf->vf_id, v_opcode, v_retval);
1232 if (vf->num_invalid_msgs >
1233 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1234 dev_err(&pf->pdev->dev,
1235 "Number of invalid messages exceeded for VF %d\n",
1236 vf->vf_id);
1237 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
1238 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
1239 }
1240 } else {
1241 vf->num_valid_msgs++;
1242
1243 vf->num_invalid_msgs = 0;
1244 }
1245
1246 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
1247 msg, msglen, NULL);
1248 if (aq_ret) {
1249 dev_err(&pf->pdev->dev,
1250 "Unable to send the message to VF %d aq_err %d\n",
1251 vf->vf_id, pf->hw.aq.asq_last_status);
1252 return -EIO;
1253 }
1254
1255 return 0;
1256}
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
1267 enum i40e_virtchnl_ops opcode,
1268 i40e_status retval)
1269{
1270 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1271}
1272
1273
1274
1275
1276
1277
1278
1279static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
1280{
1281 struct i40e_virtchnl_version_info info = {
1282 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
1283 };
1284
1285 vf->vf_ver = *(struct i40e_virtchnl_version_info *)msg;
1286
1287 if (VF_IS_V10(vf))
1288 info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
1289 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
1290 I40E_SUCCESS, (u8 *)&info,
1291 sizeof(struct
1292 i40e_virtchnl_version_info));
1293}
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
1304{
1305 struct i40e_virtchnl_vf_resource *vfres = NULL;
1306 struct i40e_pf *pf = vf->pf;
1307 i40e_status aq_ret = 0;
1308 struct i40e_vsi *vsi;
1309 int i = 0, len = 0;
1310 int num_vsis = 1;
1311 int ret;
1312
1313 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1314 aq_ret = I40E_ERR_PARAM;
1315 goto err;
1316 }
1317
1318 len = (sizeof(struct i40e_virtchnl_vf_resource) +
1319 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
1320
1321 vfres = kzalloc(len, GFP_KERNEL);
1322 if (!vfres) {
1323 aq_ret = I40E_ERR_NO_MEMORY;
1324 len = 0;
1325 goto err;
1326 }
1327 if (VF_IS_V11(vf))
1328 vf->driver_caps = *(u32 *)msg;
1329 else
1330 vf->driver_caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
1331 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
1332 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
1333
1334 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
1335 vsi = pf->vsi[vf->lan_vsi_idx];
1336 if (!vsi->info.pvid)
1337 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
1338
1339 if (i40e_vf_client_capable(pf, vf->vf_id, I40E_CLIENT_IWARP) &&
1340 (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_IWARP)) {
1341 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_IWARP;
1342 set_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states);
1343 }
1344
1345 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
1346 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ)
1347 vfres->vf_offload_flags |=
1348 I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ;
1349 } else {
1350 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
1351 }
1352
1353 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
1354 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
1355 vfres->vf_offload_flags |=
1356 I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
1357 }
1358
1359 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING)
1360 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
1361
1362 if (pf->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) {
1363 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
1364 vfres->vf_offload_flags |=
1365 I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
1366 }
1367
1368 vfres->num_vsis = num_vsis;
1369 vfres->num_queue_pairs = vf->num_queue_pairs;
1370 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
1371 if (vf->lan_vsi_idx) {
1372 vfres->vsi_res[i].vsi_id = vf->lan_vsi_id;
1373 vfres->vsi_res[i].vsi_type = I40E_VSI_SRIOV;
1374 vfres->vsi_res[i].num_queue_pairs = vsi->alloc_queue_pairs;
1375
1376 vfres->vsi_res[i].qset_handle
1377 = le16_to_cpu(vsi->info.qs_handle[0]);
1378 ether_addr_copy(vfres->vsi_res[i].default_mac_addr,
1379 vf->default_lan_addr.addr);
1380 i++;
1381 }
1382 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
1383
1384err:
1385
1386 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1387 aq_ret, (u8 *)vfres, len);
1388
1389 kfree(vfres);
1390 return ret;
1391}
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
1404{
1405 if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1406 i40e_reset_vf(vf, false);
1407}
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1419 u8 *msg, u16 msglen)
1420{
1421 struct i40e_virtchnl_promisc_info *info =
1422 (struct i40e_virtchnl_promisc_info *)msg;
1423 struct i40e_pf *pf = vf->pf;
1424 struct i40e_hw *hw = &pf->hw;
1425 struct i40e_vsi *vsi;
1426 bool allmulti = false;
1427 i40e_status aq_ret;
1428
1429 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
1430 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1431 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1432 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1433 (vsi->type != I40E_VSI_FCOE)) {
1434 aq_ret = I40E_ERR_PARAM;
1435 goto error_param;
1436 }
1437 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1438 allmulti = true;
1439 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
1440 allmulti, NULL);
1441
1442error_param:
1443
1444 return i40e_vc_send_resp_to_vf(vf,
1445 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1446 aq_ret);
1447}
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1459{
1460 struct i40e_virtchnl_vsi_queue_config_info *qci =
1461 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1462 struct i40e_virtchnl_queue_pair_info *qpi;
1463 struct i40e_pf *pf = vf->pf;
1464 u16 vsi_id, vsi_queue_id;
1465 i40e_status aq_ret = 0;
1466 int i;
1467
1468 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1469 aq_ret = I40E_ERR_PARAM;
1470 goto error_param;
1471 }
1472
1473 vsi_id = qci->vsi_id;
1474 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1475 aq_ret = I40E_ERR_PARAM;
1476 goto error_param;
1477 }
1478 for (i = 0; i < qci->num_queue_pairs; i++) {
1479 qpi = &qci->qpair[i];
1480 vsi_queue_id = qpi->txq.queue_id;
1481 if ((qpi->txq.vsi_id != vsi_id) ||
1482 (qpi->rxq.vsi_id != vsi_id) ||
1483 (qpi->rxq.queue_id != vsi_queue_id) ||
1484 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1485 aq_ret = I40E_ERR_PARAM;
1486 goto error_param;
1487 }
1488
1489 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1490 &qpi->rxq) ||
1491 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1492 &qpi->txq)) {
1493 aq_ret = I40E_ERR_PARAM;
1494 goto error_param;
1495 }
1496 }
1497
1498 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs;
1499
1500error_param:
1501
1502 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1503 aq_ret);
1504}
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1516{
1517 struct i40e_virtchnl_irq_map_info *irqmap_info =
1518 (struct i40e_virtchnl_irq_map_info *)msg;
1519 struct i40e_virtchnl_vector_map *map;
1520 u16 vsi_id, vsi_queue_id, vector_id;
1521 i40e_status aq_ret = 0;
1522 unsigned long tempmap;
1523 int i;
1524
1525 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1526 aq_ret = I40E_ERR_PARAM;
1527 goto error_param;
1528 }
1529
1530 for (i = 0; i < irqmap_info->num_vectors; i++) {
1531 map = &irqmap_info->vecmap[i];
1532
1533 vector_id = map->vector_id;
1534 vsi_id = map->vsi_id;
1535
1536 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1537 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1538 aq_ret = I40E_ERR_PARAM;
1539 goto error_param;
1540 }
1541
1542
1543 tempmap = map->rxq_map;
1544 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
1545 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1546 vsi_queue_id)) {
1547 aq_ret = I40E_ERR_PARAM;
1548 goto error_param;
1549 }
1550 }
1551
1552 tempmap = map->txq_map;
1553 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
1554 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1555 vsi_queue_id)) {
1556 aq_ret = I40E_ERR_PARAM;
1557 goto error_param;
1558 }
1559 }
1560
1561 i40e_config_irq_link_list(vf, vsi_id, map);
1562 }
1563error_param:
1564
1565 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1566 aq_ret);
1567}
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1578{
1579 struct i40e_virtchnl_queue_select *vqs =
1580 (struct i40e_virtchnl_queue_select *)msg;
1581 struct i40e_pf *pf = vf->pf;
1582 u16 vsi_id = vqs->vsi_id;
1583 i40e_status aq_ret = 0;
1584
1585 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1586 aq_ret = I40E_ERR_PARAM;
1587 goto error_param;
1588 }
1589
1590 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1591 aq_ret = I40E_ERR_PARAM;
1592 goto error_param;
1593 }
1594
1595 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1596 aq_ret = I40E_ERR_PARAM;
1597 goto error_param;
1598 }
1599
1600 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], true))
1601 aq_ret = I40E_ERR_TIMEOUT;
1602error_param:
1603
1604 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1605 aq_ret);
1606}
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1618{
1619 struct i40e_virtchnl_queue_select *vqs =
1620 (struct i40e_virtchnl_queue_select *)msg;
1621 struct i40e_pf *pf = vf->pf;
1622 i40e_status aq_ret = 0;
1623
1624 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1625 aq_ret = I40E_ERR_PARAM;
1626 goto error_param;
1627 }
1628
1629 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1630 aq_ret = I40E_ERR_PARAM;
1631 goto error_param;
1632 }
1633
1634 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1635 aq_ret = I40E_ERR_PARAM;
1636 goto error_param;
1637 }
1638
1639 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false))
1640 aq_ret = I40E_ERR_TIMEOUT;
1641
1642error_param:
1643
1644 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1645 aq_ret);
1646}
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1657{
1658 struct i40e_virtchnl_queue_select *vqs =
1659 (struct i40e_virtchnl_queue_select *)msg;
1660 struct i40e_pf *pf = vf->pf;
1661 struct i40e_eth_stats stats;
1662 i40e_status aq_ret = 0;
1663 struct i40e_vsi *vsi;
1664
1665 memset(&stats, 0, sizeof(struct i40e_eth_stats));
1666
1667 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1668 aq_ret = I40E_ERR_PARAM;
1669 goto error_param;
1670 }
1671
1672 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1673 aq_ret = I40E_ERR_PARAM;
1674 goto error_param;
1675 }
1676
1677 vsi = pf->vsi[vf->lan_vsi_idx];
1678 if (!vsi) {
1679 aq_ret = I40E_ERR_PARAM;
1680 goto error_param;
1681 }
1682 i40e_update_eth_stats(vsi);
1683 stats = vsi->eth_stats;
1684
1685error_param:
1686
1687 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
1688 (u8 *)&stats, sizeof(stats));
1689}
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
1702{
1703 struct i40e_pf *pf = vf->pf;
1704 int ret = 0;
1705
1706 if (is_broadcast_ether_addr(macaddr) ||
1707 is_zero_ether_addr(macaddr)) {
1708 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
1709 ret = I40E_ERR_INVALID_MAC_ADDR;
1710 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
1711 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
1712
1713
1714
1715
1716
1717
1718 dev_err(&pf->pdev->dev,
1719 "VF attempting to override administratively set MAC address\nPlease reload the VF driver to resume normal operation\n");
1720 ret = -EPERM;
1721 }
1722 return ret;
1723}
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1734{
1735 struct i40e_virtchnl_ether_addr_list *al =
1736 (struct i40e_virtchnl_ether_addr_list *)msg;
1737 struct i40e_pf *pf = vf->pf;
1738 struct i40e_vsi *vsi = NULL;
1739 u16 vsi_id = al->vsi_id;
1740 i40e_status ret = 0;
1741 int i;
1742
1743 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1744 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1745 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1746 ret = I40E_ERR_PARAM;
1747 goto error_param;
1748 }
1749
1750 for (i = 0; i < al->num_elements; i++) {
1751 ret = i40e_check_vf_permission(vf, al->list[i].addr);
1752 if (ret)
1753 goto error_param;
1754 }
1755 vsi = pf->vsi[vf->lan_vsi_idx];
1756
1757
1758
1759
1760 spin_lock_bh(&vsi->mac_filter_list_lock);
1761
1762
1763 for (i = 0; i < al->num_elements; i++) {
1764 struct i40e_mac_filter *f;
1765
1766 f = i40e_find_mac(vsi, al->list[i].addr, true, false);
1767 if (!f) {
1768 if (i40e_is_vsi_in_vlan(vsi))
1769 f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
1770 true, false);
1771 else
1772 f = i40e_add_filter(vsi, al->list[i].addr, -1,
1773 true, false);
1774 }
1775
1776 if (!f) {
1777 dev_err(&pf->pdev->dev,
1778 "Unable to add MAC filter %pM for VF %d\n",
1779 al->list[i].addr, vf->vf_id);
1780 ret = I40E_ERR_PARAM;
1781 spin_unlock_bh(&vsi->mac_filter_list_lock);
1782 goto error_param;
1783 }
1784 }
1785 spin_unlock_bh(&vsi->mac_filter_list_lock);
1786
1787
1788 ret = i40e_sync_vsi_filters(vsi);
1789 if (ret)
1790 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
1791 vf->vf_id, ret);
1792
1793error_param:
1794
1795 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
1796 ret);
1797}
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1808{
1809 struct i40e_virtchnl_ether_addr_list *al =
1810 (struct i40e_virtchnl_ether_addr_list *)msg;
1811 struct i40e_pf *pf = vf->pf;
1812 struct i40e_vsi *vsi = NULL;
1813 u16 vsi_id = al->vsi_id;
1814 i40e_status ret = 0;
1815 int i;
1816
1817 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1818 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1819 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1820 ret = I40E_ERR_PARAM;
1821 goto error_param;
1822 }
1823
1824 for (i = 0; i < al->num_elements; i++) {
1825 if (is_broadcast_ether_addr(al->list[i].addr) ||
1826 is_zero_ether_addr(al->list[i].addr)) {
1827 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
1828 al->list[i].addr, vf->vf_id);
1829 ret = I40E_ERR_INVALID_MAC_ADDR;
1830 goto error_param;
1831 }
1832 }
1833 vsi = pf->vsi[vf->lan_vsi_idx];
1834
1835 spin_lock_bh(&vsi->mac_filter_list_lock);
1836
1837 for (i = 0; i < al->num_elements; i++)
1838 if (i40e_del_mac_all_vlan(vsi, al->list[i].addr, true, false)) {
1839 ret = I40E_ERR_INVALID_MAC_ADDR;
1840 spin_unlock_bh(&vsi->mac_filter_list_lock);
1841 goto error_param;
1842 }
1843
1844 spin_unlock_bh(&vsi->mac_filter_list_lock);
1845
1846
1847 ret = i40e_sync_vsi_filters(vsi);
1848 if (ret)
1849 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
1850 vf->vf_id, ret);
1851
1852error_param:
1853
1854 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
1855 ret);
1856}
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1867{
1868 struct i40e_virtchnl_vlan_filter_list *vfl =
1869 (struct i40e_virtchnl_vlan_filter_list *)msg;
1870 struct i40e_pf *pf = vf->pf;
1871 struct i40e_vsi *vsi = NULL;
1872 u16 vsi_id = vfl->vsi_id;
1873 i40e_status aq_ret = 0;
1874 int i;
1875
1876 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1877 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1878 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1879 aq_ret = I40E_ERR_PARAM;
1880 goto error_param;
1881 }
1882
1883 for (i = 0; i < vfl->num_elements; i++) {
1884 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1885 aq_ret = I40E_ERR_PARAM;
1886 dev_err(&pf->pdev->dev,
1887 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
1888 goto error_param;
1889 }
1890 }
1891 vsi = pf->vsi[vf->lan_vsi_idx];
1892 if (vsi->info.pvid) {
1893 aq_ret = I40E_ERR_PARAM;
1894 goto error_param;
1895 }
1896
1897 i40e_vlan_stripping_enable(vsi);
1898 for (i = 0; i < vfl->num_elements; i++) {
1899
1900 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
1901
1902 if (ret)
1903 dev_err(&pf->pdev->dev,
1904 "Unable to add VLAN filter %d for VF %d, error %d\n",
1905 vfl->vlan_id[i], vf->vf_id, ret);
1906 }
1907
1908error_param:
1909
1910 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
1911}
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1922{
1923 struct i40e_virtchnl_vlan_filter_list *vfl =
1924 (struct i40e_virtchnl_vlan_filter_list *)msg;
1925 struct i40e_pf *pf = vf->pf;
1926 struct i40e_vsi *vsi = NULL;
1927 u16 vsi_id = vfl->vsi_id;
1928 i40e_status aq_ret = 0;
1929 int i;
1930
1931 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1932 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1933 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1934 aq_ret = I40E_ERR_PARAM;
1935 goto error_param;
1936 }
1937
1938 for (i = 0; i < vfl->num_elements; i++) {
1939 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1940 aq_ret = I40E_ERR_PARAM;
1941 goto error_param;
1942 }
1943 }
1944
1945 vsi = pf->vsi[vf->lan_vsi_idx];
1946 if (vsi->info.pvid) {
1947 aq_ret = I40E_ERR_PARAM;
1948 goto error_param;
1949 }
1950
1951 for (i = 0; i < vfl->num_elements; i++) {
1952 int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
1953
1954 if (ret)
1955 dev_err(&pf->pdev->dev,
1956 "Unable to delete VLAN filter %d for VF %d, error %d\n",
1957 vfl->vlan_id[i], vf->vf_id, ret);
1958 }
1959
1960error_param:
1961
1962 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
1963}
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1974{
1975 struct i40e_pf *pf = vf->pf;
1976 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
1977 i40e_status aq_ret = 0;
1978
1979 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1980 !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) {
1981 aq_ret = I40E_ERR_PARAM;
1982 goto error_param;
1983 }
1984
1985 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
1986 msg, msglen);
1987
1988error_param:
1989
1990 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_IWARP,
1991 aq_ret);
1992}
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
2004 bool config)
2005{
2006 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info =
2007 (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
2008 i40e_status aq_ret = 0;
2009
2010 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
2011 !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) {
2012 aq_ret = I40E_ERR_PARAM;
2013 goto error_param;
2014 }
2015
2016 if (config) {
2017 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2018 aq_ret = I40E_ERR_PARAM;
2019 } else {
2020 i40e_release_iwarp_qvlist(vf);
2021 }
2022
2023error_param:
2024
2025 return i40e_vc_send_resp_to_vf(vf,
2026 config ? I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP :
2027 I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP,
2028 aq_ret);
2029}
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
2041 u32 v_retval, u8 *msg, u16 msglen)
2042{
2043 bool err_msg_format = false;
2044 int valid_len;
2045
2046
2047 if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
2048 return I40E_ERR_PARAM;
2049
2050
2051 switch (v_opcode) {
2052 case I40E_VIRTCHNL_OP_VERSION:
2053 valid_len = sizeof(struct i40e_virtchnl_version_info);
2054 break;
2055 case I40E_VIRTCHNL_OP_RESET_VF:
2056 valid_len = 0;
2057 break;
2058 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
2059 if (VF_IS_V11(vf))
2060 valid_len = sizeof(u32);
2061 else
2062 valid_len = 0;
2063 break;
2064 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
2065 valid_len = sizeof(struct i40e_virtchnl_txq_info);
2066 break;
2067 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
2068 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
2069 break;
2070 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
2071 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
2072 if (msglen >= valid_len) {
2073 struct i40e_virtchnl_vsi_queue_config_info *vqc =
2074 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
2075 valid_len += (vqc->num_queue_pairs *
2076 sizeof(struct
2077 i40e_virtchnl_queue_pair_info));
2078 if (vqc->num_queue_pairs == 0)
2079 err_msg_format = true;
2080 }
2081 break;
2082 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
2083 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
2084 if (msglen >= valid_len) {
2085 struct i40e_virtchnl_irq_map_info *vimi =
2086 (struct i40e_virtchnl_irq_map_info *)msg;
2087 valid_len += (vimi->num_vectors *
2088 sizeof(struct i40e_virtchnl_vector_map));
2089 if (vimi->num_vectors == 0)
2090 err_msg_format = true;
2091 }
2092 break;
2093 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
2094 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
2095 valid_len = sizeof(struct i40e_virtchnl_queue_select);
2096 break;
2097 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
2098 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
2099 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
2100 if (msglen >= valid_len) {
2101 struct i40e_virtchnl_ether_addr_list *veal =
2102 (struct i40e_virtchnl_ether_addr_list *)msg;
2103 valid_len += veal->num_elements *
2104 sizeof(struct i40e_virtchnl_ether_addr);
2105 if (veal->num_elements == 0)
2106 err_msg_format = true;
2107 }
2108 break;
2109 case I40E_VIRTCHNL_OP_ADD_VLAN:
2110 case I40E_VIRTCHNL_OP_DEL_VLAN:
2111 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
2112 if (msglen >= valid_len) {
2113 struct i40e_virtchnl_vlan_filter_list *vfl =
2114 (struct i40e_virtchnl_vlan_filter_list *)msg;
2115 valid_len += vfl->num_elements * sizeof(u16);
2116 if (vfl->num_elements == 0)
2117 err_msg_format = true;
2118 }
2119 break;
2120 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
2121 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
2122 break;
2123 case I40E_VIRTCHNL_OP_GET_STATS:
2124 valid_len = sizeof(struct i40e_virtchnl_queue_select);
2125 break;
2126 case I40E_VIRTCHNL_OP_IWARP:
2127
2128
2129
2130
2131 if (msglen)
2132 valid_len = msglen;
2133 else
2134 err_msg_format = true;
2135 break;
2136 case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
2137 valid_len = 0;
2138 break;
2139 case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
2140 valid_len = sizeof(struct i40e_virtchnl_iwarp_qvlist_info);
2141 if (msglen >= valid_len) {
2142 struct i40e_virtchnl_iwarp_qvlist_info *qv =
2143 (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
2144 if (qv->num_vectors == 0) {
2145 err_msg_format = true;
2146 break;
2147 }
2148 valid_len += ((qv->num_vectors - 1) *
2149 sizeof(struct i40e_virtchnl_iwarp_qv_info));
2150 }
2151 break;
2152
2153 case I40E_VIRTCHNL_OP_EVENT:
2154 case I40E_VIRTCHNL_OP_UNKNOWN:
2155 default:
2156 return -EPERM;
2157 }
2158
2159 if ((valid_len != msglen) || (err_msg_format)) {
2160 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
2161 return -EINVAL;
2162 } else {
2163 return 0;
2164 }
2165}
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode,
2179 u32 v_retval, u8 *msg, u16 msglen)
2180{
2181 struct i40e_hw *hw = &pf->hw;
2182 unsigned int local_vf_id = vf_id - hw->func_caps.vf_base_id;
2183 struct i40e_vf *vf;
2184 int ret;
2185
2186 pf->vf_aq_requests++;
2187 if (local_vf_id >= pf->num_alloc_vfs)
2188 return -EINVAL;
2189 vf = &(pf->vf[local_vf_id]);
2190
2191 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
2192
2193 if (ret) {
2194 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
2195 local_vf_id, v_opcode, msglen);
2196 return ret;
2197 }
2198
2199 switch (v_opcode) {
2200 case I40E_VIRTCHNL_OP_VERSION:
2201 ret = i40e_vc_get_version_msg(vf, msg);
2202 break;
2203 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
2204 ret = i40e_vc_get_vf_resources_msg(vf, msg);
2205 break;
2206 case I40E_VIRTCHNL_OP_RESET_VF:
2207 i40e_vc_reset_vf_msg(vf);
2208 ret = 0;
2209 break;
2210 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
2211 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
2212 break;
2213 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
2214 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
2215 break;
2216 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
2217 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
2218 break;
2219 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
2220 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
2221 i40e_vc_notify_vf_link_state(vf);
2222 break;
2223 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
2224 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
2225 break;
2226 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
2227 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
2228 break;
2229 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
2230 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
2231 break;
2232 case I40E_VIRTCHNL_OP_ADD_VLAN:
2233 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
2234 break;
2235 case I40E_VIRTCHNL_OP_DEL_VLAN:
2236 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
2237 break;
2238 case I40E_VIRTCHNL_OP_GET_STATS:
2239 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
2240 break;
2241 case I40E_VIRTCHNL_OP_IWARP:
2242 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
2243 break;
2244 case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
2245 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
2246 break;
2247 case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
2248 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
2249 break;
2250 case I40E_VIRTCHNL_OP_UNKNOWN:
2251 default:
2252 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
2253 v_opcode, local_vf_id);
2254 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
2255 I40E_ERR_NOT_IMPLEMENTED);
2256 break;
2257 }
2258
2259 return ret;
2260}
2261
2262
2263
2264
2265
2266
2267
2268
2269int i40e_vc_process_vflr_event(struct i40e_pf *pf)
2270{
2271 u32 reg, reg_idx, bit_idx, vf_id;
2272 struct i40e_hw *hw = &pf->hw;
2273 struct i40e_vf *vf;
2274
2275 if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
2276 return 0;
2277
2278
2279
2280
2281
2282
2283 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
2284 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
2285 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
2286 i40e_flush(hw);
2287
2288 clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2289 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
2290 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
2291 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
2292
2293 vf = &pf->vf[vf_id];
2294 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
2295 if (reg & BIT(bit_idx)) {
2296
2297 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
2298
2299 if (!test_bit(__I40E_DOWN, &pf->state))
2300 i40e_reset_vf(vf, true);
2301 }
2302 }
2303
2304 return 0;
2305}
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2316{
2317 struct i40e_netdev_priv *np = netdev_priv(netdev);
2318 struct i40e_vsi *vsi = np->vsi;
2319 struct i40e_pf *pf = vsi->back;
2320 struct i40e_mac_filter *f;
2321 struct i40e_vf *vf;
2322 int ret = 0;
2323
2324
2325 if (vf_id >= pf->num_alloc_vfs) {
2326 dev_err(&pf->pdev->dev,
2327 "Invalid VF Identifier %d\n", vf_id);
2328 ret = -EINVAL;
2329 goto error_param;
2330 }
2331
2332 vf = &(pf->vf[vf_id]);
2333 vsi = pf->vsi[vf->lan_vsi_idx];
2334 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2335 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2336 vf_id);
2337 ret = -EAGAIN;
2338 goto error_param;
2339 }
2340
2341 if (is_multicast_ether_addr(mac)) {
2342 dev_err(&pf->pdev->dev,
2343 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
2344 ret = -EINVAL;
2345 goto error_param;
2346 }
2347
2348
2349
2350
2351 spin_lock_bh(&vsi->mac_filter_list_lock);
2352
2353
2354 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
2355 i40e_del_filter(vsi, vf->default_lan_addr.addr,
2356 vf->port_vlan_id ? vf->port_vlan_id : -1,
2357 true, false);
2358
2359
2360
2361
2362 list_for_each_entry(f, &vsi->mac_filter_list, list)
2363 i40e_del_filter(vsi, f->macaddr, f->vlan, true, false);
2364
2365 spin_unlock_bh(&vsi->mac_filter_list_lock);
2366
2367 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
2368
2369 if (i40e_sync_vsi_filters(vsi)) {
2370 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
2371 ret = -EIO;
2372 goto error_param;
2373 }
2374 ether_addr_copy(vf->default_lan_addr.addr, mac);
2375 vf->pf_set_mac = true;
2376
2377 i40e_vc_disable_vf(pf, vf);
2378 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
2379
2380error_param:
2381 return ret;
2382}
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
2394 int vf_id, u16 vlan_id, u8 qos)
2395{
2396 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
2397 struct i40e_netdev_priv *np = netdev_priv(netdev);
2398 struct i40e_pf *pf = np->vsi->back;
2399 bool is_vsi_in_vlan = false;
2400 struct i40e_vsi *vsi;
2401 struct i40e_vf *vf;
2402 int ret = 0;
2403
2404
2405 if (vf_id >= pf->num_alloc_vfs) {
2406 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2407 ret = -EINVAL;
2408 goto error_pvid;
2409 }
2410
2411 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
2412 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
2413 ret = -EINVAL;
2414 goto error_pvid;
2415 }
2416
2417 vf = &(pf->vf[vf_id]);
2418 vsi = pf->vsi[vf->lan_vsi_idx];
2419 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2420 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2421 vf_id);
2422 ret = -EAGAIN;
2423 goto error_pvid;
2424 }
2425
2426 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
2427
2428 goto error_pvid;
2429
2430 spin_lock_bh(&vsi->mac_filter_list_lock);
2431 is_vsi_in_vlan = i40e_is_vsi_in_vlan(vsi);
2432 spin_unlock_bh(&vsi->mac_filter_list_lock);
2433
2434 if (le16_to_cpu(vsi->info.pvid) == 0 && is_vsi_in_vlan) {
2435 dev_err(&pf->pdev->dev,
2436 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
2437 vf_id);
2438
2439
2440
2441
2442 i40e_vc_disable_vf(pf, vf);
2443
2444 vsi = pf->vsi[vf->lan_vsi_idx];
2445 }
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455 if ((!(vlan_id || qos) ||
2456 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
2457 vsi->info.pvid)
2458 ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY);
2459
2460 if (vsi->info.pvid) {
2461
2462 ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
2463 VLAN_VID_MASK));
2464 if (ret) {
2465 dev_info(&vsi->back->pdev->dev,
2466 "remove VLAN failed, ret=%d, aq_err=%d\n",
2467 ret, pf->hw.aq.asq_last_status);
2468 }
2469 }
2470 if (vlan_id || qos)
2471 ret = i40e_vsi_add_pvid(vsi, vlanprio);
2472 else
2473 i40e_vsi_remove_pvid(vsi);
2474
2475 if (vlan_id) {
2476 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
2477 vlan_id, qos, vf_id);
2478
2479
2480 ret = i40e_vsi_add_vlan(vsi, vlan_id);
2481 if (ret) {
2482 dev_info(&vsi->back->pdev->dev,
2483 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
2484 vsi->back->hw.aq.asq_last_status);
2485 goto error_pvid;
2486 }
2487
2488
2489
2490 i40e_vsi_kill_vlan(vsi, I40E_VLAN_ANY);
2491 }
2492
2493 if (ret) {
2494 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
2495 goto error_pvid;
2496 }
2497
2498
2499
2500 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
2501 ret = 0;
2502
2503error_pvid:
2504 return ret;
2505}
2506
2507#define I40E_BW_CREDIT_DIVISOR 50
2508#define I40E_MAX_BW_INACTIVE_ACCUM 4
2509
2510
2511
2512
2513
2514
2515
2516
2517int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
2518 int max_tx_rate)
2519{
2520 struct i40e_netdev_priv *np = netdev_priv(netdev);
2521 struct i40e_pf *pf = np->vsi->back;
2522 struct i40e_vsi *vsi;
2523 struct i40e_vf *vf;
2524 int speed = 0;
2525 int ret = 0;
2526
2527
2528 if (vf_id >= pf->num_alloc_vfs) {
2529 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
2530 ret = -EINVAL;
2531 goto error;
2532 }
2533
2534 if (min_tx_rate) {
2535 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
2536 min_tx_rate, vf_id);
2537 return -EINVAL;
2538 }
2539
2540 vf = &(pf->vf[vf_id]);
2541 vsi = pf->vsi[vf->lan_vsi_idx];
2542 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2543 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2544 vf_id);
2545 ret = -EAGAIN;
2546 goto error;
2547 }
2548
2549 switch (pf->hw.phy.link_info.link_speed) {
2550 case I40E_LINK_SPEED_40GB:
2551 speed = 40000;
2552 break;
2553 case I40E_LINK_SPEED_20GB:
2554 speed = 20000;
2555 break;
2556 case I40E_LINK_SPEED_10GB:
2557 speed = 10000;
2558 break;
2559 case I40E_LINK_SPEED_1GB:
2560 speed = 1000;
2561 break;
2562 default:
2563 break;
2564 }
2565
2566 if (max_tx_rate > speed) {
2567 dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.",
2568 max_tx_rate, vf->vf_id);
2569 ret = -EINVAL;
2570 goto error;
2571 }
2572
2573 if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
2574 dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
2575 max_tx_rate = 50;
2576 }
2577
2578
2579 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
2580 max_tx_rate / I40E_BW_CREDIT_DIVISOR,
2581 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
2582 if (ret) {
2583 dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
2584 ret);
2585 ret = -EIO;
2586 goto error;
2587 }
2588 vf->tx_rate = max_tx_rate;
2589error:
2590 return ret;
2591}
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601int i40e_ndo_get_vf_config(struct net_device *netdev,
2602 int vf_id, struct ifla_vf_info *ivi)
2603{
2604 struct i40e_netdev_priv *np = netdev_priv(netdev);
2605 struct i40e_vsi *vsi = np->vsi;
2606 struct i40e_pf *pf = vsi->back;
2607 struct i40e_vf *vf;
2608 int ret = 0;
2609
2610
2611 if (vf_id >= pf->num_alloc_vfs) {
2612 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2613 ret = -EINVAL;
2614 goto error_param;
2615 }
2616
2617 vf = &(pf->vf[vf_id]);
2618
2619 vsi = pf->vsi[vf->lan_vsi_idx];
2620 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2621 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2622 vf_id);
2623 ret = -EAGAIN;
2624 goto error_param;
2625 }
2626
2627 ivi->vf = vf_id;
2628
2629 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
2630
2631 ivi->max_tx_rate = vf->tx_rate;
2632 ivi->min_tx_rate = 0;
2633 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2634 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2635 I40E_VLAN_PRIORITY_SHIFT;
2636 if (vf->link_forced == false)
2637 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
2638 else if (vf->link_up == true)
2639 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
2640 else
2641 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
2642 ivi->spoofchk = vf->spoofchk;
2643 ret = 0;
2644
2645error_param:
2646 return ret;
2647}
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
2658{
2659 struct i40e_netdev_priv *np = netdev_priv(netdev);
2660 struct i40e_pf *pf = np->vsi->back;
2661 struct i40e_virtchnl_pf_event pfe;
2662 struct i40e_hw *hw = &pf->hw;
2663 struct i40e_vf *vf;
2664 int abs_vf_id;
2665 int ret = 0;
2666
2667
2668 if (vf_id >= pf->num_alloc_vfs) {
2669 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2670 ret = -EINVAL;
2671 goto error_out;
2672 }
2673
2674 vf = &pf->vf[vf_id];
2675 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
2676
2677 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
2678 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
2679
2680 switch (link) {
2681 case IFLA_VF_LINK_STATE_AUTO:
2682 vf->link_forced = false;
2683 pfe.event_data.link_event.link_status =
2684 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
2685 pfe.event_data.link_event.link_speed =
2686 pf->hw.phy.link_info.link_speed;
2687 break;
2688 case IFLA_VF_LINK_STATE_ENABLE:
2689 vf->link_forced = true;
2690 vf->link_up = true;
2691 pfe.event_data.link_event.link_status = true;
2692 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
2693 break;
2694 case IFLA_VF_LINK_STATE_DISABLE:
2695 vf->link_forced = true;
2696 vf->link_up = false;
2697 pfe.event_data.link_event.link_status = false;
2698 pfe.event_data.link_event.link_speed = 0;
2699 break;
2700 default:
2701 ret = -EINVAL;
2702 goto error_out;
2703 }
2704
2705 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
2706 0, (u8 *)&pfe, sizeof(pfe), NULL);
2707
2708error_out:
2709 return ret;
2710}
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
2721{
2722 struct i40e_netdev_priv *np = netdev_priv(netdev);
2723 struct i40e_vsi *vsi = np->vsi;
2724 struct i40e_pf *pf = vsi->back;
2725 struct i40e_vsi_context ctxt;
2726 struct i40e_hw *hw = &pf->hw;
2727 struct i40e_vf *vf;
2728 int ret = 0;
2729
2730
2731 if (vf_id >= pf->num_alloc_vfs) {
2732 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2733 ret = -EINVAL;
2734 goto out;
2735 }
2736
2737 vf = &(pf->vf[vf_id]);
2738 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2739 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2740 vf_id);
2741 ret = -EAGAIN;
2742 goto out;
2743 }
2744
2745 if (enable == vf->spoofchk)
2746 goto out;
2747
2748 vf->spoofchk = enable;
2749 memset(&ctxt, 0, sizeof(ctxt));
2750 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
2751 ctxt.pf_num = pf->hw.pf_id;
2752 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
2753 if (enable)
2754 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
2755 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
2756 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
2757 if (ret) {
2758 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
2759 ret);
2760 ret = -EIO;
2761 }
2762out:
2763 return ret;
2764}
2765
