linux/drivers/net/wireless/ath/ath9k/main.c
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   1/*
   2 * Copyright (c) 2008-2011 Atheros Communications Inc.
   3 *
   4 * Permission to use, copy, modify, and/or distribute this software for any
   5 * purpose with or without fee is hereby granted, provided that the above
   6 * copyright notice and this permission notice appear in all copies.
   7 *
   8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15 */
  16
  17#include <linux/nl80211.h>
  18#include <linux/delay.h>
  19#include "ath9k.h"
  20#include "btcoex.h"
  21
  22u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23{
  24        /*
  25         * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26         *   0 for no restriction
  27         *   1 for 1/4 us
  28         *   2 for 1/2 us
  29         *   3 for 1 us
  30         *   4 for 2 us
  31         *   5 for 4 us
  32         *   6 for 8 us
  33         *   7 for 16 us
  34         */
  35        switch (mpdudensity) {
  36        case 0:
  37                return 0;
  38        case 1:
  39        case 2:
  40        case 3:
  41                /* Our lower layer calculations limit our precision to
  42                   1 microsecond */
  43                return 1;
  44        case 4:
  45                return 2;
  46        case 5:
  47                return 4;
  48        case 6:
  49                return 8;
  50        case 7:
  51                return 16;
  52        default:
  53                return 0;
  54        }
  55}
  56
  57static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                     bool sw_pending)
  59{
  60        bool pending = false;
  61
  62        spin_lock_bh(&txq->axq_lock);
  63
  64        if (txq->axq_depth) {
  65                pending = true;
  66                goto out;
  67        }
  68
  69        if (!sw_pending)
  70                goto out;
  71
  72        if (txq->mac80211_qnum >= 0) {
  73                struct list_head *list;
  74
  75                list = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                if (!list_empty(list))
  77                        pending = true;
  78        }
  79out:
  80        spin_unlock_bh(&txq->axq_lock);
  81        return pending;
  82}
  83
  84static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85{
  86        unsigned long flags;
  87        bool ret;
  88
  89        spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90        ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93        return ret;
  94}
  95
  96void ath_ps_full_sleep(unsigned long data)
  97{
  98        struct ath_softc *sc = (struct ath_softc *) data;
  99        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100        bool reset;
 101
 102        spin_lock(&common->cc_lock);
 103        ath_hw_cycle_counters_update(common);
 104        spin_unlock(&common->cc_lock);
 105
 106        ath9k_hw_setrxabort(sc->sc_ah, 1);
 107        ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109        ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110}
 111
 112void ath9k_ps_wakeup(struct ath_softc *sc)
 113{
 114        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115        unsigned long flags;
 116        enum ath9k_power_mode power_mode;
 117
 118        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119        if (++sc->ps_usecount != 1)
 120                goto unlock;
 121
 122        del_timer_sync(&sc->sleep_timer);
 123        power_mode = sc->sc_ah->power_mode;
 124        ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126        /*
 127         * While the hardware is asleep, the cycle counters contain no
 128         * useful data. Better clear them now so that they don't mess up
 129         * survey data results.
 130         */
 131        if (power_mode != ATH9K_PM_AWAKE) {
 132                spin_lock(&common->cc_lock);
 133                ath_hw_cycle_counters_update(common);
 134                memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                spin_unlock(&common->cc_lock);
 137        }
 138
 139 unlock:
 140        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141}
 142
 143void ath9k_ps_restore(struct ath_softc *sc)
 144{
 145        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146        enum ath9k_power_mode mode;
 147        unsigned long flags;
 148
 149        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150        if (--sc->ps_usecount != 0)
 151                goto unlock;
 152
 153        if (sc->ps_idle) {
 154                mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                goto unlock;
 156        }
 157
 158        if (sc->ps_enabled &&
 159                   !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                     PS_WAIT_FOR_CAB |
 161                                     PS_WAIT_FOR_PSPOLL_DATA |
 162                                     PS_WAIT_FOR_TX_ACK |
 163                                     PS_WAIT_FOR_ANI))) {
 164                mode = ATH9K_PM_NETWORK_SLEEP;
 165                if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                        ath9k_btcoex_stop_gen_timer(sc);
 167        } else {
 168                goto unlock;
 169        }
 170
 171        spin_lock(&common->cc_lock);
 172        ath_hw_cycle_counters_update(common);
 173        spin_unlock(&common->cc_lock);
 174
 175        ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177 unlock:
 178        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179}
 180
 181static void __ath_cancel_work(struct ath_softc *sc)
 182{
 183        cancel_work_sync(&sc->paprd_work);
 184        cancel_delayed_work_sync(&sc->tx_complete_work);
 185        cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                cancel_work_sync(&sc->mci_work);
 190#endif
 191}
 192
 193void ath_cancel_work(struct ath_softc *sc)
 194{
 195        __ath_cancel_work(sc);
 196        cancel_work_sync(&sc->hw_reset_work);
 197}
 198
 199void ath_restart_work(struct ath_softc *sc)
 200{
 201        ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 202
 203        if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 204                ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 205                                     msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 206
 207        ath_start_ani(sc);
 208}
 209
 210static bool ath_prepare_reset(struct ath_softc *sc)
 211{
 212        struct ath_hw *ah = sc->sc_ah;
 213        bool ret = true;
 214
 215        ieee80211_stop_queues(sc->hw);
 216        ath_stop_ani(sc);
 217        ath9k_hw_disable_interrupts(ah);
 218
 219        if (AR_SREV_9300_20_OR_LATER(ah)) {
 220                ret &= ath_stoprecv(sc);
 221                ret &= ath_drain_all_txq(sc);
 222        } else {
 223                ret &= ath_drain_all_txq(sc);
 224                ret &= ath_stoprecv(sc);
 225        }
 226
 227        return ret;
 228}
 229
 230static bool ath_complete_reset(struct ath_softc *sc, bool start)
 231{
 232        struct ath_hw *ah = sc->sc_ah;
 233        struct ath_common *common = ath9k_hw_common(ah);
 234        unsigned long flags;
 235
 236        ath9k_calculate_summary_state(sc, sc->cur_chan);
 237        ath_startrecv(sc);
 238        ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 239                               sc->cur_chan->txpower,
 240                               &sc->cur_chan->cur_txpower);
 241        clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 242
 243        if (!sc->cur_chan->offchannel && start) {
 244                /* restore per chanctx TSF timer */
 245                if (sc->cur_chan->tsf_val) {
 246                        u32 offset;
 247
 248                        offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 249                                                         NULL);
 250                        ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 251                }
 252
 253
 254                if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 255                        goto work;
 256
 257                if (ah->opmode == NL80211_IFTYPE_STATION &&
 258                    test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 259                        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 260                        sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 261                        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 262                } else {
 263                        ath9k_set_beacon(sc);
 264                }
 265        work:
 266                ath_restart_work(sc);
 267                ath_txq_schedule_all(sc);
 268        }
 269
 270        sc->gtt_cnt = 0;
 271
 272        ath9k_hw_set_interrupts(ah);
 273        ath9k_hw_enable_interrupts(ah);
 274        ieee80211_wake_queues(sc->hw);
 275        ath9k_p2p_ps_timer(sc);
 276
 277        return true;
 278}
 279
 280static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 281{
 282        struct ath_hw *ah = sc->sc_ah;
 283        struct ath_common *common = ath9k_hw_common(ah);
 284        struct ath9k_hw_cal_data *caldata = NULL;
 285        bool fastcc = true;
 286        int r;
 287
 288        __ath_cancel_work(sc);
 289
 290        disable_irq(sc->irq);
 291        tasklet_disable(&sc->intr_tq);
 292        tasklet_disable(&sc->bcon_tasklet);
 293        spin_lock_bh(&sc->sc_pcu_lock);
 294
 295        if (!sc->cur_chan->offchannel) {
 296                fastcc = false;
 297                caldata = &sc->cur_chan->caldata;
 298        }
 299
 300        if (!hchan) {
 301                fastcc = false;
 302                hchan = ah->curchan;
 303        }
 304
 305        if (!ath_prepare_reset(sc))
 306                fastcc = false;
 307
 308        if (ath9k_is_chanctx_enabled())
 309                fastcc = false;
 310
 311        spin_lock_bh(&sc->chan_lock);
 312        sc->cur_chandef = sc->cur_chan->chandef;
 313        spin_unlock_bh(&sc->chan_lock);
 314
 315        ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 316                hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 317
 318        r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 319        if (r) {
 320                ath_err(common,
 321                        "Unable to reset channel, reset status %d\n", r);
 322
 323                ath9k_hw_enable_interrupts(ah);
 324                ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 325
 326                goto out;
 327        }
 328
 329        if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 330            sc->cur_chan->offchannel)
 331                ath9k_mci_set_txpower(sc, true, false);
 332
 333        if (!ath_complete_reset(sc, true))
 334                r = -EIO;
 335
 336out:
 337        enable_irq(sc->irq);
 338        spin_unlock_bh(&sc->sc_pcu_lock);
 339        tasklet_enable(&sc->bcon_tasklet);
 340        tasklet_enable(&sc->intr_tq);
 341
 342        return r;
 343}
 344
 345static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 346                            struct ieee80211_vif *vif)
 347{
 348        struct ath_node *an;
 349        an = (struct ath_node *)sta->drv_priv;
 350
 351        an->sc = sc;
 352        an->sta = sta;
 353        an->vif = vif;
 354        memset(&an->key_idx, 0, sizeof(an->key_idx));
 355
 356        ath_tx_node_init(sc, an);
 357
 358        ath_dynack_node_init(sc->sc_ah, an);
 359}
 360
 361static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 362{
 363        struct ath_node *an = (struct ath_node *)sta->drv_priv;
 364        ath_tx_node_cleanup(sc, an);
 365
 366        ath_dynack_node_deinit(sc->sc_ah, an);
 367}
 368
 369void ath9k_tasklet(unsigned long data)
 370{
 371        struct ath_softc *sc = (struct ath_softc *)data;
 372        struct ath_hw *ah = sc->sc_ah;
 373        struct ath_common *common = ath9k_hw_common(ah);
 374        enum ath_reset_type type;
 375        unsigned long flags;
 376        u32 status = sc->intrstatus;
 377        u32 rxmask;
 378
 379        ath9k_ps_wakeup(sc);
 380        spin_lock(&sc->sc_pcu_lock);
 381
 382        if (status & ATH9K_INT_FATAL) {
 383                type = RESET_TYPE_FATAL_INT;
 384                ath9k_queue_reset(sc, type);
 385
 386                /*
 387                 * Increment the ref. counter here so that
 388                 * interrupts are enabled in the reset routine.
 389                 */
 390                atomic_inc(&ah->intr_ref_cnt);
 391                ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 392                goto out;
 393        }
 394
 395        if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 396            (status & ATH9K_INT_BB_WATCHDOG)) {
 397                spin_lock(&common->cc_lock);
 398                ath_hw_cycle_counters_update(common);
 399                ar9003_hw_bb_watchdog_dbg_info(ah);
 400                spin_unlock(&common->cc_lock);
 401
 402                if (ar9003_hw_bb_watchdog_check(ah)) {
 403                        type = RESET_TYPE_BB_WATCHDOG;
 404                        ath9k_queue_reset(sc, type);
 405
 406                        /*
 407                         * Increment the ref. counter here so that
 408                         * interrupts are enabled in the reset routine.
 409                         */
 410                        atomic_inc(&ah->intr_ref_cnt);
 411                        ath_dbg(common, RESET,
 412                                "BB_WATCHDOG: Skipping interrupts\n");
 413                        goto out;
 414                }
 415        }
 416
 417        if (status & ATH9K_INT_GTT) {
 418                sc->gtt_cnt++;
 419
 420                if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 421                        type = RESET_TYPE_TX_GTT;
 422                        ath9k_queue_reset(sc, type);
 423                        atomic_inc(&ah->intr_ref_cnt);
 424                        ath_dbg(common, RESET,
 425                                "GTT: Skipping interrupts\n");
 426                        goto out;
 427                }
 428        }
 429
 430        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 431        if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 432                /*
 433                 * TSF sync does not look correct; remain awake to sync with
 434                 * the next Beacon.
 435                 */
 436                ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 437                sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 438        }
 439        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 440
 441        if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 442                rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 443                          ATH9K_INT_RXORN);
 444        else
 445                rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 446
 447        if (status & rxmask) {
 448                /* Check for high priority Rx first */
 449                if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 450                    (status & ATH9K_INT_RXHP))
 451                        ath_rx_tasklet(sc, 0, true);
 452
 453                ath_rx_tasklet(sc, 0, false);
 454        }
 455
 456        if (status & ATH9K_INT_TX) {
 457                if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 458                        /*
 459                         * For EDMA chips, TX completion is enabled for the
 460                         * beacon queue, so if a beacon has been transmitted
 461                         * successfully after a GTT interrupt, the GTT counter
 462                         * gets reset to zero here.
 463                         */
 464                        sc->gtt_cnt = 0;
 465
 466                        ath_tx_edma_tasklet(sc);
 467                } else {
 468                        ath_tx_tasklet(sc);
 469                }
 470
 471                wake_up(&sc->tx_wait);
 472        }
 473
 474        if (status & ATH9K_INT_GENTIMER)
 475                ath_gen_timer_isr(sc->sc_ah);
 476
 477        ath9k_btcoex_handle_interrupt(sc, status);
 478
 479        /* re-enable hardware interrupt */
 480        ath9k_hw_enable_interrupts(ah);
 481out:
 482        spin_unlock(&sc->sc_pcu_lock);
 483        ath9k_ps_restore(sc);
 484}
 485
 486irqreturn_t ath_isr(int irq, void *dev)
 487{
 488#define SCHED_INTR (                            \
 489                ATH9K_INT_FATAL |               \
 490                ATH9K_INT_BB_WATCHDOG |         \
 491                ATH9K_INT_RXORN |               \
 492                ATH9K_INT_RXEOL |               \
 493                ATH9K_INT_RX |                  \
 494                ATH9K_INT_RXLP |                \
 495                ATH9K_INT_RXHP |                \
 496                ATH9K_INT_TX |                  \
 497                ATH9K_INT_BMISS |               \
 498                ATH9K_INT_CST |                 \
 499                ATH9K_INT_GTT |                 \
 500                ATH9K_INT_TSFOOR |              \
 501                ATH9K_INT_GENTIMER |            \
 502                ATH9K_INT_MCI)
 503
 504        struct ath_softc *sc = dev;
 505        struct ath_hw *ah = sc->sc_ah;
 506        struct ath_common *common = ath9k_hw_common(ah);
 507        enum ath9k_int status;
 508        u32 sync_cause = 0;
 509        bool sched = false;
 510
 511        /*
 512         * The hardware is not ready/present, don't
 513         * touch anything. Note this can happen early
 514         * on if the IRQ is shared.
 515         */
 516        if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 517                return IRQ_NONE;
 518
 519        /* shared irq, not for us */
 520        if (!ath9k_hw_intrpend(ah))
 521                return IRQ_NONE;
 522
 523        /*
 524         * Figure out the reason(s) for the interrupt.  Note
 525         * that the hal returns a pseudo-ISR that may include
 526         * bits we haven't explicitly enabled so we mask the
 527         * value to insure we only process bits we requested.
 528         */
 529        ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 530        ath9k_debug_sync_cause(sc, sync_cause);
 531        status &= ah->imask;    /* discard unasked-for bits */
 532
 533        if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
 534                return IRQ_HANDLED;
 535
 536        /*
 537         * If there are no status bits set, then this interrupt was not
 538         * for me (should have been caught above).
 539         */
 540        if (!status)
 541                return IRQ_NONE;
 542
 543        /* Cache the status */
 544        sc->intrstatus = status;
 545
 546        if (status & SCHED_INTR)
 547                sched = true;
 548
 549        /*
 550         * If a FATAL interrupt is received, we have to reset the chip
 551         * immediately.
 552         */
 553        if (status & ATH9K_INT_FATAL)
 554                goto chip_reset;
 555
 556        if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 557            (status & ATH9K_INT_BB_WATCHDOG))
 558                goto chip_reset;
 559
 560        if (status & ATH9K_INT_SWBA)
 561                tasklet_schedule(&sc->bcon_tasklet);
 562
 563        if (status & ATH9K_INT_TXURN)
 564                ath9k_hw_updatetxtriglevel(ah, true);
 565
 566        if (status & ATH9K_INT_RXEOL) {
 567                ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 568                ath9k_hw_set_interrupts(ah);
 569        }
 570
 571        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 572                if (status & ATH9K_INT_TIM_TIMER) {
 573                        if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 574                                goto chip_reset;
 575                        /* Clear RxAbort bit so that we can
 576                         * receive frames */
 577                        ath9k_setpower(sc, ATH9K_PM_AWAKE);
 578                        spin_lock(&sc->sc_pm_lock);
 579                        ath9k_hw_setrxabort(sc->sc_ah, 0);
 580                        sc->ps_flags |= PS_WAIT_FOR_BEACON;
 581                        spin_unlock(&sc->sc_pm_lock);
 582                }
 583
 584chip_reset:
 585
 586        ath_debug_stat_interrupt(sc, status);
 587
 588        if (sched) {
 589                /* turn off every interrupt */
 590                ath9k_hw_disable_interrupts(ah);
 591                tasklet_schedule(&sc->intr_tq);
 592        }
 593
 594        return IRQ_HANDLED;
 595
 596#undef SCHED_INTR
 597}
 598
 599/*
 600 * This function is called when a HW reset cannot be deferred
 601 * and has to be immediate.
 602 */
 603int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 604{
 605        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 606        int r;
 607
 608        ath9k_hw_kill_interrupts(sc->sc_ah);
 609        set_bit(ATH_OP_HW_RESET, &common->op_flags);
 610
 611        ath9k_ps_wakeup(sc);
 612        r = ath_reset_internal(sc, hchan);
 613        ath9k_ps_restore(sc);
 614
 615        return r;
 616}
 617
 618/*
 619 * When a HW reset can be deferred, it is added to the
 620 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 621 * queueing.
 622 */
 623void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 624{
 625        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 626#ifdef CONFIG_ATH9K_DEBUGFS
 627        RESET_STAT_INC(sc, type);
 628#endif
 629        ath9k_hw_kill_interrupts(sc->sc_ah);
 630        set_bit(ATH_OP_HW_RESET, &common->op_flags);
 631        ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 632}
 633
 634void ath_reset_work(struct work_struct *work)
 635{
 636        struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 637
 638        ath9k_ps_wakeup(sc);
 639        ath_reset_internal(sc, NULL);
 640        ath9k_ps_restore(sc);
 641}
 642
 643/**********************/
 644/* mac80211 callbacks */
 645/**********************/
 646
 647static int ath9k_start(struct ieee80211_hw *hw)
 648{
 649        struct ath_softc *sc = hw->priv;
 650        struct ath_hw *ah = sc->sc_ah;
 651        struct ath_common *common = ath9k_hw_common(ah);
 652        struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 653        struct ath_chanctx *ctx = sc->cur_chan;
 654        struct ath9k_channel *init_channel;
 655        int r;
 656
 657        ath_dbg(common, CONFIG,
 658                "Starting driver with initial channel: %d MHz\n",
 659                curchan->center_freq);
 660
 661        ath9k_ps_wakeup(sc);
 662        mutex_lock(&sc->mutex);
 663
 664        init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 665        sc->cur_chandef = hw->conf.chandef;
 666
 667        /* Reset SERDES registers */
 668        ath9k_hw_configpcipowersave(ah, false);
 669
 670        /*
 671         * The basic interface to setting the hardware in a good
 672         * state is ``reset''.  On return the hardware is known to
 673         * be powered up and with interrupts disabled.  This must
 674         * be followed by initialization of the appropriate bits
 675         * and then setup of the interrupt mask.
 676         */
 677        spin_lock_bh(&sc->sc_pcu_lock);
 678
 679        atomic_set(&ah->intr_ref_cnt, -1);
 680
 681        r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 682        if (r) {
 683                ath_err(common,
 684                        "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 685                        r, curchan->center_freq);
 686                ah->reset_power_on = false;
 687        }
 688
 689        /* Setup our intr mask. */
 690        ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 691                    ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 692                    ATH9K_INT_GLOBAL;
 693
 694        if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 695                ah->imask |= ATH9K_INT_RXHP |
 696                             ATH9K_INT_RXLP;
 697        else
 698                ah->imask |= ATH9K_INT_RX;
 699
 700        if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 701                ah->imask |= ATH9K_INT_BB_WATCHDOG;
 702
 703        /*
 704         * Enable GTT interrupts only for AR9003/AR9004 chips
 705         * for now.
 706         */
 707        if (AR_SREV_9300_20_OR_LATER(ah))
 708                ah->imask |= ATH9K_INT_GTT;
 709
 710        if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 711                ah->imask |= ATH9K_INT_CST;
 712
 713        ath_mci_enable(sc);
 714
 715        clear_bit(ATH_OP_INVALID, &common->op_flags);
 716        sc->sc_ah->is_monitoring = false;
 717
 718        if (!ath_complete_reset(sc, false))
 719                ah->reset_power_on = false;
 720
 721        if (ah->led_pin >= 0) {
 722                ath9k_hw_cfg_output(ah, ah->led_pin,
 723                                    AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 724                ath9k_hw_set_gpio(ah, ah->led_pin,
 725                                  (ah->config.led_active_high) ? 1 : 0);
 726        }
 727
 728        /*
 729         * Reset key cache to sane defaults (all entries cleared) instead of
 730         * semi-random values after suspend/resume.
 731         */
 732        ath9k_cmn_init_crypto(sc->sc_ah);
 733
 734        ath9k_hw_reset_tsf(ah);
 735
 736        spin_unlock_bh(&sc->sc_pcu_lock);
 737
 738        mutex_unlock(&sc->mutex);
 739
 740        ath9k_ps_restore(sc);
 741
 742        ath9k_rng_start(sc);
 743
 744        return 0;
 745}
 746
 747static void ath9k_tx(struct ieee80211_hw *hw,
 748                     struct ieee80211_tx_control *control,
 749                     struct sk_buff *skb)
 750{
 751        struct ath_softc *sc = hw->priv;
 752        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 753        struct ath_tx_control txctl;
 754        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 755        unsigned long flags;
 756
 757        if (sc->ps_enabled) {
 758                /*
 759                 * mac80211 does not set PM field for normal data frames, so we
 760                 * need to update that based on the current PS mode.
 761                 */
 762                if (ieee80211_is_data(hdr->frame_control) &&
 763                    !ieee80211_is_nullfunc(hdr->frame_control) &&
 764                    !ieee80211_has_pm(hdr->frame_control)) {
 765                        ath_dbg(common, PS,
 766                                "Add PM=1 for a TX frame while in PS mode\n");
 767                        hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 768                }
 769        }
 770
 771        if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 772                /*
 773                 * We are using PS-Poll and mac80211 can request TX while in
 774                 * power save mode. Need to wake up hardware for the TX to be
 775                 * completed and if needed, also for RX of buffered frames.
 776                 */
 777                ath9k_ps_wakeup(sc);
 778                spin_lock_irqsave(&sc->sc_pm_lock, flags);
 779                if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 780                        ath9k_hw_setrxabort(sc->sc_ah, 0);
 781                if (ieee80211_is_pspoll(hdr->frame_control)) {
 782                        ath_dbg(common, PS,
 783                                "Sending PS-Poll to pick a buffered frame\n");
 784                        sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 785                } else {
 786                        ath_dbg(common, PS, "Wake up to complete TX\n");
 787                        sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 788                }
 789                /*
 790                 * The actual restore operation will happen only after
 791                 * the ps_flags bit is cleared. We are just dropping
 792                 * the ps_usecount here.
 793                 */
 794                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 795                ath9k_ps_restore(sc);
 796        }
 797
 798        /*
 799         * Cannot tx while the hardware is in full sleep, it first needs a full
 800         * chip reset to recover from that
 801         */
 802        if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 803                ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 804                goto exit;
 805        }
 806
 807        memset(&txctl, 0, sizeof(struct ath_tx_control));
 808        txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 809        txctl.sta = control->sta;
 810
 811        ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 812
 813        if (ath_tx_start(hw, skb, &txctl) != 0) {
 814                ath_dbg(common, XMIT, "TX failed\n");
 815                TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 816                goto exit;
 817        }
 818
 819        return;
 820exit:
 821        ieee80211_free_txskb(hw, skb);
 822}
 823
 824static void ath9k_stop(struct ieee80211_hw *hw)
 825{
 826        struct ath_softc *sc = hw->priv;
 827        struct ath_hw *ah = sc->sc_ah;
 828        struct ath_common *common = ath9k_hw_common(ah);
 829        bool prev_idle;
 830
 831        ath9k_deinit_channel_context(sc);
 832
 833        ath9k_rng_stop(sc);
 834
 835        mutex_lock(&sc->mutex);
 836
 837        ath_cancel_work(sc);
 838
 839        if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 840                ath_dbg(common, ANY, "Device not present\n");
 841                mutex_unlock(&sc->mutex);
 842                return;
 843        }
 844
 845        /* Ensure HW is awake when we try to shut it down. */
 846        ath9k_ps_wakeup(sc);
 847
 848        spin_lock_bh(&sc->sc_pcu_lock);
 849
 850        /* prevent tasklets to enable interrupts once we disable them */
 851        ah->imask &= ~ATH9K_INT_GLOBAL;
 852
 853        /* make sure h/w will not generate any interrupt
 854         * before setting the invalid flag. */
 855        ath9k_hw_disable_interrupts(ah);
 856
 857        spin_unlock_bh(&sc->sc_pcu_lock);
 858
 859        /* we can now sync irq and kill any running tasklets, since we already
 860         * disabled interrupts and not holding a spin lock */
 861        synchronize_irq(sc->irq);
 862        tasklet_kill(&sc->intr_tq);
 863        tasklet_kill(&sc->bcon_tasklet);
 864
 865        prev_idle = sc->ps_idle;
 866        sc->ps_idle = true;
 867
 868        spin_lock_bh(&sc->sc_pcu_lock);
 869
 870        if (ah->led_pin >= 0) {
 871                ath9k_hw_set_gpio(ah, ah->led_pin,
 872                                  (ah->config.led_active_high) ? 0 : 1);
 873                ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 874        }
 875
 876        ath_prepare_reset(sc);
 877
 878        if (sc->rx.frag) {
 879                dev_kfree_skb_any(sc->rx.frag);
 880                sc->rx.frag = NULL;
 881        }
 882
 883        if (!ah->curchan)
 884                ah->curchan = ath9k_cmn_get_channel(hw, ah,
 885                                                    &sc->cur_chan->chandef);
 886
 887        ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 888
 889        set_bit(ATH_OP_INVALID, &common->op_flags);
 890
 891        ath9k_hw_phy_disable(ah);
 892
 893        ath9k_hw_configpcipowersave(ah, true);
 894
 895        spin_unlock_bh(&sc->sc_pcu_lock);
 896
 897        ath9k_ps_restore(sc);
 898
 899        sc->ps_idle = prev_idle;
 900
 901        mutex_unlock(&sc->mutex);
 902
 903        ath_dbg(common, CONFIG, "Driver halt\n");
 904}
 905
 906static bool ath9k_uses_beacons(int type)
 907{
 908        switch (type) {
 909        case NL80211_IFTYPE_AP:
 910        case NL80211_IFTYPE_ADHOC:
 911        case NL80211_IFTYPE_MESH_POINT:
 912                return true;
 913        default:
 914                return false;
 915        }
 916}
 917
 918static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 919                           u8 *mac, struct ieee80211_vif *vif)
 920{
 921        struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 922        int i;
 923
 924        if (iter_data->has_hw_macaddr) {
 925                for (i = 0; i < ETH_ALEN; i++)
 926                        iter_data->mask[i] &=
 927                                ~(iter_data->hw_macaddr[i] ^ mac[i]);
 928        } else {
 929                memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 930                iter_data->has_hw_macaddr = true;
 931        }
 932
 933        if (!vif->bss_conf.use_short_slot)
 934                iter_data->slottime = ATH9K_SLOT_TIME_20;
 935
 936        switch (vif->type) {
 937        case NL80211_IFTYPE_AP:
 938                iter_data->naps++;
 939                break;
 940        case NL80211_IFTYPE_STATION:
 941                iter_data->nstations++;
 942                if (avp->assoc && !iter_data->primary_sta)
 943                        iter_data->primary_sta = vif;
 944                break;
 945        case NL80211_IFTYPE_OCB:
 946                iter_data->nocbs++;
 947                break;
 948        case NL80211_IFTYPE_ADHOC:
 949                iter_data->nadhocs++;
 950                if (vif->bss_conf.enable_beacon)
 951                        iter_data->beacons = true;
 952                break;
 953        case NL80211_IFTYPE_MESH_POINT:
 954                iter_data->nmeshes++;
 955                if (vif->bss_conf.enable_beacon)
 956                        iter_data->beacons = true;
 957                break;
 958        case NL80211_IFTYPE_WDS:
 959                iter_data->nwds++;
 960                break;
 961        default:
 962                break;
 963        }
 964}
 965
 966static void ath9k_update_bssid_mask(struct ath_softc *sc,
 967                                    struct ath_chanctx *ctx,
 968                                    struct ath9k_vif_iter_data *iter_data)
 969{
 970        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 971        struct ath_vif *avp;
 972        int i;
 973
 974        if (!ath9k_is_chanctx_enabled())
 975                return;
 976
 977        list_for_each_entry(avp, &ctx->vifs, list) {
 978                if (ctx->nvifs_assigned != 1)
 979                        continue;
 980
 981                if (!iter_data->has_hw_macaddr)
 982                        continue;
 983
 984                ether_addr_copy(common->curbssid, avp->bssid);
 985
 986                /* perm_addr will be used as the p2p device address. */
 987                for (i = 0; i < ETH_ALEN; i++)
 988                        iter_data->mask[i] &=
 989                                ~(iter_data->hw_macaddr[i] ^
 990                                  sc->hw->wiphy->perm_addr[i]);
 991        }
 992}
 993
 994/* Called with sc->mutex held. */
 995void ath9k_calculate_iter_data(struct ath_softc *sc,
 996                               struct ath_chanctx *ctx,
 997                               struct ath9k_vif_iter_data *iter_data)
 998{
 999        struct ath_vif *avp;
1000
1001        /*
1002         * The hardware will use primary station addr together with the
1003         * BSSID mask when matching addresses.
1004         */
1005        memset(iter_data, 0, sizeof(*iter_data));
1006        eth_broadcast_addr(iter_data->mask);
1007        iter_data->slottime = ATH9K_SLOT_TIME_9;
1008
1009        list_for_each_entry(avp, &ctx->vifs, list)
1010                ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1011
1012        ath9k_update_bssid_mask(sc, ctx, iter_data);
1013}
1014
1015static void ath9k_set_assoc_state(struct ath_softc *sc,
1016                                  struct ieee80211_vif *vif, bool changed)
1017{
1018        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1019        struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1020        unsigned long flags;
1021
1022        set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1023
1024        ether_addr_copy(common->curbssid, avp->bssid);
1025        common->curaid = avp->aid;
1026        ath9k_hw_write_associd(sc->sc_ah);
1027
1028        if (changed) {
1029                common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1030                sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1031
1032                spin_lock_irqsave(&sc->sc_pm_lock, flags);
1033                sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1034                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1035        }
1036
1037        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1038                ath9k_mci_update_wlan_channels(sc, false);
1039
1040        ath_dbg(common, CONFIG,
1041                "Primary Station interface: %pM, BSSID: %pM\n",
1042                vif->addr, common->curbssid);
1043}
1044
1045#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1046static void ath9k_set_offchannel_state(struct ath_softc *sc)
1047{
1048        struct ath_hw *ah = sc->sc_ah;
1049        struct ath_common *common = ath9k_hw_common(ah);
1050        struct ieee80211_vif *vif = NULL;
1051
1052        ath9k_ps_wakeup(sc);
1053
1054        if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1055                vif = sc->offchannel.scan_vif;
1056        else
1057                vif = sc->offchannel.roc_vif;
1058
1059        if (WARN_ON(!vif))
1060                goto exit;
1061
1062        eth_zero_addr(common->curbssid);
1063        eth_broadcast_addr(common->bssidmask);
1064        memcpy(common->macaddr, vif->addr, ETH_ALEN);
1065        common->curaid = 0;
1066        ah->opmode = vif->type;
1067        ah->imask &= ~ATH9K_INT_SWBA;
1068        ah->imask &= ~ATH9K_INT_TSFOOR;
1069        ah->slottime = ATH9K_SLOT_TIME_9;
1070
1071        ath_hw_setbssidmask(common);
1072        ath9k_hw_setopmode(ah);
1073        ath9k_hw_write_associd(sc->sc_ah);
1074        ath9k_hw_set_interrupts(ah);
1075        ath9k_hw_init_global_settings(ah);
1076
1077exit:
1078        ath9k_ps_restore(sc);
1079}
1080#endif
1081
1082/* Called with sc->mutex held. */
1083void ath9k_calculate_summary_state(struct ath_softc *sc,
1084                                   struct ath_chanctx *ctx)
1085{
1086        struct ath_hw *ah = sc->sc_ah;
1087        struct ath_common *common = ath9k_hw_common(ah);
1088        struct ath9k_vif_iter_data iter_data;
1089        struct ath_beacon_config *cur_conf;
1090
1091        ath_chanctx_check_active(sc, ctx);
1092
1093        if (ctx != sc->cur_chan)
1094                return;
1095
1096#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1097        if (ctx == &sc->offchannel.chan)
1098                return ath9k_set_offchannel_state(sc);
1099#endif
1100
1101        ath9k_ps_wakeup(sc);
1102        ath9k_calculate_iter_data(sc, ctx, &iter_data);
1103
1104        if (iter_data.has_hw_macaddr)
1105                memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1106
1107        memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1108        ath_hw_setbssidmask(common);
1109
1110        if (iter_data.naps > 0) {
1111                cur_conf = &ctx->beacon;
1112                ath9k_hw_set_tsfadjust(ah, true);
1113                ah->opmode = NL80211_IFTYPE_AP;
1114                if (cur_conf->enable_beacon)
1115                        iter_data.beacons = true;
1116        } else {
1117                ath9k_hw_set_tsfadjust(ah, false);
1118
1119                if (iter_data.nmeshes)
1120                        ah->opmode = NL80211_IFTYPE_MESH_POINT;
1121                else if (iter_data.nocbs)
1122                        ah->opmode = NL80211_IFTYPE_OCB;
1123                else if (iter_data.nwds)
1124                        ah->opmode = NL80211_IFTYPE_AP;
1125                else if (iter_data.nadhocs)
1126                        ah->opmode = NL80211_IFTYPE_ADHOC;
1127                else
1128                        ah->opmode = NL80211_IFTYPE_STATION;
1129        }
1130
1131        ath9k_hw_setopmode(ah);
1132
1133        ctx->switch_after_beacon = false;
1134        if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1135                ah->imask |= ATH9K_INT_TSFOOR;
1136        else {
1137                ah->imask &= ~ATH9K_INT_TSFOOR;
1138                if (iter_data.naps == 1 && iter_data.beacons)
1139                        ctx->switch_after_beacon = true;
1140        }
1141
1142        ah->imask &= ~ATH9K_INT_SWBA;
1143        if (ah->opmode == NL80211_IFTYPE_STATION) {
1144                bool changed = (iter_data.primary_sta != ctx->primary_sta);
1145
1146                if (iter_data.primary_sta) {
1147                        iter_data.beacons = true;
1148                        ath9k_set_assoc_state(sc, iter_data.primary_sta,
1149                                              changed);
1150                        ctx->primary_sta = iter_data.primary_sta;
1151                } else {
1152                        ctx->primary_sta = NULL;
1153                        eth_zero_addr(common->curbssid);
1154                        common->curaid = 0;
1155                        ath9k_hw_write_associd(sc->sc_ah);
1156                        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1157                                ath9k_mci_update_wlan_channels(sc, true);
1158                }
1159        } else if (iter_data.beacons) {
1160                ah->imask |= ATH9K_INT_SWBA;
1161        }
1162        ath9k_hw_set_interrupts(ah);
1163
1164        if (iter_data.beacons)
1165                set_bit(ATH_OP_BEACONS, &common->op_flags);
1166        else
1167                clear_bit(ATH_OP_BEACONS, &common->op_flags);
1168
1169        if (ah->slottime != iter_data.slottime) {
1170                ah->slottime = iter_data.slottime;
1171                ath9k_hw_init_global_settings(ah);
1172        }
1173
1174        if (iter_data.primary_sta)
1175                set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1176        else
1177                clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1178
1179        ath_dbg(common, CONFIG,
1180                "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1181                common->macaddr, common->curbssid, common->bssidmask);
1182
1183        ath9k_ps_restore(sc);
1184}
1185
1186static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1187{
1188        int *power = (int *)data;
1189
1190        if (*power < vif->bss_conf.txpower)
1191                *power = vif->bss_conf.txpower;
1192}
1193
1194/* Called with sc->mutex held. */
1195void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1196{
1197        int power;
1198        struct ath_hw *ah = sc->sc_ah;
1199        struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1200
1201        ath9k_ps_wakeup(sc);
1202        if (ah->tpc_enabled) {
1203                power = (vif) ? vif->bss_conf.txpower : -1;
1204                ieee80211_iterate_active_interfaces_atomic(
1205                                sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1206                                ath9k_tpc_vif_iter, &power);
1207                if (power == -1)
1208                        power = sc->hw->conf.power_level;
1209        } else {
1210                power = sc->hw->conf.power_level;
1211        }
1212        sc->cur_chan->txpower = 2 * power;
1213        ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1214        sc->cur_chan->cur_txpower = reg->max_power_level;
1215        ath9k_ps_restore(sc);
1216}
1217
1218static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1219                                   struct ieee80211_vif *vif)
1220{
1221        int i;
1222
1223        if (!ath9k_is_chanctx_enabled())
1224                return;
1225
1226        for (i = 0; i < IEEE80211_NUM_ACS; i++)
1227                vif->hw_queue[i] = i;
1228
1229        if (vif->type == NL80211_IFTYPE_AP ||
1230            vif->type == NL80211_IFTYPE_MESH_POINT)
1231                vif->cab_queue = hw->queues - 2;
1232        else
1233                vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1234}
1235
1236static int ath9k_add_interface(struct ieee80211_hw *hw,
1237                               struct ieee80211_vif *vif)
1238{
1239        struct ath_softc *sc = hw->priv;
1240        struct ath_hw *ah = sc->sc_ah;
1241        struct ath_common *common = ath9k_hw_common(ah);
1242        struct ath_vif *avp = (void *)vif->drv_priv;
1243        struct ath_node *an = &avp->mcast_node;
1244
1245        mutex_lock(&sc->mutex);
1246
1247        if (config_enabled(CONFIG_ATH9K_TX99)) {
1248                if (sc->cur_chan->nvifs >= 1) {
1249                        mutex_unlock(&sc->mutex);
1250                        return -EOPNOTSUPP;
1251                }
1252                sc->tx99_vif = vif;
1253        }
1254
1255        ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1256        sc->cur_chan->nvifs++;
1257
1258        if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1259                vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1260
1261        if (ath9k_uses_beacons(vif->type))
1262                ath9k_beacon_assign_slot(sc, vif);
1263
1264        avp->vif = vif;
1265        if (!ath9k_is_chanctx_enabled()) {
1266                avp->chanctx = sc->cur_chan;
1267                list_add_tail(&avp->list, &avp->chanctx->vifs);
1268        }
1269
1270        ath9k_calculate_summary_state(sc, avp->chanctx);
1271
1272        ath9k_assign_hw_queues(hw, vif);
1273
1274        ath9k_set_txpower(sc, vif);
1275
1276        an->sc = sc;
1277        an->sta = NULL;
1278        an->vif = vif;
1279        an->no_ps_filter = true;
1280        ath_tx_node_init(sc, an);
1281
1282        mutex_unlock(&sc->mutex);
1283        return 0;
1284}
1285
1286static int ath9k_change_interface(struct ieee80211_hw *hw,
1287                                  struct ieee80211_vif *vif,
1288                                  enum nl80211_iftype new_type,
1289                                  bool p2p)
1290{
1291        struct ath_softc *sc = hw->priv;
1292        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1293        struct ath_vif *avp = (void *)vif->drv_priv;
1294
1295        mutex_lock(&sc->mutex);
1296
1297        if (config_enabled(CONFIG_ATH9K_TX99)) {
1298                mutex_unlock(&sc->mutex);
1299                return -EOPNOTSUPP;
1300        }
1301
1302        ath_dbg(common, CONFIG, "Change Interface\n");
1303
1304        if (ath9k_uses_beacons(vif->type))
1305                ath9k_beacon_remove_slot(sc, vif);
1306
1307        vif->type = new_type;
1308        vif->p2p = p2p;
1309
1310        if (ath9k_uses_beacons(vif->type))
1311                ath9k_beacon_assign_slot(sc, vif);
1312
1313        ath9k_assign_hw_queues(hw, vif);
1314        ath9k_calculate_summary_state(sc, avp->chanctx);
1315
1316        ath9k_set_txpower(sc, vif);
1317
1318        mutex_unlock(&sc->mutex);
1319        return 0;
1320}
1321
1322static void ath9k_remove_interface(struct ieee80211_hw *hw,
1323                                   struct ieee80211_vif *vif)
1324{
1325        struct ath_softc *sc = hw->priv;
1326        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1327        struct ath_vif *avp = (void *)vif->drv_priv;
1328
1329        ath_dbg(common, CONFIG, "Detach Interface\n");
1330
1331        mutex_lock(&sc->mutex);
1332
1333        ath9k_p2p_remove_vif(sc, vif);
1334
1335        sc->cur_chan->nvifs--;
1336        sc->tx99_vif = NULL;
1337        if (!ath9k_is_chanctx_enabled())
1338                list_del(&avp->list);
1339
1340        if (ath9k_uses_beacons(vif->type))
1341                ath9k_beacon_remove_slot(sc, vif);
1342
1343        ath_tx_node_cleanup(sc, &avp->mcast_node);
1344
1345        ath9k_calculate_summary_state(sc, avp->chanctx);
1346
1347        ath9k_set_txpower(sc, NULL);
1348
1349        mutex_unlock(&sc->mutex);
1350}
1351
1352static void ath9k_enable_ps(struct ath_softc *sc)
1353{
1354        struct ath_hw *ah = sc->sc_ah;
1355        struct ath_common *common = ath9k_hw_common(ah);
1356
1357        if (config_enabled(CONFIG_ATH9K_TX99))
1358                return;
1359
1360        sc->ps_enabled = true;
1361        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1362                if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1363                        ah->imask |= ATH9K_INT_TIM_TIMER;
1364                        ath9k_hw_set_interrupts(ah);
1365                }
1366                ath9k_hw_setrxabort(ah, 1);
1367        }
1368        ath_dbg(common, PS, "PowerSave enabled\n");
1369}
1370
1371static void ath9k_disable_ps(struct ath_softc *sc)
1372{
1373        struct ath_hw *ah = sc->sc_ah;
1374        struct ath_common *common = ath9k_hw_common(ah);
1375
1376        if (config_enabled(CONFIG_ATH9K_TX99))
1377                return;
1378
1379        sc->ps_enabled = false;
1380        ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1381        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1382                ath9k_hw_setrxabort(ah, 0);
1383                sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1384                                  PS_WAIT_FOR_CAB |
1385                                  PS_WAIT_FOR_PSPOLL_DATA |
1386                                  PS_WAIT_FOR_TX_ACK);
1387                if (ah->imask & ATH9K_INT_TIM_TIMER) {
1388                        ah->imask &= ~ATH9K_INT_TIM_TIMER;
1389                        ath9k_hw_set_interrupts(ah);
1390                }
1391        }
1392        ath_dbg(common, PS, "PowerSave disabled\n");
1393}
1394
1395static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1396{
1397        struct ath_softc *sc = hw->priv;
1398        struct ath_hw *ah = sc->sc_ah;
1399        struct ath_common *common = ath9k_hw_common(ah);
1400        struct ieee80211_conf *conf = &hw->conf;
1401        struct ath_chanctx *ctx = sc->cur_chan;
1402
1403        ath9k_ps_wakeup(sc);
1404        mutex_lock(&sc->mutex);
1405
1406        if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1407                sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1408                if (sc->ps_idle) {
1409                        ath_cancel_work(sc);
1410                        ath9k_stop_btcoex(sc);
1411                } else {
1412                        ath9k_start_btcoex(sc);
1413                        /*
1414                         * The chip needs a reset to properly wake up from
1415                         * full sleep
1416                         */
1417                        ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1418                }
1419        }
1420
1421        /*
1422         * We just prepare to enable PS. We have to wait until our AP has
1423         * ACK'd our null data frame to disable RX otherwise we'll ignore
1424         * those ACKs and end up retransmitting the same null data frames.
1425         * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1426         */
1427        if (changed & IEEE80211_CONF_CHANGE_PS) {
1428                unsigned long flags;
1429                spin_lock_irqsave(&sc->sc_pm_lock, flags);
1430                if (conf->flags & IEEE80211_CONF_PS)
1431                        ath9k_enable_ps(sc);
1432                else
1433                        ath9k_disable_ps(sc);
1434                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1435        }
1436
1437        if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1438                if (conf->flags & IEEE80211_CONF_MONITOR) {
1439                        ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1440                        sc->sc_ah->is_monitoring = true;
1441                } else {
1442                        ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1443                        sc->sc_ah->is_monitoring = false;
1444                }
1445        }
1446
1447        if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1448                ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1449                ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1450        }
1451
1452        mutex_unlock(&sc->mutex);
1453        ath9k_ps_restore(sc);
1454
1455        return 0;
1456}
1457
1458#define SUPPORTED_FILTERS                       \
1459        (FIF_ALLMULTI |                         \
1460        FIF_CONTROL |                           \
1461        FIF_PSPOLL |                            \
1462        FIF_OTHER_BSS |                         \
1463        FIF_BCN_PRBRESP_PROMISC |               \
1464        FIF_PROBE_REQ |                         \
1465        FIF_FCSFAIL)
1466
1467/* FIXME: sc->sc_full_reset ? */
1468static void ath9k_configure_filter(struct ieee80211_hw *hw,
1469                                   unsigned int changed_flags,
1470                                   unsigned int *total_flags,
1471                                   u64 multicast)
1472{
1473        struct ath_softc *sc = hw->priv;
1474        struct ath_chanctx *ctx;
1475        u32 rfilt;
1476
1477        changed_flags &= SUPPORTED_FILTERS;
1478        *total_flags &= SUPPORTED_FILTERS;
1479
1480        spin_lock_bh(&sc->chan_lock);
1481        ath_for_each_chanctx(sc, ctx)
1482                ctx->rxfilter = *total_flags;
1483#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1484        sc->offchannel.chan.rxfilter = *total_flags;
1485#endif
1486        spin_unlock_bh(&sc->chan_lock);
1487
1488        ath9k_ps_wakeup(sc);
1489        rfilt = ath_calcrxfilter(sc);
1490        ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1491        ath9k_ps_restore(sc);
1492
1493        ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1494                rfilt);
1495}
1496
1497static int ath9k_sta_add(struct ieee80211_hw *hw,
1498                         struct ieee80211_vif *vif,
1499                         struct ieee80211_sta *sta)
1500{
1501        struct ath_softc *sc = hw->priv;
1502        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1503        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1504        struct ieee80211_key_conf ps_key = { };
1505        int key;
1506
1507        ath_node_attach(sc, sta, vif);
1508
1509        if (vif->type != NL80211_IFTYPE_AP &&
1510            vif->type != NL80211_IFTYPE_AP_VLAN)
1511                return 0;
1512
1513        key = ath_key_config(common, vif, sta, &ps_key);
1514        if (key > 0) {
1515                an->ps_key = key;
1516                an->key_idx[0] = key;
1517        }
1518
1519        return 0;
1520}
1521
1522static void ath9k_del_ps_key(struct ath_softc *sc,
1523                             struct ieee80211_vif *vif,
1524                             struct ieee80211_sta *sta)
1525{
1526        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1527        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1528        struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1529
1530        if (!an->ps_key)
1531            return;
1532
1533        ath_key_delete(common, &ps_key);
1534        an->ps_key = 0;
1535        an->key_idx[0] = 0;
1536}
1537
1538static int ath9k_sta_remove(struct ieee80211_hw *hw,
1539                            struct ieee80211_vif *vif,
1540                            struct ieee80211_sta *sta)
1541{
1542        struct ath_softc *sc = hw->priv;
1543
1544        ath9k_del_ps_key(sc, vif, sta);
1545        ath_node_detach(sc, sta);
1546
1547        return 0;
1548}
1549
1550static int ath9k_sta_state(struct ieee80211_hw *hw,
1551                           struct ieee80211_vif *vif,
1552                           struct ieee80211_sta *sta,
1553                           enum ieee80211_sta_state old_state,
1554                           enum ieee80211_sta_state new_state)
1555{
1556        struct ath_softc *sc = hw->priv;
1557        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1558        int ret = 0;
1559
1560        if (old_state == IEEE80211_STA_AUTH &&
1561            new_state == IEEE80211_STA_ASSOC) {
1562                ret = ath9k_sta_add(hw, vif, sta);
1563                ath_dbg(common, CONFIG,
1564                        "Add station: %pM\n", sta->addr);
1565        } else if (old_state == IEEE80211_STA_ASSOC &&
1566                   new_state == IEEE80211_STA_AUTH) {
1567                ret = ath9k_sta_remove(hw, vif, sta);
1568                ath_dbg(common, CONFIG,
1569                        "Remove station: %pM\n", sta->addr);
1570        }
1571
1572        if (ath9k_is_chanctx_enabled()) {
1573                if (vif->type == NL80211_IFTYPE_STATION) {
1574                        if (old_state == IEEE80211_STA_ASSOC &&
1575                            new_state == IEEE80211_STA_AUTHORIZED)
1576                                ath_chanctx_event(sc, vif,
1577                                                  ATH_CHANCTX_EVENT_AUTHORIZED);
1578                }
1579        }
1580
1581        return ret;
1582}
1583
1584static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1585                                    struct ath_node *an,
1586                                    bool set)
1587{
1588        int i;
1589
1590        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1591                if (!an->key_idx[i])
1592                        continue;
1593                ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1594        }
1595}
1596
1597static void ath9k_sta_notify(struct ieee80211_hw *hw,
1598                         struct ieee80211_vif *vif,
1599                         enum sta_notify_cmd cmd,
1600                         struct ieee80211_sta *sta)
1601{
1602        struct ath_softc *sc = hw->priv;
1603        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1604
1605        switch (cmd) {
1606        case STA_NOTIFY_SLEEP:
1607                an->sleeping = true;
1608                ath_tx_aggr_sleep(sta, sc, an);
1609                ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1610                break;
1611        case STA_NOTIFY_AWAKE:
1612                ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1613                an->sleeping = false;
1614                ath_tx_aggr_wakeup(sc, an);
1615                break;
1616        }
1617}
1618
1619static int ath9k_conf_tx(struct ieee80211_hw *hw,
1620                         struct ieee80211_vif *vif, u16 queue,
1621                         const struct ieee80211_tx_queue_params *params)
1622{
1623        struct ath_softc *sc = hw->priv;
1624        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1625        struct ath_txq *txq;
1626        struct ath9k_tx_queue_info qi;
1627        int ret = 0;
1628
1629        if (queue >= IEEE80211_NUM_ACS)
1630                return 0;
1631
1632        txq = sc->tx.txq_map[queue];
1633
1634        ath9k_ps_wakeup(sc);
1635        mutex_lock(&sc->mutex);
1636
1637        memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1638
1639        qi.tqi_aifs = params->aifs;
1640        qi.tqi_cwmin = params->cw_min;
1641        qi.tqi_cwmax = params->cw_max;
1642        qi.tqi_burstTime = params->txop * 32;
1643
1644        ath_dbg(common, CONFIG,
1645                "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1646                queue, txq->axq_qnum, params->aifs, params->cw_min,
1647                params->cw_max, params->txop);
1648
1649        ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1650        ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1651        if (ret)
1652                ath_err(common, "TXQ Update failed\n");
1653
1654        mutex_unlock(&sc->mutex);
1655        ath9k_ps_restore(sc);
1656
1657        return ret;
1658}
1659
1660static int ath9k_set_key(struct ieee80211_hw *hw,
1661                         enum set_key_cmd cmd,
1662                         struct ieee80211_vif *vif,
1663                         struct ieee80211_sta *sta,
1664                         struct ieee80211_key_conf *key)
1665{
1666        struct ath_softc *sc = hw->priv;
1667        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1668        struct ath_node *an = NULL;
1669        int ret = 0, i;
1670
1671        if (ath9k_modparam_nohwcrypt)
1672                return -ENOSPC;
1673
1674        if ((vif->type == NL80211_IFTYPE_ADHOC ||
1675             vif->type == NL80211_IFTYPE_MESH_POINT) &&
1676            (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1677             key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1678            !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1679                /*
1680                 * For now, disable hw crypto for the RSN IBSS group keys. This
1681                 * could be optimized in the future to use a modified key cache
1682                 * design to support per-STA RX GTK, but until that gets
1683                 * implemented, use of software crypto for group addressed
1684                 * frames is a acceptable to allow RSN IBSS to be used.
1685                 */
1686                return -EOPNOTSUPP;
1687        }
1688
1689        mutex_lock(&sc->mutex);
1690        ath9k_ps_wakeup(sc);
1691        ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1692        if (sta)
1693                an = (struct ath_node *)sta->drv_priv;
1694
1695        switch (cmd) {
1696        case SET_KEY:
1697                if (sta)
1698                        ath9k_del_ps_key(sc, vif, sta);
1699
1700                key->hw_key_idx = 0;
1701                ret = ath_key_config(common, vif, sta, key);
1702                if (ret >= 0) {
1703                        key->hw_key_idx = ret;
1704                        /* push IV and Michael MIC generation to stack */
1705                        key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1706                        if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1707                                key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1708                        if (sc->sc_ah->sw_mgmt_crypto_tx &&
1709                            key->cipher == WLAN_CIPHER_SUITE_CCMP)
1710                                key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1711                        ret = 0;
1712                }
1713                if (an && key->hw_key_idx) {
1714                        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1715                                if (an->key_idx[i])
1716                                        continue;
1717                                an->key_idx[i] = key->hw_key_idx;
1718                                break;
1719                        }
1720                        WARN_ON(i == ARRAY_SIZE(an->key_idx));
1721                }
1722                break;
1723        case DISABLE_KEY:
1724                ath_key_delete(common, key);
1725                if (an) {
1726                        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1727                                if (an->key_idx[i] != key->hw_key_idx)
1728                                        continue;
1729                                an->key_idx[i] = 0;
1730                                break;
1731                        }
1732                }
1733                key->hw_key_idx = 0;
1734                break;
1735        default:
1736                ret = -EINVAL;
1737        }
1738
1739        ath9k_ps_restore(sc);
1740        mutex_unlock(&sc->mutex);
1741
1742        return ret;
1743}
1744
1745static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1746                                   struct ieee80211_vif *vif,
1747                                   struct ieee80211_bss_conf *bss_conf,
1748                                   u32 changed)
1749{
1750#define CHECK_ANI                               \
1751        (BSS_CHANGED_ASSOC |                    \
1752         BSS_CHANGED_IBSS |                     \
1753         BSS_CHANGED_BEACON_ENABLED)
1754
1755        struct ath_softc *sc = hw->priv;
1756        struct ath_hw *ah = sc->sc_ah;
1757        struct ath_common *common = ath9k_hw_common(ah);
1758        struct ath_vif *avp = (void *)vif->drv_priv;
1759        int slottime;
1760
1761        ath9k_ps_wakeup(sc);
1762        mutex_lock(&sc->mutex);
1763
1764        if (changed & BSS_CHANGED_ASSOC) {
1765                ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1766                        bss_conf->bssid, bss_conf->assoc);
1767
1768                memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1769                avp->aid = bss_conf->aid;
1770                avp->assoc = bss_conf->assoc;
1771
1772                ath9k_calculate_summary_state(sc, avp->chanctx);
1773        }
1774
1775        if ((changed & BSS_CHANGED_IBSS) ||
1776              (changed & BSS_CHANGED_OCB)) {
1777                memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1778                common->curaid = bss_conf->aid;
1779                ath9k_hw_write_associd(sc->sc_ah);
1780        }
1781
1782        if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1783            (changed & BSS_CHANGED_BEACON_INT) ||
1784            (changed & BSS_CHANGED_BEACON_INFO)) {
1785                ath9k_beacon_config(sc, vif, changed);
1786                if (changed & BSS_CHANGED_BEACON_ENABLED)
1787                        ath9k_calculate_summary_state(sc, avp->chanctx);
1788        }
1789
1790        if ((avp->chanctx == sc->cur_chan) &&
1791            (changed & BSS_CHANGED_ERP_SLOT)) {
1792                if (bss_conf->use_short_slot)
1793                        slottime = 9;
1794                else
1795                        slottime = 20;
1796                if (vif->type == NL80211_IFTYPE_AP) {
1797                        /*
1798                         * Defer update, so that connected stations can adjust
1799                         * their settings at the same time.
1800                         * See beacon.c for more details
1801                         */
1802                        sc->beacon.slottime = slottime;
1803                        sc->beacon.updateslot = UPDATE;
1804                } else {
1805                        ah->slottime = slottime;
1806                        ath9k_hw_init_global_settings(ah);
1807                }
1808        }
1809
1810        if (changed & BSS_CHANGED_P2P_PS)
1811                ath9k_p2p_bss_info_changed(sc, vif);
1812
1813        if (changed & CHECK_ANI)
1814                ath_check_ani(sc);
1815
1816        if (changed & BSS_CHANGED_TXPOWER) {
1817                ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1818                        vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1819                ath9k_set_txpower(sc, vif);
1820        }
1821
1822        mutex_unlock(&sc->mutex);
1823        ath9k_ps_restore(sc);
1824
1825#undef CHECK_ANI
1826}
1827
1828static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1829{
1830        struct ath_softc *sc = hw->priv;
1831        u64 tsf;
1832
1833        mutex_lock(&sc->mutex);
1834        ath9k_ps_wakeup(sc);
1835        tsf = ath9k_hw_gettsf64(sc->sc_ah);
1836        ath9k_ps_restore(sc);
1837        mutex_unlock(&sc->mutex);
1838
1839        return tsf;
1840}
1841
1842static void ath9k_set_tsf(struct ieee80211_hw *hw,
1843                          struct ieee80211_vif *vif,
1844                          u64 tsf)
1845{
1846        struct ath_softc *sc = hw->priv;
1847
1848        mutex_lock(&sc->mutex);
1849        ath9k_ps_wakeup(sc);
1850        ath9k_hw_settsf64(sc->sc_ah, tsf);
1851        ath9k_ps_restore(sc);
1852        mutex_unlock(&sc->mutex);
1853}
1854
1855static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1856{
1857        struct ath_softc *sc = hw->priv;
1858
1859        mutex_lock(&sc->mutex);
1860
1861        ath9k_ps_wakeup(sc);
1862        ath9k_hw_reset_tsf(sc->sc_ah);
1863        ath9k_ps_restore(sc);
1864
1865        mutex_unlock(&sc->mutex);
1866}
1867
1868static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1869                              struct ieee80211_vif *vif,
1870                              struct ieee80211_ampdu_params *params)
1871{
1872        struct ath_softc *sc = hw->priv;
1873        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1874        bool flush = false;
1875        int ret = 0;
1876        struct ieee80211_sta *sta = params->sta;
1877        enum ieee80211_ampdu_mlme_action action = params->action;
1878        u16 tid = params->tid;
1879        u16 *ssn = &params->ssn;
1880
1881        mutex_lock(&sc->mutex);
1882
1883        switch (action) {
1884        case IEEE80211_AMPDU_RX_START:
1885                break;
1886        case IEEE80211_AMPDU_RX_STOP:
1887                break;
1888        case IEEE80211_AMPDU_TX_START:
1889                if (ath9k_is_chanctx_enabled()) {
1890                        if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1891                                ret = -EBUSY;
1892                                break;
1893                        }
1894                }
1895                ath9k_ps_wakeup(sc);
1896                ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1897                if (!ret)
1898                        ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1899                ath9k_ps_restore(sc);
1900                break;
1901        case IEEE80211_AMPDU_TX_STOP_FLUSH:
1902        case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1903                flush = true;
1904        case IEEE80211_AMPDU_TX_STOP_CONT:
1905                ath9k_ps_wakeup(sc);
1906                ath_tx_aggr_stop(sc, sta, tid);
1907                if (!flush)
1908                        ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1909                ath9k_ps_restore(sc);
1910                break;
1911        case IEEE80211_AMPDU_TX_OPERATIONAL:
1912                ath9k_ps_wakeup(sc);
1913                ath_tx_aggr_resume(sc, sta, tid);
1914                ath9k_ps_restore(sc);
1915                break;
1916        default:
1917                ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1918        }
1919
1920        mutex_unlock(&sc->mutex);
1921
1922        return ret;
1923}
1924
1925static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1926                             struct survey_info *survey)
1927{
1928        struct ath_softc *sc = hw->priv;
1929        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1930        struct ieee80211_supported_band *sband;
1931        struct ieee80211_channel *chan;
1932        int pos;
1933
1934        if (config_enabled(CONFIG_ATH9K_TX99))
1935                return -EOPNOTSUPP;
1936
1937        spin_lock_bh(&common->cc_lock);
1938        if (idx == 0)
1939                ath_update_survey_stats(sc);
1940
1941        sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1942        if (sband && idx >= sband->n_channels) {
1943                idx -= sband->n_channels;
1944                sband = NULL;
1945        }
1946
1947        if (!sband)
1948                sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1949
1950        if (!sband || idx >= sband->n_channels) {
1951                spin_unlock_bh(&common->cc_lock);
1952                return -ENOENT;
1953        }
1954
1955        chan = &sband->channels[idx];
1956        pos = chan->hw_value;
1957        memcpy(survey, &sc->survey[pos], sizeof(*survey));
1958        survey->channel = chan;
1959        spin_unlock_bh(&common->cc_lock);
1960
1961        return 0;
1962}
1963
1964static void ath9k_enable_dynack(struct ath_softc *sc)
1965{
1966#ifdef CONFIG_ATH9K_DYNACK
1967        u32 rfilt;
1968        struct ath_hw *ah = sc->sc_ah;
1969
1970        ath_dynack_reset(ah);
1971
1972        ah->dynack.enabled = true;
1973        rfilt = ath_calcrxfilter(sc);
1974        ath9k_hw_setrxfilter(ah, rfilt);
1975#endif
1976}
1977
1978static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1979                                     s16 coverage_class)
1980{
1981        struct ath_softc *sc = hw->priv;
1982        struct ath_hw *ah = sc->sc_ah;
1983
1984        if (config_enabled(CONFIG_ATH9K_TX99))
1985                return;
1986
1987        mutex_lock(&sc->mutex);
1988
1989        if (coverage_class >= 0) {
1990                ah->coverage_class = coverage_class;
1991                if (ah->dynack.enabled) {
1992                        u32 rfilt;
1993
1994                        ah->dynack.enabled = false;
1995                        rfilt = ath_calcrxfilter(sc);
1996                        ath9k_hw_setrxfilter(ah, rfilt);
1997                }
1998                ath9k_ps_wakeup(sc);
1999                ath9k_hw_init_global_settings(ah);
2000                ath9k_ps_restore(sc);
2001        } else if (!ah->dynack.enabled) {
2002                ath9k_enable_dynack(sc);
2003        }
2004
2005        mutex_unlock(&sc->mutex);
2006}
2007
2008static bool ath9k_has_tx_pending(struct ath_softc *sc,
2009                                 bool sw_pending)
2010{
2011        int i, npend = 0;
2012
2013        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2014                if (!ATH_TXQ_SETUP(sc, i))
2015                        continue;
2016
2017                npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2018                                                 sw_pending);
2019                if (npend)
2020                        break;
2021        }
2022
2023        return !!npend;
2024}
2025
2026static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2027                        u32 queues, bool drop)
2028{
2029        struct ath_softc *sc = hw->priv;
2030        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2031
2032        if (ath9k_is_chanctx_enabled()) {
2033                if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2034                        goto flush;
2035
2036                /*
2037                 * If MCC is active, extend the flush timeout
2038                 * and wait for the HW/SW queues to become
2039                 * empty. This needs to be done outside the
2040                 * sc->mutex lock to allow the channel scheduler
2041                 * to switch channel contexts.
2042                 *
2043                 * The vif queues have been stopped in mac80211,
2044                 * so there won't be any incoming frames.
2045                 */
2046                __ath9k_flush(hw, queues, drop, true, true);
2047                return;
2048        }
2049flush:
2050        mutex_lock(&sc->mutex);
2051        __ath9k_flush(hw, queues, drop, true, false);
2052        mutex_unlock(&sc->mutex);
2053}
2054
2055void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2056                   bool sw_pending, bool timeout_override)
2057{
2058        struct ath_softc *sc = hw->priv;
2059        struct ath_hw *ah = sc->sc_ah;
2060        struct ath_common *common = ath9k_hw_common(ah);
2061        int timeout;
2062        bool drain_txq;
2063
2064        cancel_delayed_work_sync(&sc->tx_complete_work);
2065
2066        if (ah->ah_flags & AH_UNPLUGGED) {
2067                ath_dbg(common, ANY, "Device has been unplugged!\n");
2068                return;
2069        }
2070
2071        if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2072                ath_dbg(common, ANY, "Device not present\n");
2073                return;
2074        }
2075
2076        spin_lock_bh(&sc->chan_lock);
2077        if (timeout_override)
2078                timeout = HZ / 5;
2079        else
2080                timeout = sc->cur_chan->flush_timeout;
2081        spin_unlock_bh(&sc->chan_lock);
2082
2083        ath_dbg(common, CHAN_CTX,
2084                "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2085
2086        if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2087                               timeout) > 0)
2088                drop = false;
2089
2090        if (drop) {
2091                ath9k_ps_wakeup(sc);
2092                spin_lock_bh(&sc->sc_pcu_lock);
2093                drain_txq = ath_drain_all_txq(sc);
2094                spin_unlock_bh(&sc->sc_pcu_lock);
2095
2096                if (!drain_txq)
2097                        ath_reset(sc, NULL);
2098
2099                ath9k_ps_restore(sc);
2100        }
2101
2102        ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2103}
2104
2105static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2106{
2107        struct ath_softc *sc = hw->priv;
2108
2109        return ath9k_has_tx_pending(sc, true);
2110}
2111
2112static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2113{
2114        struct ath_softc *sc = hw->priv;
2115        struct ath_hw *ah = sc->sc_ah;
2116        struct ieee80211_vif *vif;
2117        struct ath_vif *avp;
2118        struct ath_buf *bf;
2119        struct ath_tx_status ts;
2120        bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2121        int status;
2122
2123        vif = sc->beacon.bslot[0];
2124        if (!vif)
2125                return 0;
2126
2127        if (!vif->bss_conf.enable_beacon)
2128                return 0;
2129
2130        avp = (void *)vif->drv_priv;
2131
2132        if (!sc->beacon.tx_processed && !edma) {
2133                tasklet_disable(&sc->bcon_tasklet);
2134
2135                bf = avp->av_bcbuf;
2136                if (!bf || !bf->bf_mpdu)
2137                        goto skip;
2138
2139                status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2140                if (status == -EINPROGRESS)
2141                        goto skip;
2142
2143                sc->beacon.tx_processed = true;
2144                sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2145
2146skip:
2147                tasklet_enable(&sc->bcon_tasklet);
2148        }
2149
2150        return sc->beacon.tx_last;
2151}
2152
2153static int ath9k_get_stats(struct ieee80211_hw *hw,
2154                           struct ieee80211_low_level_stats *stats)
2155{
2156        struct ath_softc *sc = hw->priv;
2157        struct ath_hw *ah = sc->sc_ah;
2158        struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2159
2160        stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2161        stats->dot11RTSFailureCount = mib_stats->rts_bad;
2162        stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2163        stats->dot11RTSSuccessCount = mib_stats->rts_good;
2164        return 0;
2165}
2166
2167static u32 fill_chainmask(u32 cap, u32 new)
2168{
2169        u32 filled = 0;
2170        int i;
2171
2172        for (i = 0; cap && new; i++, cap >>= 1) {
2173                if (!(cap & BIT(0)))
2174                        continue;
2175
2176                if (new & BIT(0))
2177                        filled |= BIT(i);
2178
2179                new >>= 1;
2180        }
2181
2182        return filled;
2183}
2184
2185static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2186{
2187        if (AR_SREV_9300_20_OR_LATER(ah))
2188                return true;
2189
2190        switch (val & 0x7) {
2191        case 0x1:
2192        case 0x3:
2193        case 0x7:
2194                return true;
2195        case 0x2:
2196                return (ah->caps.rx_chainmask == 1);
2197        default:
2198                return false;
2199        }
2200}
2201
2202static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2203{
2204        struct ath_softc *sc = hw->priv;
2205        struct ath_hw *ah = sc->sc_ah;
2206
2207        if (ah->caps.rx_chainmask != 1)
2208                rx_ant |= tx_ant;
2209
2210        if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2211                return -EINVAL;
2212
2213        sc->ant_rx = rx_ant;
2214        sc->ant_tx = tx_ant;
2215
2216        if (ah->caps.rx_chainmask == 1)
2217                return 0;
2218
2219        /* AR9100 runs into calibration issues if not all rx chains are enabled */
2220        if (AR_SREV_9100(ah))
2221                ah->rxchainmask = 0x7;
2222        else
2223                ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2224
2225        ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2226        ath9k_cmn_reload_chainmask(ah);
2227
2228        return 0;
2229}
2230
2231static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2232{
2233        struct ath_softc *sc = hw->priv;
2234
2235        *tx_ant = sc->ant_tx;
2236        *rx_ant = sc->ant_rx;
2237        return 0;
2238}
2239
2240static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2241                                struct ieee80211_vif *vif,
2242                                const u8 *mac_addr)
2243{
2244        struct ath_softc *sc = hw->priv;
2245        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2246        set_bit(ATH_OP_SCANNING, &common->op_flags);
2247}
2248
2249static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2250                                   struct ieee80211_vif *vif)
2251{
2252        struct ath_softc *sc = hw->priv;
2253        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2254        clear_bit(ATH_OP_SCANNING, &common->op_flags);
2255}
2256
2257#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2258
2259static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2260{
2261        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2262
2263        if (sc->offchannel.roc_vif) {
2264                ath_dbg(common, CHAN_CTX,
2265                        "%s: Aborting RoC\n", __func__);
2266
2267                del_timer_sync(&sc->offchannel.timer);
2268                if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2269                        ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2270        }
2271
2272        if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2273                ath_dbg(common, CHAN_CTX,
2274                        "%s: Aborting HW scan\n", __func__);
2275
2276                del_timer_sync(&sc->offchannel.timer);
2277                ath_scan_complete(sc, true);
2278        }
2279}
2280
2281static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2282                         struct ieee80211_scan_request *hw_req)
2283{
2284        struct cfg80211_scan_request *req = &hw_req->req;
2285        struct ath_softc *sc = hw->priv;
2286        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2287        int ret = 0;
2288
2289        mutex_lock(&sc->mutex);
2290
2291        if (WARN_ON(sc->offchannel.scan_req)) {
2292                ret = -EBUSY;
2293                goto out;
2294        }
2295
2296        ath9k_ps_wakeup(sc);
2297        set_bit(ATH_OP_SCANNING, &common->op_flags);
2298        sc->offchannel.scan_vif = vif;
2299        sc->offchannel.scan_req = req;
2300        sc->offchannel.scan_idx = 0;
2301
2302        ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2303                vif->addr);
2304
2305        if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2306                ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2307                ath_offchannel_next(sc);
2308        }
2309
2310out:
2311        mutex_unlock(&sc->mutex);
2312
2313        return ret;
2314}
2315
2316static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2317                                 struct ieee80211_vif *vif)
2318{
2319        struct ath_softc *sc = hw->priv;
2320        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2321
2322        ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2323
2324        mutex_lock(&sc->mutex);
2325        del_timer_sync(&sc->offchannel.timer);
2326        ath_scan_complete(sc, true);
2327        mutex_unlock(&sc->mutex);
2328}
2329
2330static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2331                                   struct ieee80211_vif *vif,
2332                                   struct ieee80211_channel *chan, int duration,
2333                                   enum ieee80211_roc_type type)
2334{
2335        struct ath_softc *sc = hw->priv;
2336        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2337        int ret = 0;
2338
2339        mutex_lock(&sc->mutex);
2340
2341        if (WARN_ON(sc->offchannel.roc_vif)) {
2342                ret = -EBUSY;
2343                goto out;
2344        }
2345
2346        ath9k_ps_wakeup(sc);
2347        sc->offchannel.roc_vif = vif;
2348        sc->offchannel.roc_chan = chan;
2349        sc->offchannel.roc_duration = duration;
2350
2351        ath_dbg(common, CHAN_CTX,
2352                "RoC request on vif: %pM, type: %d duration: %d\n",
2353                vif->addr, type, duration);
2354
2355        if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2356                ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2357                ath_offchannel_next(sc);
2358        }
2359
2360out:
2361        mutex_unlock(&sc->mutex);
2362
2363        return ret;
2364}
2365
2366static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2367{
2368        struct ath_softc *sc = hw->priv;
2369        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2370
2371        mutex_lock(&sc->mutex);
2372
2373        ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2374        del_timer_sync(&sc->offchannel.timer);
2375
2376        if (sc->offchannel.roc_vif) {
2377                if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2378                        ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2379        }
2380
2381        mutex_unlock(&sc->mutex);
2382
2383        return 0;
2384}
2385
2386static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2387                             struct ieee80211_chanctx_conf *conf)
2388{
2389        struct ath_softc *sc = hw->priv;
2390        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2391        struct ath_chanctx *ctx, **ptr;
2392        int pos;
2393
2394        mutex_lock(&sc->mutex);
2395
2396        ath_for_each_chanctx(sc, ctx) {
2397                if (ctx->assigned)
2398                        continue;
2399
2400                ptr = (void *) conf->drv_priv;
2401                *ptr = ctx;
2402                ctx->assigned = true;
2403                pos = ctx - &sc->chanctx[0];
2404                ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2405
2406                ath_dbg(common, CHAN_CTX,
2407                        "Add channel context: %d MHz\n",
2408                        conf->def.chan->center_freq);
2409
2410                ath_chanctx_set_channel(sc, ctx, &conf->def);
2411
2412                mutex_unlock(&sc->mutex);
2413                return 0;
2414        }
2415
2416        mutex_unlock(&sc->mutex);
2417        return -ENOSPC;
2418}
2419
2420
2421static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2422                                 struct ieee80211_chanctx_conf *conf)
2423{
2424        struct ath_softc *sc = hw->priv;
2425        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2426        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2427
2428        mutex_lock(&sc->mutex);
2429
2430        ath_dbg(common, CHAN_CTX,
2431                "Remove channel context: %d MHz\n",
2432                conf->def.chan->center_freq);
2433
2434        ctx->assigned = false;
2435        ctx->hw_queue_base = 0;
2436        ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2437
2438        mutex_unlock(&sc->mutex);
2439}
2440
2441static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2442                                 struct ieee80211_chanctx_conf *conf,
2443                                 u32 changed)
2444{
2445        struct ath_softc *sc = hw->priv;
2446        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2447        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2448
2449        mutex_lock(&sc->mutex);
2450        ath_dbg(common, CHAN_CTX,
2451                "Change channel context: %d MHz\n",
2452                conf->def.chan->center_freq);
2453        ath_chanctx_set_channel(sc, ctx, &conf->def);
2454        mutex_unlock(&sc->mutex);
2455}
2456
2457static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2458                                    struct ieee80211_vif *vif,
2459                                    struct ieee80211_chanctx_conf *conf)
2460{
2461        struct ath_softc *sc = hw->priv;
2462        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2463        struct ath_vif *avp = (void *)vif->drv_priv;
2464        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2465        int i;
2466
2467        ath9k_cancel_pending_offchannel(sc);
2468
2469        mutex_lock(&sc->mutex);
2470
2471        ath_dbg(common, CHAN_CTX,
2472                "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2473                vif->addr, vif->type, vif->p2p,
2474                conf->def.chan->center_freq);
2475
2476        avp->chanctx = ctx;
2477        ctx->nvifs_assigned++;
2478        list_add_tail(&avp->list, &ctx->vifs);
2479        ath9k_calculate_summary_state(sc, ctx);
2480        for (i = 0; i < IEEE80211_NUM_ACS; i++)
2481                vif->hw_queue[i] = ctx->hw_queue_base + i;
2482
2483        mutex_unlock(&sc->mutex);
2484
2485        return 0;
2486}
2487
2488static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2489                                       struct ieee80211_vif *vif,
2490                                       struct ieee80211_chanctx_conf *conf)
2491{
2492        struct ath_softc *sc = hw->priv;
2493        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2494        struct ath_vif *avp = (void *)vif->drv_priv;
2495        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2496        int ac;
2497
2498        ath9k_cancel_pending_offchannel(sc);
2499
2500        mutex_lock(&sc->mutex);
2501
2502        ath_dbg(common, CHAN_CTX,
2503                "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2504                vif->addr, vif->type, vif->p2p,
2505                conf->def.chan->center_freq);
2506
2507        avp->chanctx = NULL;
2508        ctx->nvifs_assigned--;
2509        list_del(&avp->list);
2510        ath9k_calculate_summary_state(sc, ctx);
2511        for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2512                vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2513
2514        mutex_unlock(&sc->mutex);
2515}
2516
2517static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2518                                 struct ieee80211_vif *vif)
2519{
2520        struct ath_softc *sc = hw->priv;
2521        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2522        struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2523        struct ath_beacon_config *cur_conf;
2524        struct ath_chanctx *go_ctx;
2525        unsigned long timeout;
2526        bool changed = false;
2527        u32 beacon_int;
2528
2529        if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2530                return;
2531
2532        if (!avp->chanctx)
2533                return;
2534
2535        mutex_lock(&sc->mutex);
2536
2537        spin_lock_bh(&sc->chan_lock);
2538        if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2539                changed = true;
2540        spin_unlock_bh(&sc->chan_lock);
2541
2542        if (!changed)
2543                goto out;
2544
2545        ath9k_cancel_pending_offchannel(sc);
2546
2547        go_ctx = ath_is_go_chanctx_present(sc);
2548
2549        if (go_ctx) {
2550                /*
2551                 * Wait till the GO interface gets a chance
2552                 * to send out an NoA.
2553                 */
2554                spin_lock_bh(&sc->chan_lock);
2555                sc->sched.mgd_prepare_tx = true;
2556                cur_conf = &go_ctx->beacon;
2557                beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2558                spin_unlock_bh(&sc->chan_lock);
2559
2560                timeout = usecs_to_jiffies(beacon_int * 2);
2561                init_completion(&sc->go_beacon);
2562
2563                mutex_unlock(&sc->mutex);
2564
2565                if (wait_for_completion_timeout(&sc->go_beacon,
2566                                                timeout) == 0) {
2567                        ath_dbg(common, CHAN_CTX,
2568                                "Failed to send new NoA\n");
2569
2570                        spin_lock_bh(&sc->chan_lock);
2571                        sc->sched.mgd_prepare_tx = false;
2572                        spin_unlock_bh(&sc->chan_lock);
2573                }
2574
2575                mutex_lock(&sc->mutex);
2576        }
2577
2578        ath_dbg(common, CHAN_CTX,
2579                "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2580                __func__, vif->addr);
2581
2582        spin_lock_bh(&sc->chan_lock);
2583        sc->next_chan = avp->chanctx;
2584        sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2585        spin_unlock_bh(&sc->chan_lock);
2586
2587        ath_chanctx_set_next(sc, true);
2588out:
2589        mutex_unlock(&sc->mutex);
2590}
2591
2592void ath9k_fill_chanctx_ops(void)
2593{
2594        if (!ath9k_is_chanctx_enabled())
2595                return;
2596
2597        ath9k_ops.hw_scan                  = ath9k_hw_scan;
2598        ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2599        ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2600        ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2601        ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2602        ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2603        ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2604        ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2605        ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2606        ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2607}
2608
2609#endif
2610
2611static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2612                             int *dbm)
2613{
2614        struct ath_softc *sc = hw->priv;
2615        struct ath_vif *avp = (void *)vif->drv_priv;
2616
2617        mutex_lock(&sc->mutex);
2618        if (avp->chanctx)
2619                *dbm = avp->chanctx->cur_txpower;
2620        else
2621                *dbm = sc->cur_chan->cur_txpower;
2622        mutex_unlock(&sc->mutex);
2623
2624        *dbm /= 2;
2625
2626        return 0;
2627}
2628
2629struct ieee80211_ops ath9k_ops = {
2630        .tx                 = ath9k_tx,
2631        .start              = ath9k_start,
2632        .stop               = ath9k_stop,
2633        .add_interface      = ath9k_add_interface,
2634        .change_interface   = ath9k_change_interface,
2635        .remove_interface   = ath9k_remove_interface,
2636        .config             = ath9k_config,
2637        .configure_filter   = ath9k_configure_filter,
2638        .sta_state          = ath9k_sta_state,
2639        .sta_notify         = ath9k_sta_notify,
2640        .conf_tx            = ath9k_conf_tx,
2641        .bss_info_changed   = ath9k_bss_info_changed,
2642        .set_key            = ath9k_set_key,
2643        .get_tsf            = ath9k_get_tsf,
2644        .set_tsf            = ath9k_set_tsf,
2645        .reset_tsf          = ath9k_reset_tsf,
2646        .ampdu_action       = ath9k_ampdu_action,
2647        .get_survey         = ath9k_get_survey,
2648        .rfkill_poll        = ath9k_rfkill_poll_state,
2649        .set_coverage_class = ath9k_set_coverage_class,
2650        .flush              = ath9k_flush,
2651        .tx_frames_pending  = ath9k_tx_frames_pending,
2652        .tx_last_beacon     = ath9k_tx_last_beacon,
2653        .release_buffered_frames = ath9k_release_buffered_frames,
2654        .get_stats          = ath9k_get_stats,
2655        .set_antenna        = ath9k_set_antenna,
2656        .get_antenna        = ath9k_get_antenna,
2657
2658#ifdef CONFIG_ATH9K_WOW
2659        .suspend            = ath9k_suspend,
2660        .resume             = ath9k_resume,
2661        .set_wakeup         = ath9k_set_wakeup,
2662#endif
2663
2664#ifdef CONFIG_ATH9K_DEBUGFS
2665        .get_et_sset_count  = ath9k_get_et_sset_count,
2666        .get_et_stats       = ath9k_get_et_stats,
2667        .get_et_strings     = ath9k_get_et_strings,
2668#endif
2669
2670#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2671        .sta_add_debugfs    = ath9k_sta_add_debugfs,
2672#endif
2673        .sw_scan_start      = ath9k_sw_scan_start,
2674        .sw_scan_complete   = ath9k_sw_scan_complete,
2675        .get_txpower        = ath9k_get_txpower,
2676};
2677