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20#ifndef _MWIFIEX_IOCTL_H_
21#define _MWIFIEX_IOCTL_H_
22
23#include <net/lib80211.h>
24
25enum {
26 MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
27 MWIFIEX_SCAN_TYPE_ACTIVE,
28 MWIFIEX_SCAN_TYPE_PASSIVE
29};
30
31struct mwifiex_user_scan {
32 u32 scan_cfg_len;
33 u8 scan_cfg_buf[1];
34};
35
36#define MWIFIEX_PROMISC_MODE 1
37#define MWIFIEX_MULTICAST_MODE 2
38#define MWIFIEX_ALL_MULTI_MODE 4
39#define MWIFIEX_MAX_MULTICAST_LIST_SIZE 32
40
41struct mwifiex_multicast_list {
42 u32 mode;
43 u32 num_multicast_addr;
44 u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
45};
46
47struct mwifiex_chan_freq {
48 u32 channel;
49 u32 freq;
50};
51
52struct mwifiex_ssid_bssid {
53 struct cfg80211_ssid ssid;
54 u8 bssid[ETH_ALEN];
55};
56
57enum {
58 BAND_B = 1,
59 BAND_G = 2,
60 BAND_A = 4,
61 BAND_GN = 8,
62 BAND_AN = 16,
63 BAND_AAC = 32,
64};
65
66#define MWIFIEX_WPA_PASSHPHRASE_LEN 64
67struct wpa_param {
68 u8 pairwise_cipher_wpa;
69 u8 pairwise_cipher_wpa2;
70 u8 group_cipher;
71 u32 length;
72 u8 passphrase[MWIFIEX_WPA_PASSHPHRASE_LEN];
73};
74
75struct wep_key {
76 u8 key_index;
77 u8 is_default;
78 u16 length;
79 u8 key[WLAN_KEY_LEN_WEP104];
80};
81
82#define KEY_MGMT_ON_HOST 0x03
83#define MWIFIEX_AUTH_MODE_AUTO 0xFF
84#define BAND_CONFIG_BG 0x00
85#define BAND_CONFIG_A 0x01
86#define MWIFIEX_SUPPORTED_RATES 14
87#define MWIFIEX_SUPPORTED_RATES_EXT 32
88#define MWIFIEX_TDLS_SUPPORTED_RATES 8
89#define MWIFIEX_TDLS_DEF_QOS_CAPAB 0xf
90#define MWIFIEX_PRIO_BK 2
91#define MWIFIEX_PRIO_VI 5
92
93struct mwifiex_uap_bss_param {
94 u8 channel;
95 u8 band_cfg;
96 u16 rts_threshold;
97 u16 frag_threshold;
98 u8 retry_limit;
99 struct mwifiex_802_11_ssid ssid;
100 u8 bcast_ssid_ctl;
101 u8 radio_ctl;
102 u8 dtim_period;
103 u16 beacon_period;
104 u16 auth_mode;
105 u16 protocol;
106 u16 key_mgmt;
107 u16 key_mgmt_operation;
108 struct wpa_param wpa_cfg;
109 struct wep_key wep_cfg[NUM_WEP_KEYS];
110 struct ieee80211_ht_cap ht_cap;
111 struct ieee80211_vht_cap vht_cap;
112 u8 rates[MWIFIEX_SUPPORTED_RATES];
113 u32 sta_ao_timer;
114 u32 ps_sta_ao_timer;
115 u8 qos_info;
116 u8 power_constraint;
117 struct mwifiex_types_wmm_info wmm_info;
118};
119
120enum {
121 ADHOC_IDLE,
122 ADHOC_STARTED,
123 ADHOC_JOINED,
124 ADHOC_COALESCED
125};
126
127struct mwifiex_ds_get_stats {
128 u32 mcast_tx_frame;
129 u32 failed;
130 u32 retry;
131 u32 multi_retry;
132 u32 frame_dup;
133 u32 rts_success;
134 u32 rts_failure;
135 u32 ack_failure;
136 u32 rx_frag;
137 u32 mcast_rx_frame;
138 u32 fcs_error;
139 u32 tx_frame;
140 u32 wep_icv_error[4];
141 u32 bcn_rcv_cnt;
142 u32 bcn_miss_cnt;
143};
144
145#define MWIFIEX_MAX_VER_STR_LEN 128
146
147struct mwifiex_ver_ext {
148 u32 version_str_sel;
149 char version_str[MWIFIEX_MAX_VER_STR_LEN];
150};
151
152struct mwifiex_bss_info {
153 u32 bss_mode;
154 struct cfg80211_ssid ssid;
155 u32 bss_chan;
156 u8 country_code[3];
157 u32 media_connected;
158 u32 max_power_level;
159 u32 min_power_level;
160 u32 adhoc_state;
161 signed int bcn_nf_last;
162 u32 wep_status;
163 u32 is_hs_configured;
164 u32 is_deep_sleep;
165 u8 bssid[ETH_ALEN];
166};
167
168#define MAX_NUM_TID 8
169
170#define MAX_RX_WINSIZE 64
171
172struct mwifiex_ds_rx_reorder_tbl {
173 u16 tid;
174 u8 ta[ETH_ALEN];
175 u32 start_win;
176 u32 win_size;
177 u32 buffer[MAX_RX_WINSIZE];
178};
179
180struct mwifiex_ds_tx_ba_stream_tbl {
181 u16 tid;
182 u8 ra[ETH_ALEN];
183 u8 amsdu;
184};
185
186#define DBG_CMD_NUM 5
187#define MWIFIEX_DBG_SDIO_MP_NUM 10
188
189struct tdls_peer_info {
190 u8 peer_addr[ETH_ALEN];
191};
192
193struct mwifiex_debug_info {
194 unsigned int debug_mask;
195 u32 int_counter;
196 u32 packets_out[MAX_NUM_TID];
197 u32 tx_buf_size;
198 u32 curr_tx_buf_size;
199 u32 tx_tbl_num;
200 struct mwifiex_ds_tx_ba_stream_tbl
201 tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
202 u32 rx_tbl_num;
203 struct mwifiex_ds_rx_reorder_tbl rx_tbl
204 [MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
205 u32 tdls_peer_num;
206 struct tdls_peer_info tdls_list
207 [MWIFIEX_MAX_TDLS_PEER_SUPPORTED];
208 u16 ps_mode;
209 u32 ps_state;
210 u8 is_deep_sleep;
211 u8 pm_wakeup_card_req;
212 u32 pm_wakeup_fw_try;
213 u8 is_hs_configured;
214 u8 hs_activated;
215 u32 num_cmd_host_to_card_failure;
216 u32 num_cmd_sleep_cfm_host_to_card_failure;
217 u32 num_tx_host_to_card_failure;
218 u32 num_event_deauth;
219 u32 num_event_disassoc;
220 u32 num_event_link_lost;
221 u32 num_cmd_deauth;
222 u32 num_cmd_assoc_success;
223 u32 num_cmd_assoc_failure;
224 u32 num_tx_timeout;
225 u8 is_cmd_timedout;
226 u16 timeout_cmd_id;
227 u16 timeout_cmd_act;
228 u16 last_cmd_id[DBG_CMD_NUM];
229 u16 last_cmd_act[DBG_CMD_NUM];
230 u16 last_cmd_index;
231 u16 last_cmd_resp_id[DBG_CMD_NUM];
232 u16 last_cmd_resp_index;
233 u16 last_event[DBG_CMD_NUM];
234 u16 last_event_index;
235 u8 data_sent;
236 u8 cmd_sent;
237 u8 cmd_resp_received;
238 u8 event_received;
239 u32 last_mp_wr_bitmap[MWIFIEX_DBG_SDIO_MP_NUM];
240 u32 last_mp_wr_ports[MWIFIEX_DBG_SDIO_MP_NUM];
241 u32 last_mp_wr_len[MWIFIEX_DBG_SDIO_MP_NUM];
242 u32 last_mp_curr_wr_port[MWIFIEX_DBG_SDIO_MP_NUM];
243 u8 last_sdio_mp_index;
244};
245
246#define MWIFIEX_KEY_INDEX_UNICAST 0x40000000
247#define PN_LEN 16
248
249struct mwifiex_ds_encrypt_key {
250 u32 key_disable;
251 u32 key_index;
252 u32 key_len;
253 u8 key_material[WLAN_MAX_KEY_LEN];
254 u8 mac_addr[ETH_ALEN];
255 u32 is_wapi_key;
256 u8 pn[PN_LEN];
257 u8 pn_len;
258 u8 is_igtk_key;
259 u8 is_current_wep_key;
260 u8 is_rx_seq_valid;
261};
262
263struct mwifiex_power_cfg {
264 u32 is_power_auto;
265 u32 power_level;
266};
267
268struct mwifiex_ds_hs_cfg {
269 u32 is_invoke_hostcmd;
270
271
272
273
274
275 u32 conditions;
276 u32 gpio;
277 u32 gap;
278};
279
280struct mwifiex_ds_wakeup_reason {
281 u16 hs_wakeup_reason;
282};
283
284#define DEEP_SLEEP_ON 1
285#define DEEP_SLEEP_OFF 0
286#define DEEP_SLEEP_IDLE_TIME 100
287#define PS_MODE_AUTO 1
288
289struct mwifiex_ds_auto_ds {
290 u16 auto_ds;
291 u16 idle_time;
292};
293
294struct mwifiex_ds_pm_cfg {
295 union {
296 u32 ps_mode;
297 struct mwifiex_ds_hs_cfg hs_cfg;
298 struct mwifiex_ds_auto_ds auto_deep_sleep;
299 u32 sleep_period;
300 } param;
301};
302
303struct mwifiex_11ac_vht_cfg {
304 u8 band_config;
305 u8 misc_config;
306 u32 cap_info;
307 u32 mcs_tx_set;
308 u32 mcs_rx_set;
309};
310
311struct mwifiex_ds_11n_tx_cfg {
312 u16 tx_htcap;
313 u16 tx_htinfo;
314 u16 misc_config;
315};
316
317struct mwifiex_ds_11n_amsdu_aggr_ctrl {
318 u16 enable;
319 u16 curr_buf_size;
320};
321
322struct mwifiex_ds_ant_cfg {
323 u32 tx_ant;
324 u32 rx_ant;
325};
326
327#define MWIFIEX_NUM_OF_CMD_BUFFER 50
328#define MWIFIEX_SIZE_OF_CMD_BUFFER 2048
329
330enum {
331 MWIFIEX_IE_TYPE_GEN_IE = 0,
332 MWIFIEX_IE_TYPE_ARP_FILTER,
333};
334
335enum {
336 MWIFIEX_REG_MAC = 1,
337 MWIFIEX_REG_BBP,
338 MWIFIEX_REG_RF,
339 MWIFIEX_REG_PMIC,
340 MWIFIEX_REG_CAU,
341};
342
343struct mwifiex_ds_reg_rw {
344 __le32 type;
345 __le32 offset;
346 __le32 value;
347};
348
349#define MAX_EEPROM_DATA 256
350
351struct mwifiex_ds_read_eeprom {
352 __le16 offset;
353 __le16 byte_count;
354 u8 value[MAX_EEPROM_DATA];
355};
356
357struct mwifiex_ds_mem_rw {
358 u32 addr;
359 u32 value;
360};
361
362#define IEEE_MAX_IE_SIZE 256
363
364#define MWIFIEX_IE_HDR_SIZE (sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE)
365
366struct mwifiex_ds_misc_gen_ie {
367 u32 type;
368 u32 len;
369 u8 ie_data[IEEE_MAX_IE_SIZE];
370};
371
372struct mwifiex_ds_misc_cmd {
373 u32 len;
374 u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
375};
376
377#define BITMASK_BCN_RSSI_LOW BIT(0)
378#define BITMASK_BCN_RSSI_HIGH BIT(4)
379
380enum subsc_evt_rssi_state {
381 EVENT_HANDLED,
382 RSSI_LOW_RECVD,
383 RSSI_HIGH_RECVD
384};
385
386struct subsc_evt_cfg {
387 u8 abs_value;
388 u8 evt_freq;
389};
390
391struct mwifiex_ds_misc_subsc_evt {
392 u16 action;
393 u16 events;
394 struct subsc_evt_cfg bcn_l_rssi_cfg;
395 struct subsc_evt_cfg bcn_h_rssi_cfg;
396};
397
398#define MWIFIEX_MEF_MAX_BYTESEQ 6
399#define MWIFIEX_MEF_MAX_FILTERS 10
400
401struct mwifiex_mef_filter {
402 u16 repeat;
403 u16 offset;
404 s8 byte_seq[MWIFIEX_MEF_MAX_BYTESEQ + 1];
405 u8 filt_type;
406 u8 filt_action;
407};
408
409struct mwifiex_mef_entry {
410 u8 mode;
411 u8 action;
412 struct mwifiex_mef_filter filter[MWIFIEX_MEF_MAX_FILTERS];
413};
414
415struct mwifiex_ds_mef_cfg {
416 u32 criteria;
417 u16 num_entries;
418 struct mwifiex_mef_entry *mef_entry;
419};
420
421#define MWIFIEX_MAX_VSIE_LEN (256)
422#define MWIFIEX_MAX_VSIE_NUM (8)
423#define MWIFIEX_VSIE_MASK_CLEAR 0x00
424#define MWIFIEX_VSIE_MASK_SCAN 0x01
425#define MWIFIEX_VSIE_MASK_ASSOC 0x02
426#define MWIFIEX_VSIE_MASK_ADHOC 0x04
427#define MWIFIEX_VSIE_MASK_BGSCAN 0x08
428
429enum {
430 MWIFIEX_FUNC_INIT = 1,
431 MWIFIEX_FUNC_SHUTDOWN,
432};
433
434enum COALESCE_OPERATION {
435 RECV_FILTER_MATCH_TYPE_EQ = 0x80,
436 RECV_FILTER_MATCH_TYPE_NE,
437};
438
439enum COALESCE_PACKET_TYPE {
440 PACKET_TYPE_UNICAST = 1,
441 PACKET_TYPE_MULTICAST = 2,
442 PACKET_TYPE_BROADCAST = 3
443};
444
445#define MWIFIEX_COALESCE_MAX_RULES 8
446#define MWIFIEX_COALESCE_MAX_BYTESEQ 4
447#define MWIFIEX_COALESCE_MAX_FILTERS 4
448#define MWIFIEX_MAX_COALESCING_DELAY 100
449
450struct filt_field_param {
451 u8 operation;
452 u8 operand_len;
453 u16 offset;
454 u8 operand_byte_stream[MWIFIEX_COALESCE_MAX_BYTESEQ];
455};
456
457struct mwifiex_coalesce_rule {
458 u16 max_coalescing_delay;
459 u8 num_of_fields;
460 u8 pkt_type;
461 struct filt_field_param params[MWIFIEX_COALESCE_MAX_FILTERS];
462};
463
464struct mwifiex_ds_coalesce_cfg {
465 u16 num_of_rules;
466 struct mwifiex_coalesce_rule rule[MWIFIEX_COALESCE_MAX_RULES];
467};
468
469struct mwifiex_ds_tdls_oper {
470 u16 tdls_action;
471 u8 peer_mac[ETH_ALEN];
472 u16 capability;
473 u8 qos_info;
474 u8 *ext_capab;
475 u8 ext_capab_len;
476 u8 *supp_rates;
477 u8 supp_rates_len;
478 u8 *ht_capab;
479};
480
481#endif
482
