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17#ifndef __RSI_MGMT_H__
18#define __RSI_MGMT_H__
19
20#include <linux/sort.h>
21#include "rsi_boot_params.h"
22#include "rsi_main.h"
23
24#define MAX_MGMT_PKT_SIZE 512
25#define RSI_NEEDED_HEADROOM 80
26#define RSI_RCV_BUFFER_LEN 2000
27
28#define RSI_11B_MODE 0
29#define RSI_11G_MODE BIT(7)
30#define RETRY_COUNT 8
31#define RETRY_LONG 4
32#define RETRY_SHORT 7
33#define WMM_SHORT_SLOT_TIME 9
34#define SIFS_DURATION 16
35
36#define KEY_TYPE_CLEAR 0
37#define RSI_PAIRWISE_KEY 1
38#define RSI_GROUP_KEY 2
39
40
41#define WLAN_MAC_EEPROM_ADDR 40
42#define WLAN_MAC_MAGIC_WORD_LEN 0x01
43#define WLAN_HOST_MODE_LEN 0x04
44#define WLAN_FW_VERSION_LEN 0x08
45#define MAGIC_WORD 0x5A
46
47
48#define TA_CONFIRM_TYPE 0x01
49#define RX_DOT11_MGMT 0x02
50#define TX_STATUS_IND 0x04
51#define PROBEREQ_CONFIRM 2
52#define CARD_READY_IND 0x00
53
54#define RSI_DELETE_PEER 0x0
55#define RSI_ADD_PEER 0x1
56#define START_AMPDU_AGGR 0x1
57#define STOP_AMPDU_AGGR 0x0
58#define INTERNAL_MGMT_PKT 0x99
59
60#define PUT_BBP_RESET 0
61#define BBP_REG_WRITE 0
62#define RF_RESET_ENABLE BIT(3)
63#define RATE_INFO_ENABLE BIT(0)
64#define RSI_BROADCAST_PKT BIT(9)
65
66#define UPPER_20_ENABLE (0x2 << 12)
67#define LOWER_20_ENABLE (0x4 << 12)
68#define FULL40M_ENABLE 0x6
69
70#define RSI_LMAC_CLOCK_80MHZ 0x1
71#define RSI_ENABLE_40MHZ (0x1 << 3)
72#define ENABLE_SHORTGI_RATE BIT(9)
73
74#define RX_BA_INDICATION 1
75#define RSI_TBL_SZ 40
76#define MAX_RETRIES 8
77#define RSI_IFTYPE_STATION 0
78
79#define STD_RATE_MCS7 0x07
80#define STD_RATE_MCS6 0x06
81#define STD_RATE_MCS5 0x05
82#define STD_RATE_MCS4 0x04
83#define STD_RATE_MCS3 0x03
84#define STD_RATE_MCS2 0x02
85#define STD_RATE_MCS1 0x01
86#define STD_RATE_MCS0 0x00
87#define STD_RATE_54 0x6c
88#define STD_RATE_48 0x60
89#define STD_RATE_36 0x48
90#define STD_RATE_24 0x30
91#define STD_RATE_18 0x24
92#define STD_RATE_12 0x18
93#define STD_RATE_11 0x16
94#define STD_RATE_09 0x12
95#define STD_RATE_06 0x0C
96#define STD_RATE_5_5 0x0B
97#define STD_RATE_02 0x04
98#define STD_RATE_01 0x02
99
100#define RSI_RF_TYPE 1
101#define RSI_RATE_00 0x00
102#define RSI_RATE_1 0x0
103#define RSI_RATE_2 0x2
104#define RSI_RATE_5_5 0x4
105#define RSI_RATE_11 0x6
106#define RSI_RATE_6 0x8b
107#define RSI_RATE_9 0x8f
108#define RSI_RATE_12 0x8a
109#define RSI_RATE_18 0x8e
110#define RSI_RATE_24 0x89
111#define RSI_RATE_36 0x8d
112#define RSI_RATE_48 0x88
113#define RSI_RATE_54 0x8c
114#define RSI_RATE_MCS0 0x100
115#define RSI_RATE_MCS1 0x101
116#define RSI_RATE_MCS2 0x102
117#define RSI_RATE_MCS3 0x103
118#define RSI_RATE_MCS4 0x104
119#define RSI_RATE_MCS5 0x105
120#define RSI_RATE_MCS6 0x106
121#define RSI_RATE_MCS7 0x107
122#define RSI_RATE_MCS7_SG 0x307
123
124#define BW_20MHZ 0
125#define BW_40MHZ 1
126
127#define EP_2GHZ_20MHZ 0
128#define EP_2GHZ_40MHZ 1
129#define EP_5GHZ_20MHZ 2
130#define EP_5GHZ_40MHZ 3
131
132#define SIFS_TX_11N_VALUE 580
133#define SIFS_TX_11B_VALUE 346
134#define SHORT_SLOT_VALUE 360
135#define LONG_SLOT_VALUE 640
136#define OFDM_ACK_TOUT_VALUE 2720
137#define CCK_ACK_TOUT_VALUE 9440
138#define LONG_PREAMBLE 0x0000
139#define SHORT_PREAMBLE 0x0001
140
141#define RSI_SUPP_FILTERS (FIF_ALLMULTI | FIF_PROBE_REQ |\
142 FIF_BCN_PRBRESP_PROMISC)
143enum opmode {
144 STA_OPMODE = 1,
145 AP_OPMODE = 2
146};
147
148extern struct ieee80211_rate rsi_rates[12];
149extern const u16 rsi_mcsrates[8];
150
151enum sta_notify_events {
152 STA_CONNECTED = 0,
153 STA_DISCONNECTED,
154 STA_TX_ADDBA_DONE,
155 STA_TX_DELBA,
156 STA_RX_ADDBA_DONE,
157 STA_RX_DELBA
158};
159
160
161enum cmd_frame_type {
162 TX_DOT11_MGMT,
163 RESET_MAC_REQ,
164 RADIO_CAPABILITIES,
165 BB_PROG_VALUES_REQUEST,
166 RF_PROG_VALUES_REQUEST,
167 WAKEUP_SLEEP_REQUEST,
168 SCAN_REQUEST,
169 TSF_UPDATE,
170 PEER_NOTIFY,
171 BLOCK_HW_QUEUE,
172 SET_KEY_REQ,
173 AUTO_RATE_IND,
174 BOOTUP_PARAMS_REQUEST,
175 VAP_CAPABILITIES,
176 EEPROM_READ_TYPE ,
177 EEPROM_WRITE,
178 GPIO_PIN_CONFIG ,
179 SET_RX_FILTER,
180 AMPDU_IND,
181 STATS_REQUEST_FRAME,
182 BB_BUF_PROG_VALUES_REQ,
183 BBP_PROG_IN_TA,
184 BG_SCAN_PARAMS,
185 BG_SCAN_PROBE_REQ,
186 CW_MODE_REQ,
187 PER_CMD_PKT
188};
189
190struct rsi_mac_frame {
191 __le16 desc_word[8];
192} __packed;
193
194struct rsi_boot_params {
195 __le16 desc_word[8];
196 struct bootup_params bootup_params;
197} __packed;
198
199struct rsi_peer_notify {
200 __le16 desc_word[8];
201 u8 mac_addr[6];
202 __le16 command;
203 __le16 mpdu_density;
204 __le16 reserved;
205 __le32 sta_flags;
206} __packed;
207
208struct rsi_vap_caps {
209 __le16 desc_word[8];
210 u8 mac_addr[6];
211 __le16 keep_alive_period;
212 u8 bssid[6];
213 __le16 reserved;
214 __le32 flags;
215 __le16 frag_threshold;
216 __le16 rts_threshold;
217 __le32 default_mgmt_rate;
218 __le32 default_ctrl_rate;
219 __le32 default_data_rate;
220 __le16 beacon_interval;
221 __le16 dtim_period;
222} __packed;
223
224struct rsi_set_key {
225 __le16 desc_word[8];
226 u8 key[4][32];
227 u8 tx_mic_key[8];
228 u8 rx_mic_key[8];
229} __packed;
230
231struct rsi_auto_rate {
232 __le16 desc_word[8];
233 __le16 failure_limit;
234 __le16 initial_boundary;
235 __le16 max_threshold_limt;
236 __le16 num_supported_rates;
237 __le16 aarf_rssi;
238 __le16 moderate_rate_inx;
239 __le16 collision_tolerance;
240 __le16 supported_rates[40];
241} __packed;
242
243struct qos_params {
244 __le16 cont_win_min_q;
245 __le16 cont_win_max_q;
246 __le16 aifsn_val_q;
247 __le16 txop_q;
248} __packed;
249
250struct rsi_radio_caps {
251 __le16 desc_word[8];
252 struct qos_params qos_params[MAX_HW_QUEUES];
253 u8 num_11n_rates;
254 u8 num_11ac_rates;
255 __le16 gcpd_per_rate[20];
256 __le16 sifs_tx_11n;
257 __le16 sifs_tx_11b;
258 __le16 slot_rx_11n;
259 __le16 ofdm_ack_tout;
260 __le16 cck_ack_tout;
261 __le16 preamble_type;
262} __packed;
263
264static inline u32 rsi_get_queueno(u8 *addr, u16 offset)
265{
266 return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12;
267}
268
269static inline u32 rsi_get_length(u8 *addr, u16 offset)
270{
271 return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff;
272}
273
274static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset)
275{
276 return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff;
277}
278
279static inline u8 rsi_get_rssi(u8 *addr)
280{
281 return *(u8 *)(addr + FRAME_DESC_SZ);
282}
283
284static inline u8 rsi_get_channel(u8 *addr)
285{
286 return *(char *)(addr + 15);
287}
288
289int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg);
290int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode);
291int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid,
292 u16 ssn, u8 buf_size, u8 event);
293int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len,
294 u8 key_type, u8 key_id, u32 cipher);
295int rsi_set_channel(struct rsi_common *common, u16 chno);
296int rsi_send_block_unblock_frame(struct rsi_common *common, bool event);
297void rsi_inform_bss_status(struct rsi_common *common, u8 status,
298 const u8 *bssid, u8 qos_enable, u16 aid);
299void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb);
300int rsi_mac80211_attach(struct rsi_common *common);
301void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb,
302 int status);
303bool rsi_is_cipher_wep(struct rsi_common *common);
304void rsi_core_qos_processor(struct rsi_common *common);
305void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb);
306int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb);
307int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb);
308int rsi_band_check(struct rsi_common *common);
309#endif
310
