LXR linux/drivers/net/wireless/ti/wl1251/rx.h

   1/*
   2 * This file is part of wl1251
   3 *
   4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
   5 * Copyright (C) 2008 Nokia Corporation
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License
   9 * version 2 as published by the Free Software Foundation.
  10 *
  11 * This program is distributed in the hope that it will be useful, but
  12 * WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19 * 02110-1301 USA
  20 *
  21 */
  22
  23#ifndef __WL1251_RX_H__
  24#define __WL1251_RX_H__
  25
  26#include <linux/bitops.h>
  27
  28#include "wl1251.h"
  29
  30/*
  31 * RX PATH
  32 *
  33 * The Rx path uses a double buffer and an rx_contro structure, each located
  34 * at a fixed address in the device memory. The host keeps track of which
  35 * buffer is available and alternates between them on a per packet basis.
  36 * The size of each of the two buffers is large enough to hold the longest
  37 * 802.3 packet.
  38 * The RX path goes like that:
  39 * 1) The target generates an interrupt each time a new packet is received.
  40 *   There are 2 RX interrupts, one for each buffer.
  41 * 2) The host reads the received packet from one of the double buffers.
  42 * 3) The host triggers a target interrupt.
  43 * 4) The target prepares the next RX packet.
  44 */
  45
  46#define WL1251_RX_MAX_RSSI -30
  47#define WL1251_RX_MIN_RSSI -95
  48
  49#define WL1251_RX_ALIGN_TO 4
  50#define WL1251_RX_ALIGN(len) (((len) + WL1251_RX_ALIGN_TO - 1) & \
  51                             ~(WL1251_RX_ALIGN_TO - 1))
  52
  53#define SHORT_PREAMBLE_BIT   BIT(0)
  54#define OFDM_RATE_BIT        BIT(6)
  55#define PBCC_RATE_BIT        BIT(7)
  56
  57#define PLCP_HEADER_LENGTH 8
  58#define RX_DESC_PACKETID_SHIFT 11
  59#define RX_MAX_PACKET_ID 3
  60
  61#define RX_DESC_VALID_FCS         0x0001
  62#define RX_DESC_MATCH_RXADDR1     0x0002
  63#define RX_DESC_MCAST             0x0004
  64#define RX_DESC_STAINTIM          0x0008
  65#define RX_DESC_VIRTUAL_BM        0x0010
  66#define RX_DESC_BCAST             0x0020
  67#define RX_DESC_MATCH_SSID        0x0040
  68#define RX_DESC_MATCH_BSSID       0x0080
  69#define RX_DESC_ENCRYPTION_MASK   0x0300
  70#define RX_DESC_MEASURMENT        0x0400
  71#define RX_DESC_SEQNUM_MASK       0x1800
  72#define RX_DESC_MIC_FAIL          0x2000
  73#define RX_DESC_DECRYPT_FAIL      0x4000
  74
  75struct wl1251_rx_descriptor {
  76        u32 timestamp; /* In microseconds */
  77        u16 length; /* Paylod length, including headers */
  78        u16 flags;
  79
  80        /*
  81         * 0 - 802.11
  82         * 1 - 802.3
  83         * 2 - IP
  84         * 3 - Raw Codec
  85         */
  86        u8 type;
  87
  88        /*
  89         * Received Rate:
  90         * 0x0A - 1MBPS
  91         * 0x14 - 2MBPS
  92         * 0x37 - 5_5MBPS
  93         * 0x0B - 6MBPS
  94         * 0x0F - 9MBPS
  95         * 0x6E - 11MBPS
  96         * 0x0A - 12MBPS
  97         * 0x0E - 18MBPS
  98         * 0xDC - 22MBPS
  99         * 0x09 - 24MBPS
 100         * 0x0D - 36MBPS
 101         * 0x08 - 48MBPS
 102         * 0x0C - 54MBPS
 103         */
 104        u8 rate;
 105
 106        u8 mod_pre; /* Modulation and preamble */
 107        u8 channel;
 108
 109        /*
 110         * 0 - 2.4 Ghz
 111         * 1 - 5 Ghz
 112         */
 113        u8 band;
 114
 115        s8 rssi; /* in dB */
 116        u8 rcpi; /* in dB */
 117        u8 snr; /* in dB */
 118} __packed;
 119
 120void wl1251_rx(struct wl1251 *wl);
 121
 122#endif
 123