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25#ifndef __RX_H__
26#define __RX_H__
27
28#include <linux/bitops.h>
29
30#define WL1271_RX_MAX_RSSI -30
31#define WL1271_RX_MIN_RSSI -95
32
33#define RSSI_LEVEL_BITMASK 0x7F
34#define ANT_DIVERSITY_BITMASK BIT(7)
35
36#define SHORT_PREAMBLE_BIT BIT(0)
37#define OFDM_RATE_BIT BIT(6)
38#define PBCC_RATE_BIT BIT(7)
39
40#define PLCP_HEADER_LENGTH 8
41#define RX_DESC_PACKETID_SHIFT 11
42#define RX_MAX_PACKET_ID 3
43
44#define RX_DESC_VALID_FCS 0x0001
45#define RX_DESC_MATCH_RXADDR1 0x0002
46#define RX_DESC_MCAST 0x0004
47#define RX_DESC_STAINTIM 0x0008
48#define RX_DESC_VIRTUAL_BM 0x0010
49#define RX_DESC_BCAST 0x0020
50#define RX_DESC_MATCH_SSID 0x0040
51#define RX_DESC_MATCH_BSSID 0x0080
52#define RX_DESC_ENCRYPTION_MASK 0x0300
53#define RX_DESC_MEASURMENT 0x0400
54#define RX_DESC_SEQNUM_MASK 0x1800
55#define RX_DESC_MIC_FAIL 0x2000
56#define RX_DESC_DECRYPT_FAIL 0x4000
57
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64
65
66
67#define WL1271_RX_DESC_BAND_MASK 0x03
68#define WL1271_RX_DESC_ENCRYPT_MASK 0xE0
69
70#define WL1271_RX_DESC_BAND_BG 0x00
71#define WL1271_RX_DESC_BAND_J 0x01
72#define WL1271_RX_DESC_BAND_A 0x02
73
74#define WL1271_RX_DESC_STBC BIT(2)
75#define WL1271_RX_DESC_A_MPDU BIT(3)
76#define WL1271_RX_DESC_HT BIT(4)
77
78#define WL1271_RX_DESC_ENCRYPT_WEP 0x20
79#define WL1271_RX_DESC_ENCRYPT_TKIP 0x40
80#define WL1271_RX_DESC_ENCRYPT_AES 0x60
81#define WL1271_RX_DESC_ENCRYPT_GEM 0x80
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88
89
90#define WL1271_RX_DESC_STATUS_MASK 0x07
91
92#define WL1271_RX_DESC_SUCCESS 0x00
93#define WL1271_RX_DESC_DECRYPT_FAIL 0x01
94#define WL1271_RX_DESC_MIC_FAIL 0x02
95
96#define RX_MEM_BLOCK_MASK 0xFF
97#define RX_BUF_SIZE_MASK 0xFFF00
98#define RX_BUF_SIZE_SHIFT_DIV 6
99#define ALIGNED_RX_BUF_SIZE_MASK 0xFFFF00
100#define ALIGNED_RX_BUF_SIZE_SHIFT 8
101
102
103#define RX_BUF_UNALIGNED_PAYLOAD BIT(20)
104
105
106#define RX_BUF_PADDED_PAYLOAD BIT(30)
107
108
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110
111
112#define RX_BUF_ALIGN 2
113
114
115enum wl_rx_buf_align {
116 WLCORE_RX_BUF_ALIGNED,
117 WLCORE_RX_BUF_UNALIGNED,
118 WLCORE_RX_BUF_PADDED,
119};
120
121enum {
122 WL12XX_RX_CLASS_UNKNOWN,
123 WL12XX_RX_CLASS_MANAGEMENT,
124 WL12XX_RX_CLASS_DATA,
125 WL12XX_RX_CLASS_QOS_DATA,
126 WL12XX_RX_CLASS_BCN_PRBRSP,
127 WL12XX_RX_CLASS_EAPOL,
128 WL12XX_RX_CLASS_BA_EVENT,
129 WL12XX_RX_CLASS_AMSDU,
130 WL12XX_RX_CLASS_LOGGER,
131};
132
133struct wl1271_rx_descriptor {
134 __le16 length;
135 u8 status;
136 u8 flags;
137 u8 rate;
138 u8 channel;
139 s8 rssi;
140 u8 snr;
141 __le32 timestamp;
142 u8 packet_class;
143 u8 hlid;
144 u8 pad_len;
145 u8 reserved;
146} __packed;
147
148int wlcore_rx(struct wl1271 *wl, struct wl_fw_status *status);
149u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band);
150int wl1271_rx_filter_enable(struct wl1271 *wl,
151 int index, bool enable,
152 struct wl12xx_rx_filter *filter);
153int wl1271_rx_filter_clear_all(struct wl1271 *wl);
154
155#endif
156