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18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21#include <linux/bcd.h>
22#include <linux/delay.h>
23#include <linux/io.h>
24#include <linux/module.h>
25#include <linux/platform_device.h>
26#include <linux/rtc.h>
27#include <linux/workqueue.h>
28
29#include <linux/rtc/ds1685.h>
30
31#ifdef CONFIG_PROC_FS
32#include <linux/proc_fs.h>
33#endif
34
35#define DRV_VERSION "0.42.0"
36
37
38
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40
41
42
43
44
45
46static u8
47ds1685_read(struct ds1685_priv *rtc, int reg)
48{
49 return readb((u8 __iomem *)rtc->regs +
50 (reg * rtc->regstep));
51}
52
53
54
55
56
57
58
59static void
60ds1685_write(struct ds1685_priv *rtc, int reg, u8 value)
61{
62 writeb(value, ((u8 __iomem *)rtc->regs +
63 (reg * rtc->regstep)));
64}
65
66
67
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69
70
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74
75
76
77
78
79
80static inline u8
81ds1685_rtc_bcd2bin(struct ds1685_priv *rtc, u8 val, u8 bcd_mask, u8 bin_mask)
82{
83 if (rtc->bcd_mode)
84 return (bcd2bin(val) & bcd_mask);
85
86 return (val & bin_mask);
87}
88
89
90
91
92
93
94
95
96
97
98static inline u8
99ds1685_rtc_bin2bcd(struct ds1685_priv *rtc, u8 val, u8 bin_mask, u8 bcd_mask)
100{
101 if (rtc->bcd_mode)
102 return (bin2bcd(val) & bcd_mask);
103
104 return (val & bin_mask);
105}
106
107
108
109
110
111static inline void
112ds1685_rtc_switch_to_bank0(struct ds1685_priv *rtc)
113{
114 rtc->write(rtc, RTC_CTRL_A,
115 (rtc->read(rtc, RTC_CTRL_A) & ~(RTC_CTRL_A_DV0)));
116}
117
118
119
120
121
122static inline void
123ds1685_rtc_switch_to_bank1(struct ds1685_priv *rtc)
124{
125 rtc->write(rtc, RTC_CTRL_A,
126 (rtc->read(rtc, RTC_CTRL_A) | RTC_CTRL_A_DV0));
127}
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142static inline void
143ds1685_rtc_begin_data_access(struct ds1685_priv *rtc)
144{
145
146 rtc->write(rtc, RTC_CTRL_B,
147 (rtc->read(rtc, RTC_CTRL_B) | RTC_CTRL_B_SET));
148
149
150 while (rtc->read(rtc, RTC_EXT_CTRL_4A) & RTC_CTRL_4A_INCR)
151 cpu_relax();
152
153
154 ds1685_rtc_switch_to_bank1(rtc);
155}
156
157
158
159
160
161
162
163
164
165static inline void
166ds1685_rtc_end_data_access(struct ds1685_priv *rtc)
167{
168
169 ds1685_rtc_switch_to_bank1(rtc);
170
171
172 rtc->write(rtc, RTC_CTRL_B,
173 (rtc->read(rtc, RTC_CTRL_B) & ~(RTC_CTRL_B_SET)));
174}
175
176
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186
187
188
189static inline void
190ds1685_rtc_begin_ctrl_access(struct ds1685_priv *rtc, unsigned long *flags)
191{
192 spin_lock_irqsave(&rtc->lock, *flags);
193 ds1685_rtc_switch_to_bank1(rtc);
194}
195
196
197
198
199
200
201
202
203
204
205static inline void
206ds1685_rtc_end_ctrl_access(struct ds1685_priv *rtc, unsigned long flags)
207{
208 ds1685_rtc_switch_to_bank0(rtc);
209 spin_unlock_irqrestore(&rtc->lock, flags);
210}
211
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224
225
226static inline void
227ds1685_rtc_get_ssn(struct ds1685_priv *rtc, u8 *ssn)
228{
229 ssn[0] = rtc->read(rtc, RTC_BANK1_SSN_MODEL);
230 ssn[1] = rtc->read(rtc, RTC_BANK1_SSN_BYTE_1);
231 ssn[2] = rtc->read(rtc, RTC_BANK1_SSN_BYTE_2);
232 ssn[3] = rtc->read(rtc, RTC_BANK1_SSN_BYTE_3);
233 ssn[4] = rtc->read(rtc, RTC_BANK1_SSN_BYTE_4);
234 ssn[5] = rtc->read(rtc, RTC_BANK1_SSN_BYTE_5);
235 ssn[6] = rtc->read(rtc, RTC_BANK1_SSN_BYTE_6);
236 ssn[7] = rtc->read(rtc, RTC_BANK1_SSN_CRC);
237}
238
239
240
241
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243
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246
247
248
249static int
250ds1685_rtc_read_time(struct device *dev, struct rtc_time *tm)
251{
252 struct platform_device *pdev = to_platform_device(dev);
253 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
254 u8 ctrlb, century;
255 u8 seconds, minutes, hours, wday, mday, month, years;
256
257
258 ds1685_rtc_begin_data_access(rtc);
259 seconds = rtc->read(rtc, RTC_SECS);
260 minutes = rtc->read(rtc, RTC_MINS);
261 hours = rtc->read(rtc, RTC_HRS);
262 wday = rtc->read(rtc, RTC_WDAY);
263 mday = rtc->read(rtc, RTC_MDAY);
264 month = rtc->read(rtc, RTC_MONTH);
265 years = rtc->read(rtc, RTC_YEAR);
266 century = rtc->read(rtc, RTC_CENTURY);
267 ctrlb = rtc->read(rtc, RTC_CTRL_B);
268 ds1685_rtc_end_data_access(rtc);
269
270
271 years = ds1685_rtc_bcd2bin(rtc, years, RTC_YEAR_BCD_MASK,
272 RTC_YEAR_BIN_MASK);
273 century = ds1685_rtc_bcd2bin(rtc, century, RTC_CENTURY_MASK,
274 RTC_CENTURY_MASK);
275 tm->tm_sec = ds1685_rtc_bcd2bin(rtc, seconds, RTC_SECS_BCD_MASK,
276 RTC_SECS_BIN_MASK);
277 tm->tm_min = ds1685_rtc_bcd2bin(rtc, minutes, RTC_MINS_BCD_MASK,
278 RTC_MINS_BIN_MASK);
279 tm->tm_hour = ds1685_rtc_bcd2bin(rtc, hours, RTC_HRS_24_BCD_MASK,
280 RTC_HRS_24_BIN_MASK);
281 tm->tm_wday = (ds1685_rtc_bcd2bin(rtc, wday, RTC_WDAY_MASK,
282 RTC_WDAY_MASK) - 1);
283 tm->tm_mday = ds1685_rtc_bcd2bin(rtc, mday, RTC_MDAY_BCD_MASK,
284 RTC_MDAY_BIN_MASK);
285 tm->tm_mon = (ds1685_rtc_bcd2bin(rtc, month, RTC_MONTH_BCD_MASK,
286 RTC_MONTH_BIN_MASK) - 1);
287 tm->tm_year = ((years + (century * 100)) - 1900);
288 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
289 tm->tm_isdst = 0;
290
291 return rtc_valid_tm(tm);
292}
293
294
295
296
297
298
299static int
300ds1685_rtc_set_time(struct device *dev, struct rtc_time *tm)
301{
302 struct platform_device *pdev = to_platform_device(dev);
303 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
304 u8 ctrlb, seconds, minutes, hours, wday, mday, month, years, century;
305
306
307 seconds = ds1685_rtc_bin2bcd(rtc, tm->tm_sec, RTC_SECS_BIN_MASK,
308 RTC_SECS_BCD_MASK);
309 minutes = ds1685_rtc_bin2bcd(rtc, tm->tm_min, RTC_MINS_BIN_MASK,
310 RTC_MINS_BCD_MASK);
311 hours = ds1685_rtc_bin2bcd(rtc, tm->tm_hour, RTC_HRS_24_BIN_MASK,
312 RTC_HRS_24_BCD_MASK);
313 wday = ds1685_rtc_bin2bcd(rtc, (tm->tm_wday + 1), RTC_WDAY_MASK,
314 RTC_WDAY_MASK);
315 mday = ds1685_rtc_bin2bcd(rtc, tm->tm_mday, RTC_MDAY_BIN_MASK,
316 RTC_MDAY_BCD_MASK);
317 month = ds1685_rtc_bin2bcd(rtc, (tm->tm_mon + 1), RTC_MONTH_BIN_MASK,
318 RTC_MONTH_BCD_MASK);
319 years = ds1685_rtc_bin2bcd(rtc, (tm->tm_year % 100),
320 RTC_YEAR_BIN_MASK, RTC_YEAR_BCD_MASK);
321 century = ds1685_rtc_bin2bcd(rtc, ((tm->tm_year + 1900) / 100),
322 RTC_CENTURY_MASK, RTC_CENTURY_MASK);
323
324
325
326
327
328
329
330 if ((tm->tm_mon > 11) || (mday == 0))
331 return -EDOM;
332
333 if (tm->tm_mday > rtc_month_days(tm->tm_mon, tm->tm_year))
334 return -EDOM;
335
336 if ((tm->tm_hour >= 24) || (tm->tm_min >= 60) ||
337 (tm->tm_sec >= 60) || (wday > 7))
338 return -EDOM;
339
340
341
342
343
344 ds1685_rtc_begin_data_access(rtc);
345 ctrlb = rtc->read(rtc, RTC_CTRL_B);
346 if (rtc->bcd_mode)
347 ctrlb &= ~(RTC_CTRL_B_DM);
348 else
349 ctrlb |= RTC_CTRL_B_DM;
350 rtc->write(rtc, RTC_CTRL_B, ctrlb);
351 rtc->write(rtc, RTC_SECS, seconds);
352 rtc->write(rtc, RTC_MINS, minutes);
353 rtc->write(rtc, RTC_HRS, hours);
354 rtc->write(rtc, RTC_WDAY, wday);
355 rtc->write(rtc, RTC_MDAY, mday);
356 rtc->write(rtc, RTC_MONTH, month);
357 rtc->write(rtc, RTC_YEAR, years);
358 rtc->write(rtc, RTC_CENTURY, century);
359 ds1685_rtc_end_data_access(rtc);
360
361 return 0;
362}
363
364
365
366
367
368
369
370
371
372
373
374
375
376static int
377ds1685_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
378{
379 struct platform_device *pdev = to_platform_device(dev);
380 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
381 u8 seconds, minutes, hours, mday, ctrlb, ctrlc;
382
383
384 ds1685_rtc_begin_data_access(rtc);
385 seconds = rtc->read(rtc, RTC_SECS_ALARM);
386 minutes = rtc->read(rtc, RTC_MINS_ALARM);
387 hours = rtc->read(rtc, RTC_HRS_ALARM);
388 mday = rtc->read(rtc, RTC_MDAY_ALARM);
389 ctrlb = rtc->read(rtc, RTC_CTRL_B);
390 ctrlc = rtc->read(rtc, RTC_CTRL_C);
391 ds1685_rtc_end_data_access(rtc);
392
393
394 if (!(mday >= 1) && (mday <= 31))
395 return -EDOM;
396
397
398
399
400
401
402
403
404 if (unlikely(seconds >= 0xc0))
405 alrm->time.tm_sec = -1;
406 else
407 alrm->time.tm_sec = ds1685_rtc_bcd2bin(rtc, seconds,
408 RTC_SECS_BCD_MASK,
409 RTC_SECS_BIN_MASK);
410
411 if (unlikely(minutes >= 0xc0))
412 alrm->time.tm_min = -1;
413 else
414 alrm->time.tm_min = ds1685_rtc_bcd2bin(rtc, minutes,
415 RTC_MINS_BCD_MASK,
416 RTC_MINS_BIN_MASK);
417
418 if (unlikely(hours >= 0xc0))
419 alrm->time.tm_hour = -1;
420 else
421 alrm->time.tm_hour = ds1685_rtc_bcd2bin(rtc, hours,
422 RTC_HRS_24_BCD_MASK,
423 RTC_HRS_24_BIN_MASK);
424
425
426 alrm->time.tm_mday = ds1685_rtc_bcd2bin(rtc, mday, RTC_MDAY_BCD_MASK,
427 RTC_MDAY_BIN_MASK);
428 alrm->time.tm_mon = -1;
429 alrm->time.tm_year = -1;
430 alrm->time.tm_wday = -1;
431 alrm->time.tm_yday = -1;
432 alrm->time.tm_isdst = -1;
433 alrm->enabled = !!(ctrlb & RTC_CTRL_B_AIE);
434 alrm->pending = !!(ctrlc & RTC_CTRL_C_AF);
435
436 return 0;
437}
438
439
440
441
442
443
444static int
445ds1685_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
446{
447 struct platform_device *pdev = to_platform_device(dev);
448 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
449 u8 ctrlb, seconds, minutes, hours, mday;
450
451
452 seconds = ds1685_rtc_bin2bcd(rtc, alrm->time.tm_sec,
453 RTC_SECS_BIN_MASK,
454 RTC_SECS_BCD_MASK);
455 minutes = ds1685_rtc_bin2bcd(rtc, alrm->time.tm_min,
456 RTC_MINS_BIN_MASK,
457 RTC_MINS_BCD_MASK);
458 hours = ds1685_rtc_bin2bcd(rtc, alrm->time.tm_hour,
459 RTC_HRS_24_BIN_MASK,
460 RTC_HRS_24_BCD_MASK);
461 mday = ds1685_rtc_bin2bcd(rtc, alrm->time.tm_mday,
462 RTC_MDAY_BIN_MASK,
463 RTC_MDAY_BCD_MASK);
464
465
466 if (!(mday >= 1) && (mday <= 31))
467 return -EDOM;
468
469
470
471
472
473
474
475
476
477 if (unlikely(seconds >= 0xc0))
478 seconds = 0xff;
479
480 if (unlikely(minutes >= 0xc0))
481 minutes = 0xff;
482
483 if (unlikely(hours >= 0xc0))
484 hours = 0xff;
485
486 alrm->time.tm_mon = -1;
487 alrm->time.tm_year = -1;
488 alrm->time.tm_wday = -1;
489 alrm->time.tm_yday = -1;
490 alrm->time.tm_isdst = -1;
491
492
493 ds1685_rtc_begin_data_access(rtc);
494 ctrlb = rtc->read(rtc, RTC_CTRL_B);
495 rtc->write(rtc, RTC_CTRL_B, (ctrlb & ~(RTC_CTRL_B_AIE)));
496
497
498 rtc->read(rtc, RTC_CTRL_C);
499
500
501
502
503
504 ctrlb = rtc->read(rtc, RTC_CTRL_B);
505 if (rtc->bcd_mode)
506 ctrlb &= ~(RTC_CTRL_B_DM);
507 else
508 ctrlb |= RTC_CTRL_B_DM;
509 rtc->write(rtc, RTC_CTRL_B, ctrlb);
510 rtc->write(rtc, RTC_SECS_ALARM, seconds);
511 rtc->write(rtc, RTC_MINS_ALARM, minutes);
512 rtc->write(rtc, RTC_HRS_ALARM, hours);
513 rtc->write(rtc, RTC_MDAY_ALARM, mday);
514
515
516 if (alrm->enabled) {
517 ctrlb = rtc->read(rtc, RTC_CTRL_B);
518 ctrlb |= RTC_CTRL_B_AIE;
519 rtc->write(rtc, RTC_CTRL_B, ctrlb);
520 }
521
522
523 ds1685_rtc_end_data_access(rtc);
524
525 return 0;
526}
527
528
529
530
531
532
533
534
535
536
537
538static int
539ds1685_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
540{
541 struct ds1685_priv *rtc = dev_get_drvdata(dev);
542 unsigned long flags = 0;
543
544
545 spin_lock_irqsave(&rtc->lock, flags);
546
547
548 if (enabled)
549 rtc->write(rtc, RTC_CTRL_B, (rtc->read(rtc, RTC_CTRL_B) |
550 RTC_CTRL_B_AIE));
551 else
552 rtc->write(rtc, RTC_CTRL_B, (rtc->read(rtc, RTC_CTRL_B) &
553 ~(RTC_CTRL_B_AIE)));
554
555
556 rtc->read(rtc, RTC_CTRL_C);
557 spin_unlock_irqrestore(&rtc->lock, flags);
558
559 return 0;
560}
561
562
563
564
565
566
567
568
569
570
571
572static irqreturn_t
573ds1685_rtc_irq_handler(int irq, void *dev_id)
574{
575 struct platform_device *pdev = dev_id;
576 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
577 u8 ctrlb, ctrlc;
578 unsigned long events = 0;
579 u8 num_irqs = 0;
580
581
582 if (unlikely(!rtc))
583 return IRQ_HANDLED;
584
585
586 spin_lock(&rtc->lock);
587 ctrlb = rtc->read(rtc, RTC_CTRL_B);
588 ctrlc = rtc->read(rtc, RTC_CTRL_C);
589
590
591 if (likely(ctrlc & RTC_CTRL_C_IRQF)) {
592
593
594
595
596
597 if (likely(ctrlc & RTC_CTRL_B_PAU_MASK)) {
598 events = RTC_IRQF;
599
600
601 if ((ctrlb & RTC_CTRL_B_PIE) &&
602 (ctrlc & RTC_CTRL_C_PF)) {
603 events |= RTC_PF;
604 num_irqs++;
605 }
606
607
608 if ((ctrlb & RTC_CTRL_B_AIE) &&
609 (ctrlc & RTC_CTRL_C_AF)) {
610 events |= RTC_AF;
611 num_irqs++;
612 }
613
614
615 if ((ctrlb & RTC_CTRL_B_UIE) &&
616 (ctrlc & RTC_CTRL_C_UF)) {
617 events |= RTC_UF;
618 num_irqs++;
619 }
620
621 rtc_update_irq(rtc->dev, num_irqs, events);
622 } else {
623
624
625
626
627
628
629
630
631 spin_unlock(&rtc->lock);
632 schedule_work(&rtc->work);
633 rtc_update_irq(rtc->dev, 0, 0);
634 return IRQ_HANDLED;
635 }
636 }
637 spin_unlock(&rtc->lock);
638
639 return events ? IRQ_HANDLED : IRQ_NONE;
640}
641
642
643
644
645
646static void
647ds1685_rtc_work_queue(struct work_struct *work)
648{
649 struct ds1685_priv *rtc = container_of(work,
650 struct ds1685_priv, work);
651 struct platform_device *pdev = to_platform_device(&rtc->dev->dev);
652 struct mutex *rtc_mutex = &rtc->dev->ops_lock;
653 u8 ctrl4a, ctrl4b;
654
655 mutex_lock(rtc_mutex);
656
657 ds1685_rtc_switch_to_bank1(rtc);
658 ctrl4a = rtc->read(rtc, RTC_EXT_CTRL_4A);
659 ctrl4b = rtc->read(rtc, RTC_EXT_CTRL_4B);
660
661
662
663
664
665
666 if ((ctrl4b & RTC_CTRL_4B_KSE) && (ctrl4a & RTC_CTRL_4A_KF)) {
667
668 rtc->write(rtc, RTC_EXT_CTRL_4B,
669 (rtc->read(rtc, RTC_EXT_CTRL_4B) &
670 ~(RTC_CTRL_4B_KSE)));
671
672
673 rtc->write(rtc, RTC_EXT_CTRL_4A,
674 (ctrl4a & ~(RTC_CTRL_4A_KF)));
675
676
677
678
679
680
681
682 msleep(500);
683 rtc->write(rtc, RTC_EXT_CTRL_4B,
684 (rtc->read(rtc, RTC_EXT_CTRL_4B) |
685 RTC_CTRL_4B_KSE));
686
687
688 if (rtc->prepare_poweroff != NULL)
689 rtc->prepare_poweroff();
690 else
691 ds1685_rtc_poweroff(pdev);
692 }
693
694
695
696
697
698
699
700 if ((ctrl4b & RTC_CTRL_4B_WIE) && (ctrl4a & RTC_CTRL_4A_WF)) {
701 rtc->write(rtc, RTC_EXT_CTRL_4A,
702 (ctrl4a & ~(RTC_CTRL_4A_WF)));
703
704
705 if (rtc->wake_alarm != NULL)
706 rtc->wake_alarm();
707 else
708 dev_warn(&pdev->dev,
709 "Wake Alarm IRQ just occurred!\n");
710 }
711
712
713
714
715
716
717
718
719
720
721
722 if ((ctrl4b & RTC_CTRL_4B_RIE) && (ctrl4a & RTC_CTRL_4A_RF)) {
723 rtc->write(rtc, RTC_EXT_CTRL_4A,
724 (ctrl4a & ~(RTC_CTRL_4A_RF)));
725 msleep(150);
726
727
728 if (rtc->post_ram_clear != NULL)
729 rtc->post_ram_clear();
730 else
731 dev_warn(&pdev->dev,
732 "RAM-Clear IRQ just occurred!\n");
733 }
734 ds1685_rtc_switch_to_bank0(rtc);
735
736 mutex_unlock(rtc_mutex);
737}
738
739
740
741
742
743
744#ifdef CONFIG_PROC_FS
745#define NUM_REGS 6
746#define NUM_BITS 8
747#define NUM_SPACES 4
748
749
750
751
752static const char *ds1685_rtc_pirq_rate[16] = {
753 "none", "3.90625ms", "7.8125ms", "0.122070ms", "0.244141ms",
754 "0.488281ms", "0.9765625ms", "1.953125ms", "3.90625ms", "7.8125ms",
755 "15.625ms", "31.25ms", "62.5ms", "125ms", "250ms", "500ms"
756};
757
758
759
760
761static const char *ds1685_rtc_sqw_freq[16] = {
762 "none", "256Hz", "128Hz", "8192Hz", "4096Hz", "2048Hz", "1024Hz",
763 "512Hz", "256Hz", "128Hz", "64Hz", "32Hz", "16Hz", "8Hz", "4Hz", "2Hz"
764};
765
766#ifdef CONFIG_RTC_DS1685_PROC_REGS
767
768
769
770
771
772
773
774
775static char*
776ds1685_rtc_print_regs(u8 hex, char *dest)
777{
778 u32 i, j;
779 char *tmp = dest;
780
781 for (i = 0; i < NUM_BITS; i++) {
782 *tmp++ = ((hex & 0x80) != 0 ? '1' : '0');
783 for (j = 0; j < NUM_SPACES; j++)
784 *tmp++ = ' ';
785 hex <<= 1;
786 }
787 *tmp++ = '\0';
788
789 return dest;
790}
791#endif
792
793
794
795
796
797
798static int
799ds1685_rtc_proc(struct device *dev, struct seq_file *seq)
800{
801 struct platform_device *pdev = to_platform_device(dev);
802 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
803 u8 ctrla, ctrlb, ctrlc, ctrld, ctrl4a, ctrl4b, ssn[8];
804 char *model;
805#ifdef CONFIG_RTC_DS1685_PROC_REGS
806 char bits[NUM_REGS][(NUM_BITS * NUM_SPACES) + NUM_BITS + 1];
807#endif
808
809
810 ds1685_rtc_switch_to_bank1(rtc);
811 ds1685_rtc_get_ssn(rtc, ssn);
812 ctrla = rtc->read(rtc, RTC_CTRL_A);
813 ctrlb = rtc->read(rtc, RTC_CTRL_B);
814 ctrlc = rtc->read(rtc, RTC_CTRL_C);
815 ctrld = rtc->read(rtc, RTC_CTRL_D);
816 ctrl4a = rtc->read(rtc, RTC_EXT_CTRL_4A);
817 ctrl4b = rtc->read(rtc, RTC_EXT_CTRL_4B);
818 ds1685_rtc_switch_to_bank0(rtc);
819
820
821 switch (ssn[0]) {
822 case RTC_MODEL_DS1685:
823 model = "DS1685/DS1687\0";
824 break;
825 case RTC_MODEL_DS1689:
826 model = "DS1689/DS1693\0";
827 break;
828 case RTC_MODEL_DS17285:
829 model = "DS17285/DS17287\0";
830 break;
831 case RTC_MODEL_DS17485:
832 model = "DS17485/DS17487\0";
833 break;
834 case RTC_MODEL_DS17885:
835 model = "DS17885/DS17887\0";
836 break;
837 default:
838 model = "Unknown\0";
839 break;
840 }
841
842
843 seq_printf(seq,
844 "Model\t\t: %s\n"
845 "Oscillator\t: %s\n"
846 "12/24hr\t\t: %s\n"
847 "DST\t\t: %s\n"
848 "Data mode\t: %s\n"
849 "Battery\t\t: %s\n"
850 "Aux batt\t: %s\n"
851 "Update IRQ\t: %s\n"
852 "Periodic IRQ\t: %s\n"
853 "Periodic Rate\t: %s\n"
854 "SQW Freq\t: %s\n"
855#ifdef CONFIG_RTC_DS1685_PROC_REGS
856 "Serial #\t: %8phC\n"
857 "Register Status\t:\n"
858 " Ctrl A\t: UIP DV2 DV1 DV0 RS3 RS2 RS1 RS0\n"
859 "\t\t: %s\n"
860 " Ctrl B\t: SET PIE AIE UIE SQWE DM 2412 DSE\n"
861 "\t\t: %s\n"
862 " Ctrl C\t: IRQF PF AF UF --- --- --- ---\n"
863 "\t\t: %s\n"
864 " Ctrl D\t: VRT --- --- --- --- --- --- ---\n"
865 "\t\t: %s\n"
866#if !defined(CONFIG_RTC_DRV_DS1685) && !defined(CONFIG_RTC_DRV_DS1689)
867 " Ctrl 4A\t: VRT2 INCR BME --- PAB RF WF KF\n"
868#else
869 " Ctrl 4A\t: VRT2 INCR --- --- PAB RF WF KF\n"
870#endif
871 "\t\t: %s\n"
872 " Ctrl 4B\t: ABE E32k CS RCE PRS RIE WIE KSE\n"
873 "\t\t: %s\n",
874#else
875 "Serial #\t: %8phC\n",
876#endif
877 model,
878 ((ctrla & RTC_CTRL_A_DV1) ? "enabled" : "disabled"),
879 ((ctrlb & RTC_CTRL_B_2412) ? "24-hour" : "12-hour"),
880 ((ctrlb & RTC_CTRL_B_DSE) ? "enabled" : "disabled"),
881 ((ctrlb & RTC_CTRL_B_DM) ? "binary" : "BCD"),
882 ((ctrld & RTC_CTRL_D_VRT) ? "ok" : "exhausted or n/a"),
883 ((ctrl4a & RTC_CTRL_4A_VRT2) ? "ok" : "exhausted or n/a"),
884 ((ctrlb & RTC_CTRL_B_UIE) ? "yes" : "no"),
885 ((ctrlb & RTC_CTRL_B_PIE) ? "yes" : "no"),
886 (!(ctrl4b & RTC_CTRL_4B_E32K) ?
887 ds1685_rtc_pirq_rate[(ctrla & RTC_CTRL_A_RS_MASK)] : "none"),
888 (!((ctrl4b & RTC_CTRL_4B_E32K)) ?
889 ds1685_rtc_sqw_freq[(ctrla & RTC_CTRL_A_RS_MASK)] : "32768Hz"),
890#ifdef CONFIG_RTC_DS1685_PROC_REGS
891 ssn,
892 ds1685_rtc_print_regs(ctrla, bits[0]),
893 ds1685_rtc_print_regs(ctrlb, bits[1]),
894 ds1685_rtc_print_regs(ctrlc, bits[2]),
895 ds1685_rtc_print_regs(ctrld, bits[3]),
896 ds1685_rtc_print_regs(ctrl4a, bits[4]),
897 ds1685_rtc_print_regs(ctrl4b, bits[5]));
898#else
899 ssn);
900#endif
901 return 0;
902}
903#else
904#define ds1685_rtc_proc NULL
905#endif
906
907
908
909
910
911
912static const struct rtc_class_ops
913ds1685_rtc_ops = {
914 .proc = ds1685_rtc_proc,
915 .read_time = ds1685_rtc_read_time,
916 .set_time = ds1685_rtc_set_time,
917 .read_alarm = ds1685_rtc_read_alarm,
918 .set_alarm = ds1685_rtc_set_alarm,
919 .alarm_irq_enable = ds1685_rtc_alarm_irq_enable,
920};
921
922
923
924
925
926
927#ifdef CONFIG_SYSFS
928
929
930
931
932
933
934
935
936
937static ssize_t
938ds1685_rtc_sysfs_nvram_read(struct file *filp, struct kobject *kobj,
939 struct bin_attribute *bin_attr, char *buf,
940 loff_t pos, size_t size)
941{
942 struct platform_device *pdev =
943 to_platform_device(container_of(kobj, struct device, kobj));
944 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
945 ssize_t count;
946 unsigned long flags = 0;
947
948 spin_lock_irqsave(&rtc->lock, flags);
949 ds1685_rtc_switch_to_bank0(rtc);
950
951
952 for (count = 0; size > 0 && pos < NVRAM_TOTAL_SZ_BANK0;
953 count++, size--) {
954 if (count < NVRAM_SZ_TIME)
955 *buf++ = rtc->read(rtc, (NVRAM_TIME_BASE + pos++));
956 else
957 *buf++ = rtc->read(rtc, (NVRAM_BANK0_BASE + pos++));
958 }
959
960#ifndef CONFIG_RTC_DRV_DS1689
961 if (size > 0) {
962 ds1685_rtc_switch_to_bank1(rtc);
963
964#ifndef CONFIG_RTC_DRV_DS1685
965
966 rtc->write(rtc, RTC_EXT_CTRL_4A,
967 (rtc->read(rtc, RTC_EXT_CTRL_4A) |
968 RTC_CTRL_4A_BME));
969
970
971
972 rtc->write(rtc, RTC_BANK1_RAM_ADDR_LSB,
973 (pos - NVRAM_TOTAL_SZ_BANK0));
974#endif
975
976
977 for (count = 0; size > 0 && pos < NVRAM_TOTAL_SZ;
978 count++, size--) {
979#ifdef CONFIG_RTC_DRV_DS1685
980
981
982 rtc->write(rtc, RTC_BANK1_RAM_ADDR,
983 (pos - NVRAM_TOTAL_SZ_BANK0));
984#endif
985 *buf++ = rtc->read(rtc, RTC_BANK1_RAM_DATA_PORT);
986 pos++;
987 }
988
989#ifndef CONFIG_RTC_DRV_DS1685
990
991 rtc->write(rtc, RTC_EXT_CTRL_4A,
992 (rtc->read(rtc, RTC_EXT_CTRL_4A) &
993 ~(RTC_CTRL_4A_BME)));
994#endif
995 ds1685_rtc_switch_to_bank0(rtc);
996 }
997#endif
998 spin_unlock_irqrestore(&rtc->lock, flags);
999
1000
1001
1002
1003
1004
1005 return count;
1006}
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017static ssize_t
1018ds1685_rtc_sysfs_nvram_write(struct file *filp, struct kobject *kobj,
1019 struct bin_attribute *bin_attr, char *buf,
1020 loff_t pos, size_t size)
1021{
1022 struct platform_device *pdev =
1023 to_platform_device(container_of(kobj, struct device, kobj));
1024 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
1025 ssize_t count;
1026 unsigned long flags = 0;
1027
1028 spin_lock_irqsave(&rtc->lock, flags);
1029 ds1685_rtc_switch_to_bank0(rtc);
1030
1031
1032 for (count = 0; size > 0 && pos < NVRAM_TOTAL_SZ_BANK0;
1033 count++, size--)
1034 if (count < NVRAM_SZ_TIME)
1035 rtc->write(rtc, (NVRAM_TIME_BASE + pos++),
1036 *buf++);
1037 else
1038 rtc->write(rtc, (NVRAM_BANK0_BASE), *buf++);
1039
1040#ifndef CONFIG_RTC_DRV_DS1689
1041 if (size > 0) {
1042 ds1685_rtc_switch_to_bank1(rtc);
1043
1044#ifndef CONFIG_RTC_DRV_DS1685
1045
1046 rtc->write(rtc, RTC_EXT_CTRL_4A,
1047 (rtc->read(rtc, RTC_EXT_CTRL_4A) |
1048 RTC_CTRL_4A_BME));
1049
1050
1051
1052 rtc->write(rtc, RTC_BANK1_RAM_ADDR_LSB,
1053 (pos - NVRAM_TOTAL_SZ_BANK0));
1054#endif
1055
1056
1057 for (count = 0; size > 0 && pos < NVRAM_TOTAL_SZ;
1058 count++, size--) {
1059#ifdef CONFIG_RTC_DRV_DS1685
1060
1061
1062 rtc->write(rtc, RTC_BANK1_RAM_ADDR,
1063 (pos - NVRAM_TOTAL_SZ_BANK0));
1064#endif
1065 rtc->write(rtc, RTC_BANK1_RAM_DATA_PORT, *buf++);
1066 pos++;
1067 }
1068
1069#ifndef CONFIG_RTC_DRV_DS1685
1070
1071 rtc->write(rtc, RTC_EXT_CTRL_4A,
1072 (rtc->read(rtc, RTC_EXT_CTRL_4A) &
1073 ~(RTC_CTRL_4A_BME)));
1074#endif
1075 ds1685_rtc_switch_to_bank0(rtc);
1076 }
1077#endif
1078 spin_unlock_irqrestore(&rtc->lock, flags);
1079
1080 return count;
1081}
1082
1083
1084
1085
1086
1087
1088
1089
1090static struct bin_attribute
1091ds1685_rtc_sysfs_nvram_attr = {
1092 .attr = {
1093 .name = "nvram",
1094 .mode = S_IRUGO | S_IWUSR,
1095 },
1096 .read = ds1685_rtc_sysfs_nvram_read,
1097 .write = ds1685_rtc_sysfs_nvram_write,
1098 .size = NVRAM_TOTAL_SZ
1099};
1100
1101
1102
1103
1104
1105
1106
1107static ssize_t
1108ds1685_rtc_sysfs_battery_show(struct device *dev,
1109 struct device_attribute *attr, char *buf)
1110{
1111 struct platform_device *pdev = to_platform_device(dev);
1112 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
1113 u8 ctrld;
1114
1115 ctrld = rtc->read(rtc, RTC_CTRL_D);
1116
1117 return sprintf(buf, "%s\n",
1118 (ctrld & RTC_CTRL_D_VRT) ? "ok" : "not ok or N/A");
1119}
1120static DEVICE_ATTR(battery, S_IRUGO, ds1685_rtc_sysfs_battery_show, NULL);
1121
1122
1123
1124
1125
1126
1127
1128static ssize_t
1129ds1685_rtc_sysfs_auxbatt_show(struct device *dev,
1130 struct device_attribute *attr, char *buf)
1131{
1132 struct platform_device *pdev = to_platform_device(dev);
1133 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
1134 u8 ctrl4a;
1135
1136 ds1685_rtc_switch_to_bank1(rtc);
1137 ctrl4a = rtc->read(rtc, RTC_EXT_CTRL_4A);
1138 ds1685_rtc_switch_to_bank0(rtc);
1139
1140 return sprintf(buf, "%s\n",
1141 (ctrl4a & RTC_CTRL_4A_VRT2) ? "ok" : "not ok or N/A");
1142}
1143static DEVICE_ATTR(auxbatt, S_IRUGO, ds1685_rtc_sysfs_auxbatt_show, NULL);
1144
1145
1146
1147
1148
1149
1150
1151static ssize_t
1152ds1685_rtc_sysfs_serial_show(struct device *dev,
1153 struct device_attribute *attr, char *buf)
1154{
1155 struct platform_device *pdev = to_platform_device(dev);
1156 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
1157 u8 ssn[8];
1158
1159 ds1685_rtc_switch_to_bank1(rtc);
1160 ds1685_rtc_get_ssn(rtc, ssn);
1161 ds1685_rtc_switch_to_bank0(rtc);
1162
1163 return sprintf(buf, "%8phC\n", ssn);
1164}
1165static DEVICE_ATTR(serial, S_IRUGO, ds1685_rtc_sysfs_serial_show, NULL);
1166
1167
1168
1169
1170static struct attribute*
1171ds1685_rtc_sysfs_misc_attrs[] = {
1172 &dev_attr_battery.attr,
1173 &dev_attr_auxbatt.attr,
1174 &dev_attr_serial.attr,
1175 NULL,
1176};
1177
1178
1179
1180
1181static const struct attribute_group
1182ds1685_rtc_sysfs_misc_grp = {
1183 .name = "misc",
1184 .attrs = ds1685_rtc_sysfs_misc_attrs,
1185};
1186
1187#ifdef CONFIG_RTC_DS1685_SYSFS_REGS
1188
1189
1190
1191
1192
1193
1194struct ds1685_rtc_ctrl_regs {
1195 const char *name;
1196 const u8 reg;
1197 const u8 bit;
1198};
1199
1200
1201
1202
1203static const struct ds1685_rtc_ctrl_regs
1204ds1685_ctrl_regs_table[] = {
1205 { "uip", RTC_CTRL_A, RTC_CTRL_A_UIP },
1206 { "dv2", RTC_CTRL_A, RTC_CTRL_A_DV2 },
1207 { "dv1", RTC_CTRL_A, RTC_CTRL_A_DV1 },
1208 { "dv0", RTC_CTRL_A, RTC_CTRL_A_DV0 },
1209 { "rs3", RTC_CTRL_A, RTC_CTRL_A_RS3 },
1210 { "rs2", RTC_CTRL_A, RTC_CTRL_A_RS2 },
1211 { "rs1", RTC_CTRL_A, RTC_CTRL_A_RS1 },
1212 { "rs0", RTC_CTRL_A, RTC_CTRL_A_RS0 },
1213 { "set", RTC_CTRL_B, RTC_CTRL_B_SET },
1214 { "pie", RTC_CTRL_B, RTC_CTRL_B_PIE },
1215 { "aie", RTC_CTRL_B, RTC_CTRL_B_AIE },
1216 { "uie", RTC_CTRL_B, RTC_CTRL_B_UIE },
1217 { "sqwe", RTC_CTRL_B, RTC_CTRL_B_SQWE },
1218 { "dm", RTC_CTRL_B, RTC_CTRL_B_DM },
1219 { "2412", RTC_CTRL_B, RTC_CTRL_B_2412 },
1220 { "dse", RTC_CTRL_B, RTC_CTRL_B_DSE },
1221 { "irqf", RTC_CTRL_C, RTC_CTRL_C_IRQF },
1222 { "pf", RTC_CTRL_C, RTC_CTRL_C_PF },
1223 { "af", RTC_CTRL_C, RTC_CTRL_C_AF },
1224 { "uf", RTC_CTRL_C, RTC_CTRL_C_UF },
1225 { "vrt", RTC_CTRL_D, RTC_CTRL_D_VRT },
1226 { "vrt2", RTC_EXT_CTRL_4A, RTC_CTRL_4A_VRT2 },
1227 { "incr", RTC_EXT_CTRL_4A, RTC_CTRL_4A_INCR },
1228 { "pab", RTC_EXT_CTRL_4A, RTC_CTRL_4A_PAB },
1229 { "rf", RTC_EXT_CTRL_4A, RTC_CTRL_4A_RF },
1230 { "wf", RTC_EXT_CTRL_4A, RTC_CTRL_4A_WF },
1231 { "kf", RTC_EXT_CTRL_4A, RTC_CTRL_4A_KF },
1232#if !defined(CONFIG_RTC_DRV_DS1685) && !defined(CONFIG_RTC_DRV_DS1689)
1233 { "bme", RTC_EXT_CTRL_4A, RTC_CTRL_4A_BME },
1234#endif
1235 { "abe", RTC_EXT_CTRL_4B, RTC_CTRL_4B_ABE },
1236 { "e32k", RTC_EXT_CTRL_4B, RTC_CTRL_4B_E32K },
1237 { "cs", RTC_EXT_CTRL_4B, RTC_CTRL_4B_CS },
1238 { "rce", RTC_EXT_CTRL_4B, RTC_CTRL_4B_RCE },
1239 { "prs", RTC_EXT_CTRL_4B, RTC_CTRL_4B_PRS },
1240 { "rie", RTC_EXT_CTRL_4B, RTC_CTRL_4B_RIE },
1241 { "wie", RTC_EXT_CTRL_4B, RTC_CTRL_4B_WIE },
1242 { "kse", RTC_EXT_CTRL_4B, RTC_CTRL_4B_KSE },
1243 { NULL, 0, 0 },
1244};
1245
1246
1247
1248
1249
1250static const struct ds1685_rtc_ctrl_regs*
1251ds1685_rtc_sysfs_ctrl_regs_lookup(const char *name)
1252{
1253 const struct ds1685_rtc_ctrl_regs *p = ds1685_ctrl_regs_table;
1254
1255 for (; p->name != NULL; ++p)
1256 if (strcmp(p->name, name) == 0)
1257 return p;
1258
1259 return NULL;
1260}
1261
1262
1263
1264
1265
1266
1267
1268static ssize_t
1269ds1685_rtc_sysfs_ctrl_regs_show(struct device *dev,
1270 struct device_attribute *attr, char *buf)
1271{
1272 u8 tmp;
1273 struct ds1685_priv *rtc = dev_get_drvdata(dev);
1274 const struct ds1685_rtc_ctrl_regs *reg_info =
1275 ds1685_rtc_sysfs_ctrl_regs_lookup(attr->attr.name);
1276
1277
1278 if (!reg_info)
1279 return -EINVAL;
1280
1281
1282 ds1685_rtc_switch_to_bank1(rtc);
1283 tmp = rtc->read(rtc, reg_info->reg) & reg_info->bit;
1284 ds1685_rtc_switch_to_bank0(rtc);
1285
1286 return sprintf(buf, "%d\n", (tmp ? 1 : 0));
1287}
1288
1289
1290
1291
1292
1293
1294
1295
1296static ssize_t
1297ds1685_rtc_sysfs_ctrl_regs_store(struct device *dev,
1298 struct device_attribute *attr,
1299 const char *buf, size_t count)
1300{
1301 struct ds1685_priv *rtc = dev_get_drvdata(dev);
1302 u8 reg = 0, bit = 0, tmp;
1303 unsigned long flags;
1304 long int val = 0;
1305 const struct ds1685_rtc_ctrl_regs *reg_info =
1306 ds1685_rtc_sysfs_ctrl_regs_lookup(attr->attr.name);
1307
1308
1309 if (kstrtol(buf, 10, &val) < 0)
1310 return -EINVAL;
1311
1312
1313 if ((val != 0) && (val != 1))
1314 return -ERANGE;
1315
1316
1317 if (!reg_info)
1318 return -EINVAL;
1319
1320 reg = reg_info->reg;
1321 bit = reg_info->bit;
1322
1323
1324 ds1685_rtc_begin_ctrl_access(rtc, &flags);
1325 tmp = rtc->read(rtc, reg);
1326 rtc->write(rtc, reg, (val ? (tmp | bit) : (tmp & ~(bit))));
1327 ds1685_rtc_end_ctrl_access(rtc, flags);
1328
1329 return count;
1330}
1331
1332
1333
1334
1335
1336#define DS1685_RTC_SYSFS_CTRL_REG_RO(bit) \
1337 static DEVICE_ATTR(bit, S_IRUGO, \
1338 ds1685_rtc_sysfs_ctrl_regs_show, NULL)
1339
1340
1341
1342
1343
1344#define DS1685_RTC_SYSFS_CTRL_REG_RW(bit) \
1345 static DEVICE_ATTR(bit, S_IRUGO | S_IWUSR, \
1346 ds1685_rtc_sysfs_ctrl_regs_show, \
1347 ds1685_rtc_sysfs_ctrl_regs_store)
1348
1349
1350
1351
1352DS1685_RTC_SYSFS_CTRL_REG_RO(uip);
1353DS1685_RTC_SYSFS_CTRL_REG_RW(dv2);
1354DS1685_RTC_SYSFS_CTRL_REG_RW(dv1);
1355DS1685_RTC_SYSFS_CTRL_REG_RO(dv0);
1356DS1685_RTC_SYSFS_CTRL_REG_RW(rs3);
1357DS1685_RTC_SYSFS_CTRL_REG_RW(rs2);
1358DS1685_RTC_SYSFS_CTRL_REG_RW(rs1);
1359DS1685_RTC_SYSFS_CTRL_REG_RW(rs0);
1360
1361static struct attribute*
1362ds1685_rtc_sysfs_ctrla_attrs[] = {
1363 &dev_attr_uip.attr,
1364 &dev_attr_dv2.attr,
1365 &dev_attr_dv1.attr,
1366 &dev_attr_dv0.attr,
1367 &dev_attr_rs3.attr,
1368 &dev_attr_rs2.attr,
1369 &dev_attr_rs1.attr,
1370 &dev_attr_rs0.attr,
1371 NULL,
1372};
1373
1374static const struct attribute_group
1375ds1685_rtc_sysfs_ctrla_grp = {
1376 .name = "ctrla",
1377 .attrs = ds1685_rtc_sysfs_ctrla_attrs,
1378};
1379
1380
1381
1382
1383
1384DS1685_RTC_SYSFS_CTRL_REG_RO(set);
1385DS1685_RTC_SYSFS_CTRL_REG_RW(pie);
1386DS1685_RTC_SYSFS_CTRL_REG_RW(aie);
1387DS1685_RTC_SYSFS_CTRL_REG_RW(uie);
1388DS1685_RTC_SYSFS_CTRL_REG_RW(sqwe);
1389DS1685_RTC_SYSFS_CTRL_REG_RO(dm);
1390DS1685_RTC_SYSFS_CTRL_REG_RO(2412);
1391DS1685_RTC_SYSFS_CTRL_REG_RO(dse);
1392
1393static struct attribute*
1394ds1685_rtc_sysfs_ctrlb_attrs[] = {
1395 &dev_attr_set.attr,
1396 &dev_attr_pie.attr,
1397 &dev_attr_aie.attr,
1398 &dev_attr_uie.attr,
1399 &dev_attr_sqwe.attr,
1400 &dev_attr_dm.attr,
1401 &dev_attr_2412.attr,
1402 &dev_attr_dse.attr,
1403 NULL,
1404};
1405
1406static const struct attribute_group
1407ds1685_rtc_sysfs_ctrlb_grp = {
1408 .name = "ctrlb",
1409 .attrs = ds1685_rtc_sysfs_ctrlb_attrs,
1410};
1411
1412
1413
1414
1415
1416
1417
1418
1419DS1685_RTC_SYSFS_CTRL_REG_RO(irqf);
1420DS1685_RTC_SYSFS_CTRL_REG_RO(pf);
1421DS1685_RTC_SYSFS_CTRL_REG_RO(af);
1422DS1685_RTC_SYSFS_CTRL_REG_RO(uf);
1423
1424static struct attribute*
1425ds1685_rtc_sysfs_ctrlc_attrs[] = {
1426 &dev_attr_irqf.attr,
1427 &dev_attr_pf.attr,
1428 &dev_attr_af.attr,
1429 &dev_attr_uf.attr,
1430 NULL,
1431};
1432
1433static const struct attribute_group
1434ds1685_rtc_sysfs_ctrlc_grp = {
1435 .name = "ctrlc",
1436 .attrs = ds1685_rtc_sysfs_ctrlc_attrs,
1437};
1438
1439
1440
1441
1442DS1685_RTC_SYSFS_CTRL_REG_RO(vrt);
1443
1444static struct attribute*
1445ds1685_rtc_sysfs_ctrld_attrs[] = {
1446 &dev_attr_vrt.attr,
1447 NULL,
1448};
1449
1450static const struct attribute_group
1451ds1685_rtc_sysfs_ctrld_grp = {
1452 .name = "ctrld",
1453 .attrs = ds1685_rtc_sysfs_ctrld_attrs,
1454};
1455
1456
1457
1458
1459DS1685_RTC_SYSFS_CTRL_REG_RO(vrt2);
1460DS1685_RTC_SYSFS_CTRL_REG_RO(incr);
1461DS1685_RTC_SYSFS_CTRL_REG_RW(pab);
1462DS1685_RTC_SYSFS_CTRL_REG_RW(rf);
1463DS1685_RTC_SYSFS_CTRL_REG_RW(wf);
1464DS1685_RTC_SYSFS_CTRL_REG_RW(kf);
1465#if !defined(CONFIG_RTC_DRV_DS1685) && !defined(CONFIG_RTC_DRV_DS1689)
1466DS1685_RTC_SYSFS_CTRL_REG_RO(bme);
1467#endif
1468
1469static struct attribute*
1470ds1685_rtc_sysfs_ctrl4a_attrs[] = {
1471 &dev_attr_vrt2.attr,
1472 &dev_attr_incr.attr,
1473 &dev_attr_pab.attr,
1474 &dev_attr_rf.attr,
1475 &dev_attr_wf.attr,
1476 &dev_attr_kf.attr,
1477#if !defined(CONFIG_RTC_DRV_DS1685) && !defined(CONFIG_RTC_DRV_DS1689)
1478 &dev_attr_bme.attr,
1479#endif
1480 NULL,
1481};
1482
1483static const struct attribute_group
1484ds1685_rtc_sysfs_ctrl4a_grp = {
1485 .name = "ctrl4a",
1486 .attrs = ds1685_rtc_sysfs_ctrl4a_attrs,
1487};
1488
1489
1490
1491
1492DS1685_RTC_SYSFS_CTRL_REG_RW(abe);
1493DS1685_RTC_SYSFS_CTRL_REG_RW(e32k);
1494DS1685_RTC_SYSFS_CTRL_REG_RO(cs);
1495DS1685_RTC_SYSFS_CTRL_REG_RW(rce);
1496DS1685_RTC_SYSFS_CTRL_REG_RW(prs);
1497DS1685_RTC_SYSFS_CTRL_REG_RW(rie);
1498DS1685_RTC_SYSFS_CTRL_REG_RW(wie);
1499DS1685_RTC_SYSFS_CTRL_REG_RW(kse);
1500
1501static struct attribute*
1502ds1685_rtc_sysfs_ctrl4b_attrs[] = {
1503 &dev_attr_abe.attr,
1504 &dev_attr_e32k.attr,
1505 &dev_attr_cs.attr,
1506 &dev_attr_rce.attr,
1507 &dev_attr_prs.attr,
1508 &dev_attr_rie.attr,
1509 &dev_attr_wie.attr,
1510 &dev_attr_kse.attr,
1511 NULL,
1512};
1513
1514static const struct attribute_group
1515ds1685_rtc_sysfs_ctrl4b_grp = {
1516 .name = "ctrl4b",
1517 .attrs = ds1685_rtc_sysfs_ctrl4b_attrs,
1518};
1519
1520
1521
1522
1523
1524
1525
1526
1527struct ds1685_rtc_time_regs {
1528 const char *name;
1529 const u8 reg;
1530 const u8 mask;
1531 const u8 min;
1532 const u8 max;
1533};
1534
1535
1536
1537
1538static const struct ds1685_rtc_time_regs
1539ds1685_time_regs_bcd_table[] = {
1540 { "seconds", RTC_SECS, RTC_SECS_BCD_MASK, 0, 59 },
1541 { "minutes", RTC_MINS, RTC_MINS_BCD_MASK, 0, 59 },
1542 { "hours", RTC_HRS, RTC_HRS_24_BCD_MASK, 0, 23 },
1543 { "wday", RTC_WDAY, RTC_WDAY_MASK, 1, 7 },
1544 { "mday", RTC_MDAY, RTC_MDAY_BCD_MASK, 1, 31 },
1545 { "month", RTC_MONTH, RTC_MONTH_BCD_MASK, 1, 12 },
1546 { "year", RTC_YEAR, RTC_YEAR_BCD_MASK, 0, 99 },
1547 { "century", RTC_CENTURY, RTC_CENTURY_MASK, 0, 99 },
1548 { "alarm_seconds", RTC_SECS_ALARM, RTC_SECS_BCD_MASK, 0, 59 },
1549 { "alarm_minutes", RTC_MINS_ALARM, RTC_MINS_BCD_MASK, 0, 59 },
1550 { "alarm_hours", RTC_HRS_ALARM, RTC_HRS_24_BCD_MASK, 0, 23 },
1551 { "alarm_mday", RTC_MDAY_ALARM, RTC_MDAY_ALARM_MASK, 1, 31 },
1552 { NULL, 0, 0, 0, 0 },
1553};
1554
1555static const struct ds1685_rtc_time_regs
1556ds1685_time_regs_bin_table[] = {
1557 { "seconds", RTC_SECS, RTC_SECS_BIN_MASK, 0x00, 0x3b },
1558 { "minutes", RTC_MINS, RTC_MINS_BIN_MASK, 0x00, 0x3b },
1559 { "hours", RTC_HRS, RTC_HRS_24_BIN_MASK, 0x00, 0x17 },
1560 { "wday", RTC_WDAY, RTC_WDAY_MASK, 0x01, 0x07 },
1561 { "mday", RTC_MDAY, RTC_MDAY_BIN_MASK, 0x01, 0x1f },
1562 { "month", RTC_MONTH, RTC_MONTH_BIN_MASK, 0x01, 0x0c },
1563 { "year", RTC_YEAR, RTC_YEAR_BIN_MASK, 0x00, 0x63 },
1564 { "century", RTC_CENTURY, RTC_CENTURY_MASK, 0x00, 0x63 },
1565 { "alarm_seconds", RTC_SECS_ALARM, RTC_SECS_BIN_MASK, 0x00, 0x3b },
1566 { "alarm_minutes", RTC_MINS_ALARM, RTC_MINS_BIN_MASK, 0x00, 0x3b },
1567 { "alarm_hours", RTC_HRS_ALARM, RTC_HRS_24_BIN_MASK, 0x00, 0x17 },
1568 { "alarm_mday", RTC_MDAY_ALARM, RTC_MDAY_ALARM_MASK, 0x01, 0x1f },
1569 { NULL, 0, 0, 0x00, 0x00 },
1570};
1571
1572
1573
1574
1575
1576static const struct ds1685_rtc_time_regs*
1577ds1685_rtc_sysfs_time_regs_lookup(const char *name, bool bcd_mode)
1578{
1579 const struct ds1685_rtc_time_regs *p;
1580
1581 if (bcd_mode)
1582 p = ds1685_time_regs_bcd_table;
1583 else
1584 p = ds1685_time_regs_bin_table;
1585
1586 for (; p->name != NULL; ++p)
1587 if (strcmp(p->name, name) == 0)
1588 return p;
1589
1590 return NULL;
1591}
1592
1593
1594
1595
1596
1597
1598
1599static ssize_t
1600ds1685_rtc_sysfs_time_regs_show(struct device *dev,
1601 struct device_attribute *attr, char *buf)
1602{
1603 u8 tmp;
1604 struct ds1685_priv *rtc = dev_get_drvdata(dev);
1605 const struct ds1685_rtc_time_regs *bcd_reg_info =
1606 ds1685_rtc_sysfs_time_regs_lookup(attr->attr.name, true);
1607 const struct ds1685_rtc_time_regs *bin_reg_info =
1608 ds1685_rtc_sysfs_time_regs_lookup(attr->attr.name, false);
1609
1610
1611 if (!bcd_reg_info || !bin_reg_info)
1612 return -EINVAL;
1613
1614
1615 ds1685_rtc_begin_data_access(rtc);
1616 tmp = rtc->read(rtc, bcd_reg_info->reg);
1617 ds1685_rtc_end_data_access(rtc);
1618
1619 tmp = ds1685_rtc_bcd2bin(rtc, tmp, bcd_reg_info->mask,
1620 bin_reg_info->mask);
1621
1622 return sprintf(buf, "%d\n", tmp);
1623}
1624
1625
1626
1627
1628
1629
1630
1631
1632static ssize_t
1633ds1685_rtc_sysfs_time_regs_store(struct device *dev,
1634 struct device_attribute *attr,
1635 const char *buf, size_t count)
1636{
1637 long int val = 0;
1638 struct ds1685_priv *rtc = dev_get_drvdata(dev);
1639 const struct ds1685_rtc_time_regs *bcd_reg_info =
1640 ds1685_rtc_sysfs_time_regs_lookup(attr->attr.name, true);
1641 const struct ds1685_rtc_time_regs *bin_reg_info =
1642 ds1685_rtc_sysfs_time_regs_lookup(attr->attr.name, false);
1643
1644
1645 if (kstrtol(buf, 10, &val) < 0)
1646 return -EINVAL;
1647
1648
1649 if (!bcd_reg_info || !bin_reg_info)
1650 return -EINVAL;
1651
1652
1653 if (rtc->bcd_mode) {
1654 if ((val < bcd_reg_info->min) || (val > bcd_reg_info->max))
1655 return -ERANGE;
1656 } else {
1657 if ((val < bin_reg_info->min) || (val > bin_reg_info->max))
1658 return -ERANGE;
1659 }
1660
1661 val = ds1685_rtc_bin2bcd(rtc, val, bin_reg_info->mask,
1662 bcd_reg_info->mask);
1663
1664
1665 ds1685_rtc_begin_data_access(rtc);
1666 rtc->write(rtc, bcd_reg_info->reg, val);
1667 ds1685_rtc_end_data_access(rtc);
1668
1669 return count;
1670}
1671
1672
1673
1674
1675
1676#define DS1685_RTC_SYSFS_TIME_REG_RW(reg) \
1677 static DEVICE_ATTR(reg, S_IRUGO | S_IWUSR, \
1678 ds1685_rtc_sysfs_time_regs_show, \
1679 ds1685_rtc_sysfs_time_regs_store)
1680
1681
1682
1683
1684DS1685_RTC_SYSFS_TIME_REG_RW(seconds);
1685DS1685_RTC_SYSFS_TIME_REG_RW(minutes);
1686DS1685_RTC_SYSFS_TIME_REG_RW(hours);
1687DS1685_RTC_SYSFS_TIME_REG_RW(wday);
1688DS1685_RTC_SYSFS_TIME_REG_RW(mday);
1689DS1685_RTC_SYSFS_TIME_REG_RW(month);
1690DS1685_RTC_SYSFS_TIME_REG_RW(year);
1691DS1685_RTC_SYSFS_TIME_REG_RW(century);
1692DS1685_RTC_SYSFS_TIME_REG_RW(alarm_seconds);
1693DS1685_RTC_SYSFS_TIME_REG_RW(alarm_minutes);
1694DS1685_RTC_SYSFS_TIME_REG_RW(alarm_hours);
1695DS1685_RTC_SYSFS_TIME_REG_RW(alarm_mday);
1696
1697static struct attribute*
1698ds1685_rtc_sysfs_time_attrs[] = {
1699 &dev_attr_seconds.attr,
1700 &dev_attr_minutes.attr,
1701 &dev_attr_hours.attr,
1702 &dev_attr_wday.attr,
1703 &dev_attr_mday.attr,
1704 &dev_attr_month.attr,
1705 &dev_attr_year.attr,
1706 &dev_attr_century.attr,
1707 NULL,
1708};
1709
1710static const struct attribute_group
1711ds1685_rtc_sysfs_time_grp = {
1712 .name = "datetime",
1713 .attrs = ds1685_rtc_sysfs_time_attrs,
1714};
1715
1716static struct attribute*
1717ds1685_rtc_sysfs_alarm_attrs[] = {
1718 &dev_attr_alarm_seconds.attr,
1719 &dev_attr_alarm_minutes.attr,
1720 &dev_attr_alarm_hours.attr,
1721 &dev_attr_alarm_mday.attr,
1722 NULL,
1723};
1724
1725static const struct attribute_group
1726ds1685_rtc_sysfs_alarm_grp = {
1727 .name = "alarm",
1728 .attrs = ds1685_rtc_sysfs_alarm_attrs,
1729};
1730#endif
1731
1732
1733
1734
1735
1736
1737static int
1738ds1685_rtc_sysfs_register(struct device *dev)
1739{
1740 int ret = 0;
1741
1742 sysfs_bin_attr_init(&ds1685_rtc_sysfs_nvram_attr);
1743 ret = sysfs_create_bin_file(&dev->kobj, &ds1685_rtc_sysfs_nvram_attr);
1744 if (ret)
1745 return ret;
1746
1747 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_misc_grp);
1748 if (ret)
1749 return ret;
1750
1751#ifdef CONFIG_RTC_DS1685_SYSFS_REGS
1752 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_ctrla_grp);
1753 if (ret)
1754 return ret;
1755
1756 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_ctrlb_grp);
1757 if (ret)
1758 return ret;
1759
1760 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_ctrlc_grp);
1761 if (ret)
1762 return ret;
1763
1764 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_ctrld_grp);
1765 if (ret)
1766 return ret;
1767
1768 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_ctrl4a_grp);
1769 if (ret)
1770 return ret;
1771
1772 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_ctrl4b_grp);
1773 if (ret)
1774 return ret;
1775
1776 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_time_grp);
1777 if (ret)
1778 return ret;
1779
1780 ret = sysfs_create_group(&dev->kobj, &ds1685_rtc_sysfs_alarm_grp);
1781 if (ret)
1782 return ret;
1783#endif
1784 return 0;
1785}
1786
1787
1788
1789
1790
1791static int
1792ds1685_rtc_sysfs_unregister(struct device *dev)
1793{
1794 sysfs_remove_bin_file(&dev->kobj, &ds1685_rtc_sysfs_nvram_attr);
1795 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_misc_grp);
1796
1797#ifdef CONFIG_RTC_DS1685_SYSFS_REGS
1798 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_ctrla_grp);
1799 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_ctrlb_grp);
1800 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_ctrlc_grp);
1801 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_ctrld_grp);
1802 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_ctrl4a_grp);
1803 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_ctrl4b_grp);
1804 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_time_grp);
1805 sysfs_remove_group(&dev->kobj, &ds1685_rtc_sysfs_alarm_grp);
1806#endif
1807
1808 return 0;
1809}
1810#endif
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821static int
1822ds1685_rtc_probe(struct platform_device *pdev)
1823{
1824 struct rtc_device *rtc_dev;
1825 struct resource *res;
1826 struct ds1685_priv *rtc;
1827 struct ds1685_rtc_platform_data *pdata;
1828 u8 ctrla, ctrlb, hours;
1829 unsigned char am_pm;
1830 int ret = 0;
1831
1832
1833 pdata = (struct ds1685_rtc_platform_data *) pdev->dev.platform_data;
1834 if (!pdata)
1835 return -ENODEV;
1836
1837
1838 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
1839 if (!rtc)
1840 return -ENOMEM;
1841
1842
1843
1844
1845
1846
1847
1848 if (pdata->alloc_io_resources) {
1849
1850 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1851 if (!res)
1852 return -ENXIO;
1853 rtc->size = resource_size(res);
1854
1855
1856
1857 if (!devm_request_mem_region(&pdev->dev, res->start, rtc->size,
1858 pdev->name))
1859 return -EBUSY;
1860
1861
1862
1863
1864
1865 rtc->baseaddr = res->start;
1866 rtc->regs = devm_ioremap(&pdev->dev, res->start, rtc->size);
1867 if (!rtc->regs)
1868 return -ENOMEM;
1869 }
1870 rtc->alloc_io_resources = pdata->alloc_io_resources;
1871
1872
1873 if (pdata->regstep > 0)
1874 rtc->regstep = pdata->regstep;
1875 else
1876 rtc->regstep = 1;
1877
1878
1879 if (pdata->plat_read)
1880 rtc->read = pdata->plat_read;
1881 else
1882 if (pdata->alloc_io_resources)
1883 rtc->read = ds1685_read;
1884 else
1885 return -ENXIO;
1886
1887
1888 if (pdata->plat_write)
1889 rtc->write = pdata->plat_write;
1890 else
1891 if (pdata->alloc_io_resources)
1892 rtc->write = ds1685_write;
1893 else
1894 return -ENXIO;
1895
1896
1897 if (pdata->plat_prepare_poweroff)
1898 rtc->prepare_poweroff = pdata->plat_prepare_poweroff;
1899
1900
1901 if (pdata->plat_wake_alarm)
1902 rtc->wake_alarm = pdata->plat_wake_alarm;
1903
1904
1905 if (pdata->plat_post_ram_clear)
1906 rtc->post_ram_clear = pdata->plat_post_ram_clear;
1907
1908
1909 spin_lock_init(&rtc->lock);
1910 INIT_WORK(&rtc->work, ds1685_rtc_work_queue);
1911 platform_set_drvdata(pdev, rtc);
1912
1913
1914 ctrla = rtc->read(rtc, RTC_CTRL_A);
1915 if (!(ctrla & RTC_CTRL_A_DV1))
1916 ctrla |= RTC_CTRL_A_DV1;
1917
1918
1919 ctrla &= ~(RTC_CTRL_A_DV2);
1920
1921
1922 ctrla &= ~(RTC_CTRL_A_RS_MASK);
1923
1924
1925
1926
1927
1928 ctrla |= RTC_CTRL_A_DV0;
1929 rtc->write(rtc, RTC_CTRL_A, ctrla);
1930
1931
1932 rtc->write(rtc, RTC_EXT_CTRL_4B,
1933 (rtc->read(rtc, RTC_EXT_CTRL_4B) | RTC_CTRL_4B_E32K));
1934
1935
1936 rtc->write(rtc, RTC_CTRL_B,
1937 (rtc->read(rtc, RTC_CTRL_B) | RTC_CTRL_B_SET));
1938
1939
1940 while (rtc->read(rtc, RTC_EXT_CTRL_4A) & RTC_CTRL_4A_INCR)
1941 cpu_relax();
1942
1943
1944
1945
1946
1947 ctrlb = rtc->read(rtc, RTC_CTRL_B);
1948 if (pdata->bcd_mode)
1949 ctrlb &= ~(RTC_CTRL_B_DM);
1950 else
1951 ctrlb |= RTC_CTRL_B_DM;
1952 rtc->bcd_mode = pdata->bcd_mode;
1953
1954
1955
1956
1957
1958
1959 if (ctrlb & RTC_CTRL_B_DSE)
1960 ctrlb &= ~(RTC_CTRL_B_DSE);
1961
1962
1963 if (!(ctrlb & RTC_CTRL_B_2412)) {
1964
1965 hours = rtc->read(rtc, RTC_HRS);
1966 am_pm = hours & RTC_HRS_AMPM_MASK;
1967 hours = ds1685_rtc_bcd2bin(rtc, hours, RTC_HRS_12_BCD_MASK,
1968 RTC_HRS_12_BIN_MASK);
1969 hours = ((hours == 12) ? 0 : ((am_pm) ? hours + 12 : hours));
1970
1971
1972 ctrlb |= RTC_CTRL_B_2412;
1973
1974
1975 rtc->write(rtc, RTC_CTRL_B, ctrlb);
1976
1977
1978 rtc->write(rtc, RTC_HRS,
1979 ds1685_rtc_bin2bcd(rtc, hours,
1980 RTC_HRS_24_BIN_MASK,
1981 RTC_HRS_24_BCD_MASK));
1982
1983
1984 hours = rtc->read(rtc, RTC_HRS_ALARM);
1985 am_pm = hours & RTC_HRS_AMPM_MASK;
1986 hours = ds1685_rtc_bcd2bin(rtc, hours, RTC_HRS_12_BCD_MASK,
1987 RTC_HRS_12_BIN_MASK);
1988 hours = ((hours == 12) ? 0 : ((am_pm) ? hours + 12 : hours));
1989
1990
1991 rtc->write(rtc, RTC_HRS_ALARM,
1992 ds1685_rtc_bin2bcd(rtc, hours,
1993 RTC_HRS_24_BIN_MASK,
1994 RTC_HRS_24_BCD_MASK));
1995 } else {
1996
1997 rtc->write(rtc, RTC_CTRL_B, ctrlb);
1998 }
1999
2000
2001 rtc->write(rtc, RTC_CTRL_B,
2002 (rtc->read(rtc, RTC_CTRL_B) & ~(RTC_CTRL_B_SET)));
2003
2004
2005 if (!(rtc->read(rtc, RTC_CTRL_D) & RTC_CTRL_D_VRT))
2006 dev_warn(&pdev->dev,
2007 "Main battery is exhausted! RTC may be invalid!\n");
2008
2009
2010 if (!(rtc->read(rtc, RTC_EXT_CTRL_4A) & RTC_CTRL_4A_VRT2))
2011 dev_warn(&pdev->dev,
2012 "Aux battery is exhausted or not available.\n");
2013
2014
2015 rtc->write(rtc, RTC_CTRL_B,
2016 (rtc->read(rtc, RTC_CTRL_B) & ~(RTC_CTRL_B_PAU_MASK)));
2017
2018
2019 rtc->read(rtc, RTC_CTRL_C);
2020
2021
2022 rtc->write(rtc, RTC_EXT_CTRL_4B,
2023 (rtc->read(rtc, RTC_EXT_CTRL_4B) & ~(RTC_CTRL_4B_RWK_MASK)));
2024
2025
2026 rtc->write(rtc, RTC_EXT_CTRL_4A,
2027 (rtc->read(rtc, RTC_EXT_CTRL_4A) & ~(RTC_CTRL_4A_RWK_MASK)));
2028
2029
2030
2031
2032
2033 rtc->write(rtc, RTC_EXT_CTRL_4B,
2034 (rtc->read(rtc, RTC_EXT_CTRL_4B) | RTC_CTRL_4B_KSE));
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044 if (!pdata->no_irq) {
2045 ret = platform_get_irq(pdev, 0);
2046 if (ret > 0) {
2047 rtc->irq_num = ret;
2048
2049
2050 ret = devm_request_irq(&pdev->dev, rtc->irq_num,
2051 ds1685_rtc_irq_handler,
2052 IRQF_SHARED, pdev->name, pdev);
2053
2054
2055 if (unlikely(ret)) {
2056 dev_warn(&pdev->dev,
2057 "RTC interrupt not available\n");
2058 rtc->irq_num = 0;
2059 }
2060 } else
2061 return ret;
2062 }
2063 rtc->no_irq = pdata->no_irq;
2064
2065
2066 ds1685_rtc_switch_to_bank0(rtc);
2067
2068
2069 rtc_dev = rtc_device_register(pdev->name, &pdev->dev,
2070 &ds1685_rtc_ops, THIS_MODULE);
2071
2072
2073 if (IS_ERR(rtc_dev))
2074 return PTR_ERR(rtc_dev);
2075
2076
2077 rtc_dev->max_user_freq = RTC_MAX_USER_FREQ;
2078
2079
2080 if (pdata->uie_unsupported)
2081 rtc_dev->uie_unsupported = 1;
2082 rtc->uie_unsupported = pdata->uie_unsupported;
2083
2084 rtc->dev = rtc_dev;
2085
2086#ifdef CONFIG_SYSFS
2087 ret = ds1685_rtc_sysfs_register(&pdev->dev);
2088 if (ret)
2089 rtc_device_unregister(rtc->dev);
2090#endif
2091
2092
2093 return ret;
2094}
2095
2096
2097
2098
2099
2100static int
2101ds1685_rtc_remove(struct platform_device *pdev)
2102{
2103 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
2104
2105#ifdef CONFIG_SYSFS
2106 ds1685_rtc_sysfs_unregister(&pdev->dev);
2107#endif
2108
2109 rtc_device_unregister(rtc->dev);
2110
2111
2112 rtc->write(rtc, RTC_CTRL_B,
2113 (rtc->read(rtc, RTC_CTRL_B) &
2114 ~(RTC_CTRL_B_PAU_MASK)));
2115
2116
2117 rtc->read(rtc, RTC_CTRL_C);
2118
2119
2120 rtc->write(rtc, RTC_EXT_CTRL_4B,
2121 (rtc->read(rtc, RTC_EXT_CTRL_4B) &
2122 ~(RTC_CTRL_4B_RWK_MASK)));
2123
2124
2125 rtc->write(rtc, RTC_EXT_CTRL_4A,
2126 (rtc->read(rtc, RTC_EXT_CTRL_4A) &
2127 ~(RTC_CTRL_4A_RWK_MASK)));
2128
2129 cancel_work_sync(&rtc->work);
2130
2131 return 0;
2132}
2133
2134
2135
2136
2137static struct platform_driver ds1685_rtc_driver = {
2138 .driver = {
2139 .name = "rtc-ds1685",
2140 },
2141 .probe = ds1685_rtc_probe,
2142 .remove = ds1685_rtc_remove,
2143};
2144module_platform_driver(ds1685_rtc_driver);
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155void __noreturn
2156ds1685_rtc_poweroff(struct platform_device *pdev)
2157{
2158 u8 ctrla, ctrl4a, ctrl4b;
2159 struct ds1685_priv *rtc;
2160
2161
2162 if (unlikely(!pdev)) {
2163 pr_emerg("platform device data not available, spinning forever ...\n");
2164 while(1);
2165 unreachable();
2166 } else {
2167
2168 rtc = platform_get_drvdata(pdev);
2169
2170
2171
2172
2173
2174
2175
2176 if (!rtc->no_irq)
2177 disable_irq_nosync(rtc->irq_num);
2178
2179
2180 ctrla = rtc->read(rtc, RTC_CTRL_A);
2181 ctrla |= RTC_CTRL_A_DV1;
2182 ctrla &= ~(RTC_CTRL_A_DV2);
2183 rtc->write(rtc, RTC_CTRL_A, ctrla);
2184
2185
2186
2187
2188
2189
2190 ds1685_rtc_switch_to_bank1(rtc);
2191 ctrl4a = rtc->read(rtc, RTC_EXT_CTRL_4A);
2192 if (ctrl4a & RTC_CTRL_4A_VRT2) {
2193
2194 ctrl4a &= ~(RTC_CTRL_4A_RWK_MASK);
2195 rtc->write(rtc, RTC_EXT_CTRL_4A, ctrl4a);
2196
2197
2198
2199
2200
2201
2202
2203 ctrl4b = rtc->read(rtc, RTC_EXT_CTRL_4B);
2204 ctrl4b |= (RTC_CTRL_4B_ABE | RTC_CTRL_4B_WIE |
2205 RTC_CTRL_4B_KSE);
2206 rtc->write(rtc, RTC_EXT_CTRL_4B, ctrl4b);
2207 }
2208
2209
2210 dev_warn(&pdev->dev, "Powerdown.\n");
2211 msleep(20);
2212 rtc->write(rtc, RTC_EXT_CTRL_4A,
2213 (ctrl4a | RTC_CTRL_4A_PAB));
2214
2215
2216 unreachable();
2217 }
2218}
2219EXPORT_SYMBOL(ds1685_rtc_poweroff);
2220
2221
2222
2223MODULE_AUTHOR("Joshua Kinard <kumba@gentoo.org>");
2224MODULE_AUTHOR("Matthias Fuchs <matthias.fuchs@esd-electronics.com>");
2225MODULE_DESCRIPTION("Dallas/Maxim DS1685/DS1687-series RTC driver");
2226MODULE_LICENSE("GPL");
2227MODULE_VERSION(DRV_VERSION);
2228MODULE_ALIAS("platform:rtc-ds1685");
2229