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36#include <linux/platform_device.h>
37#include <linux/pm_runtime.h>
38#include <linux/of.h>
39
40#include "ufshcd.h"
41#include "ufshcd-pltfrm.h"
42
43#define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2
44
45static int ufshcd_parse_clock_info(struct ufs_hba *hba)
46{
47 int ret = 0;
48 int cnt;
49 int i;
50 struct device *dev = hba->dev;
51 struct device_node *np = dev->of_node;
52 char *name;
53 u32 *clkfreq = NULL;
54 struct ufs_clk_info *clki;
55 int len = 0;
56 size_t sz = 0;
57
58 if (!np)
59 goto out;
60
61 INIT_LIST_HEAD(&hba->clk_list_head);
62
63 cnt = of_property_count_strings(np, "clock-names");
64 if (!cnt || (cnt == -EINVAL)) {
65 dev_info(dev, "%s: Unable to find clocks, assuming enabled\n",
66 __func__);
67 } else if (cnt < 0) {
68 dev_err(dev, "%s: count clock strings failed, err %d\n",
69 __func__, cnt);
70 ret = cnt;
71 }
72
73 if (cnt <= 0)
74 goto out;
75
76 if (!of_get_property(np, "freq-table-hz", &len)) {
77 dev_info(dev, "freq-table-hz property not specified\n");
78 goto out;
79 }
80
81 if (len <= 0)
82 goto out;
83
84 sz = len / sizeof(*clkfreq);
85 if (sz != 2 * cnt) {
86 dev_err(dev, "%s len mismatch\n", "freq-table-hz");
87 ret = -EINVAL;
88 goto out;
89 }
90
91 clkfreq = devm_kzalloc(dev, sz * sizeof(*clkfreq),
92 GFP_KERNEL);
93 if (!clkfreq) {
94 ret = -ENOMEM;
95 goto out;
96 }
97
98 ret = of_property_read_u32_array(np, "freq-table-hz",
99 clkfreq, sz);
100 if (ret && (ret != -EINVAL)) {
101 dev_err(dev, "%s: error reading array %d\n",
102 "freq-table-hz", ret);
103 return ret;
104 }
105
106 for (i = 0; i < sz; i += 2) {
107 ret = of_property_read_string_index(np,
108 "clock-names", i/2, (const char **)&name);
109 if (ret)
110 goto out;
111
112 clki = devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL);
113 if (!clki) {
114 ret = -ENOMEM;
115 goto out;
116 }
117
118 clki->min_freq = clkfreq[i];
119 clki->max_freq = clkfreq[i+1];
120 clki->name = kstrdup(name, GFP_KERNEL);
121 dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz",
122 clki->min_freq, clki->max_freq, clki->name);
123 list_add_tail(&clki->list, &hba->clk_list_head);
124 }
125out:
126 return ret;
127}
128
129#define MAX_PROP_SIZE 32
130static int ufshcd_populate_vreg(struct device *dev, const char *name,
131 struct ufs_vreg **out_vreg)
132{
133 int ret = 0;
134 char prop_name[MAX_PROP_SIZE];
135 struct ufs_vreg *vreg = NULL;
136 struct device_node *np = dev->of_node;
137
138 if (!np) {
139 dev_err(dev, "%s: non DT initialization\n", __func__);
140 goto out;
141 }
142
143 snprintf(prop_name, MAX_PROP_SIZE, "%s-supply", name);
144 if (!of_parse_phandle(np, prop_name, 0)) {
145 dev_info(dev, "%s: Unable to find %s regulator, assuming enabled\n",
146 __func__, prop_name);
147 goto out;
148 }
149
150 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
151 if (!vreg)
152 return -ENOMEM;
153
154 vreg->name = kstrdup(name, GFP_KERNEL);
155
156
157 snprintf(prop_name, MAX_PROP_SIZE, "%s-fixed-regulator", name);
158 if (of_property_read_bool(np, prop_name))
159 goto out;
160
161 snprintf(prop_name, MAX_PROP_SIZE, "%s-max-microamp", name);
162 ret = of_property_read_u32(np, prop_name, &vreg->max_uA);
163 if (ret) {
164 dev_err(dev, "%s: unable to find %s err %d\n",
165 __func__, prop_name, ret);
166 goto out_free;
167 }
168
169 vreg->min_uA = 0;
170 if (!strcmp(name, "vcc")) {
171 if (of_property_read_bool(np, "vcc-supply-1p8")) {
172 vreg->min_uV = UFS_VREG_VCC_1P8_MIN_UV;
173 vreg->max_uV = UFS_VREG_VCC_1P8_MAX_UV;
174 } else {
175 vreg->min_uV = UFS_VREG_VCC_MIN_UV;
176 vreg->max_uV = UFS_VREG_VCC_MAX_UV;
177 }
178 } else if (!strcmp(name, "vccq")) {
179 vreg->min_uV = UFS_VREG_VCCQ_MIN_UV;
180 vreg->max_uV = UFS_VREG_VCCQ_MAX_UV;
181 } else if (!strcmp(name, "vccq2")) {
182 vreg->min_uV = UFS_VREG_VCCQ2_MIN_UV;
183 vreg->max_uV = UFS_VREG_VCCQ2_MAX_UV;
184 }
185
186 goto out;
187
188out_free:
189 devm_kfree(dev, vreg);
190 vreg = NULL;
191out:
192 if (!ret)
193 *out_vreg = vreg;
194 return ret;
195}
196
197
198
199
200
201
202
203
204
205
206static int ufshcd_parse_regulator_info(struct ufs_hba *hba)
207{
208 int err;
209 struct device *dev = hba->dev;
210 struct ufs_vreg_info *info = &hba->vreg_info;
211
212 err = ufshcd_populate_vreg(dev, "vdd-hba", &info->vdd_hba);
213 if (err)
214 goto out;
215
216 err = ufshcd_populate_vreg(dev, "vcc", &info->vcc);
217 if (err)
218 goto out;
219
220 err = ufshcd_populate_vreg(dev, "vccq", &info->vccq);
221 if (err)
222 goto out;
223
224 err = ufshcd_populate_vreg(dev, "vccq2", &info->vccq2);
225out:
226 return err;
227}
228
229#ifdef CONFIG_PM
230
231
232
233
234
235
236
237int ufshcd_pltfrm_suspend(struct device *dev)
238{
239 return ufshcd_system_suspend(dev_get_drvdata(dev));
240}
241EXPORT_SYMBOL_GPL(ufshcd_pltfrm_suspend);
242
243
244
245
246
247
248
249
250int ufshcd_pltfrm_resume(struct device *dev)
251{
252 return ufshcd_system_resume(dev_get_drvdata(dev));
253}
254EXPORT_SYMBOL_GPL(ufshcd_pltfrm_resume);
255
256int ufshcd_pltfrm_runtime_suspend(struct device *dev)
257{
258 return ufshcd_runtime_suspend(dev_get_drvdata(dev));
259}
260EXPORT_SYMBOL_GPL(ufshcd_pltfrm_runtime_suspend);
261
262int ufshcd_pltfrm_runtime_resume(struct device *dev)
263{
264 return ufshcd_runtime_resume(dev_get_drvdata(dev));
265}
266EXPORT_SYMBOL_GPL(ufshcd_pltfrm_runtime_resume);
267
268int ufshcd_pltfrm_runtime_idle(struct device *dev)
269{
270 return ufshcd_runtime_idle(dev_get_drvdata(dev));
271}
272EXPORT_SYMBOL_GPL(ufshcd_pltfrm_runtime_idle);
273
274#endif
275
276void ufshcd_pltfrm_shutdown(struct platform_device *pdev)
277{
278 ufshcd_shutdown((struct ufs_hba *)platform_get_drvdata(pdev));
279}
280EXPORT_SYMBOL_GPL(ufshcd_pltfrm_shutdown);
281
282static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba)
283{
284 struct device *dev = hba->dev;
285 int ret;
286
287 ret = of_property_read_u32(dev->of_node, "lanes-per-direction",
288 &hba->lanes_per_direction);
289 if (ret) {
290 dev_dbg(hba->dev,
291 "%s: failed to read lanes-per-direction, ret=%d\n",
292 __func__, ret);
293 hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION;
294 }
295}
296
297
298
299
300
301
302
303
304int ufshcd_pltfrm_init(struct platform_device *pdev,
305 struct ufs_hba_variant_ops *vops)
306{
307 struct ufs_hba *hba;
308 void __iomem *mmio_base;
309 struct resource *mem_res;
310 int irq, err;
311 struct device *dev = &pdev->dev;
312
313 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
314 mmio_base = devm_ioremap_resource(dev, mem_res);
315 if (IS_ERR(*(void **)&mmio_base)) {
316 err = PTR_ERR(*(void **)&mmio_base);
317 goto out;
318 }
319
320 irq = platform_get_irq(pdev, 0);
321 if (irq < 0) {
322 dev_err(dev, "IRQ resource not available\n");
323 err = -ENODEV;
324 goto out;
325 }
326
327 err = ufshcd_alloc_host(dev, &hba);
328 if (err) {
329 dev_err(&pdev->dev, "Allocation failed\n");
330 goto out;
331 }
332
333 hba->vops = vops;
334
335 err = ufshcd_parse_clock_info(hba);
336 if (err) {
337 dev_err(&pdev->dev, "%s: clock parse failed %d\n",
338 __func__, err);
339 goto dealloc_host;
340 }
341 err = ufshcd_parse_regulator_info(hba);
342 if (err) {
343 dev_err(&pdev->dev, "%s: regulator init failed %d\n",
344 __func__, err);
345 goto dealloc_host;
346 }
347
348 pm_runtime_set_active(&pdev->dev);
349 pm_runtime_enable(&pdev->dev);
350
351 ufshcd_init_lanes_per_dir(hba);
352
353 err = ufshcd_init(hba, mmio_base, irq);
354 if (err) {
355 dev_err(dev, "Initialization failed\n");
356 goto out_disable_rpm;
357 }
358
359 platform_set_drvdata(pdev, hba);
360
361 return 0;
362
363out_disable_rpm:
364 pm_runtime_disable(&pdev->dev);
365 pm_runtime_set_suspended(&pdev->dev);
366dealloc_host:
367 ufshcd_dealloc_host(hba);
368out:
369 return err;
370}
371EXPORT_SYMBOL_GPL(ufshcd_pltfrm_init);
372
373MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
374MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
375MODULE_DESCRIPTION("UFS host controller Pltform bus based glue driver");
376MODULE_LICENSE("GPL");
377MODULE_VERSION(UFSHCD_DRIVER_VERSION);
378