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44#include <linux/module.h>
45#include <linux/interrupt.h>
46
47#include "../comedi_pci.h"
48
49#include "comedi_8254.h"
50#include "plx9052.h"
51#include "8255.h"
52
53
54
55
56
57
58
59
60
61#define PCIMDAS_AI_REG 0x00
62#define PCIMDAS_AI_SOFTTRIG_REG 0x00
63#define PCIMDAS_AO_REG(x) (0x02 + ((x) * 2))
64
65
66
67
68#define PCIMDAS_MUX_REG 0x00
69#define PCIMDAS_MUX(_lo, _hi) ((_lo) | ((_hi) << 4))
70#define PCIMDAS_DI_DO_REG 0x01
71#define PCIMDAS_STATUS_REG 0x02
72#define PCIMDAS_STATUS_EOC BIT(7)
73#define PCIMDAS_STATUS_UB BIT(6)
74#define PCIMDAS_STATUS_MUX BIT(5)
75#define PCIMDAS_STATUS_CLK BIT(4)
76#define PCIMDAS_STATUS_TO_CURR_MUX(x) ((x) & 0xf)
77#define PCIMDAS_CONV_STATUS_REG 0x03
78#define PCIMDAS_CONV_STATUS_EOC BIT(7)
79#define PCIMDAS_CONV_STATUS_EOB BIT(6)
80#define PCIMDAS_CONV_STATUS_EOA BIT(5)
81#define PCIMDAS_CONV_STATUS_FNE BIT(4)
82#define PCIMDAS_CONV_STATUS_FHF BIT(3)
83#define PCIMDAS_CONV_STATUS_OVERRUN BIT(2)
84#define PCIMDAS_IRQ_REG 0x04
85#define PCIMDAS_IRQ_INTE BIT(7)
86#define PCIMDAS_IRQ_INT BIT(6)
87#define PCIMDAS_IRQ_OVERRUN BIT(4)
88#define PCIMDAS_IRQ_EOA BIT(3)
89#define PCIMDAS_IRQ_EOA_INT_SEL BIT(2)
90#define PCIMDAS_IRQ_INTSEL(x) ((x) << 0)
91#define PCIMDAS_IRQ_INTSEL_EOC PCIMDAS_IRQ_INTSEL(0)
92#define PCIMDAS_IRQ_INTSEL_FNE PCIMDAS_IRQ_INTSEL(1)
93#define PCIMDAS_IRQ_INTSEL_EOB PCIMDAS_IRQ_INTSEL(2)
94#define PCIMDAS_IRQ_INTSEL_FHF_EOA PCIMDAS_IRQ_INTSEL(3)
95#define PCIMDAS_PACER_REG 0x05
96#define PCIMDAS_PACER_GATE_STATUS BIT(6)
97#define PCIMDAS_PACER_GATE_POL BIT(5)
98#define PCIMDAS_PACER_GATE_LATCH BIT(4)
99#define PCIMDAS_PACER_GATE_EN BIT(3)
100#define PCIMDAS_PACER_EXT_PACER_POL BIT(2)
101#define PCIMDAS_PACER_SRC(x) ((x) << 0)
102#define PCIMDAS_PACER_SRC_POLLED PCIMDAS_PACER_SRC(0)
103#define PCIMDAS_PACER_SRC_EXT PCIMDAS_PACER_SRC(2)
104#define PCIMDAS_PACER_SRC_INT PCIMDAS_PACER_SRC(3)
105#define PCIMDAS_PACER_SRC_MASK (3 << 0)
106#define PCIMDAS_BURST_REG 0x06
107#define PCIMDAS_BURST_BME BIT(1)
108#define PCIMDAS_BURST_CONV_EN BIT(0)
109#define PCIMDAS_GAIN_REG 0x07
110#define PCIMDAS_8254_BASE 0x08
111#define PCIMDAS_USER_CNTR_REG 0x0c
112#define PCIMDAS_USER_CNTR_CTR1_CLK_SEL BIT(0)
113#define PCIMDAS_RESIDUE_MSB_REG 0x0d
114#define PCIMDAS_RESIDUE_LSB_REG 0x0e
115
116
117
118
119#define PCIMDAS_8255_BASE 0x00
120
121static const struct comedi_lrange cb_pcimdas_ai_bip_range = {
122 4, {
123 BIP_RANGE(10),
124 BIP_RANGE(5),
125 BIP_RANGE(2.5),
126 BIP_RANGE(1.25)
127 }
128};
129
130static const struct comedi_lrange cb_pcimdas_ai_uni_range = {
131 4, {
132 UNI_RANGE(10),
133 UNI_RANGE(5),
134 UNI_RANGE(2.5),
135 UNI_RANGE(1.25)
136 }
137};
138
139
140
141
142
143static const struct comedi_lrange cb_pcimdas_ao_range = {
144 6, {
145 BIP_RANGE(10),
146 BIP_RANGE(5),
147 UNI_RANGE(10),
148 UNI_RANGE(5),
149 RANGE_ext(-1, 1),
150 RANGE_ext(0, 1)
151 }
152};
153
154
155
156
157
158
159
160struct cb_pcimdas_private {
161
162 unsigned long daqio;
163 unsigned long BADR3;
164};
165
166static int cb_pcimdas_ai_eoc(struct comedi_device *dev,
167 struct comedi_subdevice *s,
168 struct comedi_insn *insn,
169 unsigned long context)
170{
171 struct cb_pcimdas_private *devpriv = dev->private;
172 unsigned int status;
173
174 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
175 if ((status & PCIMDAS_STATUS_EOC) == 0)
176 return 0;
177 return -EBUSY;
178}
179
180static int cb_pcimdas_ai_insn_read(struct comedi_device *dev,
181 struct comedi_subdevice *s,
182 struct comedi_insn *insn,
183 unsigned int *data)
184{
185 struct cb_pcimdas_private *devpriv = dev->private;
186 unsigned int chan = CR_CHAN(insn->chanspec);
187 unsigned int range = CR_RANGE(insn->chanspec);
188 int n;
189 unsigned int d;
190 int ret;
191
192
193
194
195 d = inb(devpriv->BADR3 + PCIMDAS_PACER_REG);
196 if ((d & PCIMDAS_PACER_SRC_MASK) != PCIMDAS_PACER_SRC_POLLED) {
197 d &= ~PCIMDAS_PACER_SRC_MASK;
198 d |= PCIMDAS_PACER_SRC_POLLED;
199 outb(d, devpriv->BADR3 + PCIMDAS_PACER_REG);
200 }
201
202
203 outb(PCIMDAS_BURST_CONV_EN, devpriv->BADR3 + PCIMDAS_BURST_REG);
204
205
206 outb(range, devpriv->BADR3 + PCIMDAS_GAIN_REG);
207
208
209 outb(PCIMDAS_MUX(chan, chan), devpriv->BADR3 + PCIMDAS_MUX_REG);
210
211
212 for (n = 0; n < insn->n; n++) {
213
214 outw(0, devpriv->daqio + PCIMDAS_AI_SOFTTRIG_REG);
215
216
217 ret = comedi_timeout(dev, s, insn, cb_pcimdas_ai_eoc, 0);
218 if (ret)
219 return ret;
220
221
222 data[n] = inw(devpriv->daqio + PCIMDAS_AI_REG);
223 }
224
225
226 return n;
227}
228
229static int cb_pcimdas_ao_insn_write(struct comedi_device *dev,
230 struct comedi_subdevice *s,
231 struct comedi_insn *insn,
232 unsigned int *data)
233{
234 struct cb_pcimdas_private *devpriv = dev->private;
235 unsigned int chan = CR_CHAN(insn->chanspec);
236 unsigned int val = s->readback[chan];
237 int i;
238
239 for (i = 0; i < insn->n; i++) {
240 val = data[i];
241 outw(val, devpriv->daqio + PCIMDAS_AO_REG(chan));
242 }
243 s->readback[chan] = val;
244
245 return insn->n;
246}
247
248static int cb_pcimdas_di_insn_bits(struct comedi_device *dev,
249 struct comedi_subdevice *s,
250 struct comedi_insn *insn,
251 unsigned int *data)
252{
253 struct cb_pcimdas_private *devpriv = dev->private;
254 unsigned int val;
255
256 val = inb(devpriv->BADR3 + PCIMDAS_DI_DO_REG);
257
258 data[1] = val & 0x0f;
259
260 return insn->n;
261}
262
263static int cb_pcimdas_do_insn_bits(struct comedi_device *dev,
264 struct comedi_subdevice *s,
265 struct comedi_insn *insn,
266 unsigned int *data)
267{
268 struct cb_pcimdas_private *devpriv = dev->private;
269
270 if (comedi_dio_update_state(s, data))
271 outb(s->state, devpriv->BADR3 + PCIMDAS_DI_DO_REG);
272
273 data[1] = s->state;
274
275 return insn->n;
276}
277
278static int cb_pcimdas_counter_insn_config(struct comedi_device *dev,
279 struct comedi_subdevice *s,
280 struct comedi_insn *insn,
281 unsigned int *data)
282{
283 struct cb_pcimdas_private *devpriv = dev->private;
284 unsigned int ctrl;
285
286 switch (data[0]) {
287 case INSN_CONFIG_SET_CLOCK_SRC:
288 switch (data[1]) {
289 case 0:
290 ctrl = PCIMDAS_USER_CNTR_CTR1_CLK_SEL;
291 break;
292 case 1:
293 ctrl = 0;
294 break;
295 default:
296 return -EINVAL;
297 }
298 outb(ctrl, devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
299 break;
300 case INSN_CONFIG_GET_CLOCK_SRC:
301 ctrl = inb(devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
302 if (ctrl & PCIMDAS_USER_CNTR_CTR1_CLK_SEL) {
303 data[1] = 0;
304 data[2] = I8254_OSC_BASE_100KHZ;
305 } else {
306 data[1] = 1;
307 data[2] = 0;
308 }
309 break;
310 default:
311 return -EINVAL;
312 }
313
314 return insn->n;
315}
316
317static unsigned int cb_pcimdas_pacer_clk(struct comedi_device *dev)
318{
319 struct cb_pcimdas_private *devpriv = dev->private;
320 unsigned int status;
321
322
323 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
324 if (status & PCIMDAS_STATUS_CLK)
325 return I8254_OSC_BASE_10MHZ;
326 return I8254_OSC_BASE_1MHZ;
327}
328
329static bool cb_pcimdas_is_ai_se(struct comedi_device *dev)
330{
331 struct cb_pcimdas_private *devpriv = dev->private;
332 unsigned int status;
333
334
335
336
337
338
339 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
340 return status & PCIMDAS_STATUS_MUX;
341}
342
343static bool cb_pcimdas_is_ai_uni(struct comedi_device *dev)
344{
345 struct cb_pcimdas_private *devpriv = dev->private;
346 unsigned int status;
347
348
349
350
351
352
353 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
354 return status & PCIMDAS_STATUS_UB;
355}
356
357static int cb_pcimdas_auto_attach(struct comedi_device *dev,
358 unsigned long context_unused)
359{
360 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
361 struct cb_pcimdas_private *devpriv;
362 struct comedi_subdevice *s;
363 int ret;
364
365 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
366 if (!devpriv)
367 return -ENOMEM;
368
369 ret = comedi_pci_enable(dev);
370 if (ret)
371 return ret;
372
373 devpriv->daqio = pci_resource_start(pcidev, 2);
374 devpriv->BADR3 = pci_resource_start(pcidev, 3);
375 dev->iobase = pci_resource_start(pcidev, 4);
376
377 dev->pacer = comedi_8254_init(devpriv->BADR3 + PCIMDAS_8254_BASE,
378 cb_pcimdas_pacer_clk(dev),
379 I8254_IO8, 0);
380 if (!dev->pacer)
381 return -ENOMEM;
382
383 ret = comedi_alloc_subdevices(dev, 6);
384 if (ret)
385 return ret;
386
387
388 s = &dev->subdevices[0];
389 s->type = COMEDI_SUBD_AI;
390 s->subdev_flags = SDF_READABLE;
391 if (cb_pcimdas_is_ai_se(dev)) {
392 s->subdev_flags |= SDF_GROUND;
393 s->n_chan = 16;
394 } else {
395 s->subdev_flags |= SDF_DIFF;
396 s->n_chan = 8;
397 }
398 s->maxdata = 0xffff;
399 s->range_table = cb_pcimdas_is_ai_uni(dev) ? &cb_pcimdas_ai_uni_range
400 : &cb_pcimdas_ai_bip_range;
401 s->insn_read = cb_pcimdas_ai_insn_read;
402
403
404 s = &dev->subdevices[1];
405 s->type = COMEDI_SUBD_AO;
406 s->subdev_flags = SDF_WRITABLE;
407 s->n_chan = 2;
408 s->maxdata = 0xfff;
409 s->range_table = &cb_pcimdas_ao_range;
410 s->insn_write = cb_pcimdas_ao_insn_write;
411
412 ret = comedi_alloc_subdev_readback(s);
413 if (ret)
414 return ret;
415
416
417 s = &dev->subdevices[2];
418 ret = subdev_8255_init(dev, s, NULL, PCIMDAS_8255_BASE);
419 if (ret)
420 return ret;
421
422
423 s = &dev->subdevices[3];
424 s->type = COMEDI_SUBD_DI;
425 s->subdev_flags = SDF_READABLE;
426 s->n_chan = 4;
427 s->maxdata = 1;
428 s->range_table = &range_digital;
429 s->insn_bits = cb_pcimdas_di_insn_bits;
430
431
432 s = &dev->subdevices[4];
433 s->type = COMEDI_SUBD_DO;
434 s->subdev_flags = SDF_WRITABLE;
435 s->n_chan = 4;
436 s->maxdata = 1;
437 s->range_table = &range_digital;
438 s->insn_bits = cb_pcimdas_do_insn_bits;
439
440
441 s = &dev->subdevices[5];
442 comedi_8254_subdevice_init(s, dev->pacer);
443
444 dev->pacer->insn_config = cb_pcimdas_counter_insn_config;
445
446
447 comedi_8254_set_busy(dev->pacer, 1, true);
448 comedi_8254_set_busy(dev->pacer, 2, true);
449
450 return 0;
451}
452
453static struct comedi_driver cb_pcimdas_driver = {
454 .driver_name = "cb_pcimdas",
455 .module = THIS_MODULE,
456 .auto_attach = cb_pcimdas_auto_attach,
457 .detach = comedi_pci_detach,
458};
459
460static int cb_pcimdas_pci_probe(struct pci_dev *dev,
461 const struct pci_device_id *id)
462{
463 return comedi_pci_auto_config(dev, &cb_pcimdas_driver,
464 id->driver_data);
465}
466
467static const struct pci_device_id cb_pcimdas_pci_table[] = {
468 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0056) },
469 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0115) },
470 { 0 }
471};
472MODULE_DEVICE_TABLE(pci, cb_pcimdas_pci_table);
473
474static struct pci_driver cb_pcimdas_pci_driver = {
475 .name = "cb_pcimdas",
476 .id_table = cb_pcimdas_pci_table,
477 .probe = cb_pcimdas_pci_probe,
478 .remove = comedi_pci_auto_unconfig,
479};
480module_comedi_pci_driver(cb_pcimdas_driver, cb_pcimdas_pci_driver);
481
482MODULE_AUTHOR("Comedi http://www.comedi.org");
483MODULE_DESCRIPTION("Comedi driver for PCIM-DAS1602/16 and PCIe-DAS1602/16");
484MODULE_LICENSE("GPL");
485