linux/drivers/staging/comedi/drivers/pcl818.c
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   1/*
   2 * comedi/drivers/pcl818.c
   3 *
   4 * Driver: pcl818
   5 * Description: Advantech PCL-818 cards, PCL-718
   6 * Author: Michal Dobes <dobes@tesnet.cz>
   7 * Devices: [Advantech] PCL-818L (pcl818l), PCL-818H (pcl818h),
   8 *   PCL-818HD (pcl818hd), PCL-818HG (pcl818hg), PCL-818 (pcl818),
   9 *   PCL-718 (pcl718)
  10 * Status: works
  11 *
  12 * All cards have 16 SE/8 DIFF ADCs, one or two DACs, 16 DI and 16 DO.
  13 * Differences are only at maximal sample speed, range list and FIFO
  14 * support.
  15 * The driver support AI mode 0, 1, 3 other subdevices (AO, DI, DO) support
  16 * only mode 0. If DMA/FIFO/INT are disabled then AI support only mode 0.
  17 * PCL-818HD and PCL-818HG support 1kword FIFO. Driver support this FIFO
  18 * but this code is untested.
  19 * A word or two about DMA. Driver support DMA operations at two ways:
  20 * 1) DMA uses two buffers and after one is filled then is generated
  21 *    INT and DMA restart with second buffer. With this mode I'm unable run
  22 *    more that 80Ksamples/secs without data dropouts on K6/233.
  23 * 2) DMA uses one buffer and run in autoinit mode and the data are
  24 *    from DMA buffer moved on the fly with 2kHz interrupts from RTC.
  25 *    This mode is used if the interrupt 8 is available for allocation.
  26 *    If not, then first DMA mode is used. With this I can run at
  27 *    full speed one card (100ksamples/secs) or two cards with
  28 *    60ksamples/secs each (more is problem on account of ISA limitations).
  29 *    To use this mode you must have compiled  kernel with disabled
  30 *    "Enhanced Real Time Clock Support".
  31 *    Maybe you can have problems if you use xntpd or similar.
  32 *    If you've data dropouts with DMA mode 2 then:
  33 *     a) disable IDE DMA
  34 *     b) switch text mode console to fb.
  35 *
  36 *  Options for PCL-818L:
  37 *  [0] - IO Base
  38 *  [1] - IRQ        (0=disable, 2, 3, 4, 5, 6, 7)
  39 *  [2] - DMA        (0=disable, 1, 3)
  40 *  [3] - 0, 10=10MHz clock for 8254
  41 *            1= 1MHz clock for 8254
  42 *  [4] - 0,  5=A/D input  -5V.. +5V
  43 *        1, 10=A/D input -10V..+10V
  44 *  [5] - 0,  5=D/A output 0-5V  (internal reference -5V)
  45 *        1, 10=D/A output 0-10V (internal reference -10V)
  46 *        2    =D/A output unknown (external reference)
  47 *
  48 *  Options for PCL-818, PCL-818H:
  49 *  [0] - IO Base
  50 *  [1] - IRQ        (0=disable, 2, 3, 4, 5, 6, 7)
  51 *  [2] - DMA        (0=disable, 1, 3)
  52 *  [3] - 0, 10=10MHz clock for 8254
  53 *            1= 1MHz clock for 8254
  54 *  [4] - 0,  5=D/A output 0-5V  (internal reference -5V)
  55 *        1, 10=D/A output 0-10V (internal reference -10V)
  56 *        2    =D/A output unknown (external reference)
  57 *
  58 *  Options for PCL-818HD, PCL-818HG:
  59 *  [0] - IO Base
  60 *  [1] - IRQ        (0=disable, 2, 3, 4, 5, 6, 7)
  61 *  [2] - DMA/FIFO  (-1=use FIFO, 0=disable both FIFO and DMA,
  62 *                    1=use DMA ch 1, 3=use DMA ch 3)
  63 *  [3] - 0, 10=10MHz clock for 8254
  64 *            1= 1MHz clock for 8254
  65 *  [4] - 0,  5=D/A output 0-5V  (internal reference -5V)
  66 *        1, 10=D/A output 0-10V (internal reference -10V)
  67 *        2    =D/A output unknown (external reference)
  68 *
  69 *  Options for PCL-718:
  70 *  [0] - IO Base
  71 *  [1] - IRQ        (0=disable, 2, 3, 4, 5, 6, 7)
  72 *  [2] - DMA        (0=disable, 1, 3)
  73 *  [3] - 0, 10=10MHz clock for 8254
  74 *            1= 1MHz clock for 8254
  75 *  [4] -     0=A/D Range is +/-10V
  76 *            1=             +/-5V
  77 *            2=             +/-2.5V
  78 *            3=             +/-1V
  79 *            4=             +/-0.5V
  80 *            5=             user defined bipolar
  81 *            6=             0-10V
  82 *            7=             0-5V
  83 *            8=             0-2V
  84 *            9=             0-1V
  85 *           10=             user defined unipolar
  86 *  [5] - 0,  5=D/A outputs 0-5V  (internal reference -5V)
  87 *        1, 10=D/A outputs 0-10V (internal reference -10V)
  88 *            2=D/A outputs unknown (external reference)
  89 *  [6] - 0, 60=max  60kHz A/D sampling
  90 *        1,100=max 100kHz A/D sampling (PCL-718 with Option 001 installed)
  91 *
  92 */
  93
  94#include <linux/module.h>
  95#include <linux/gfp.h>
  96#include <linux/delay.h>
  97#include <linux/io.h>
  98#include <linux/interrupt.h>
  99
 100#include "../comedidev.h"
 101
 102#include "comedi_isadma.h"
 103#include "comedi_8254.h"
 104
 105/*
 106 * Register I/O map
 107 */
 108#define PCL818_AI_LSB_REG                       0x00
 109#define PCL818_AI_MSB_REG                       0x01
 110#define PCL818_RANGE_REG                        0x01
 111#define PCL818_MUX_REG                          0x02
 112#define PCL818_MUX_SCAN(_first, _last)          (((_last) << 4) | (_first))
 113#define PCL818_DO_DI_LSB_REG                    0x03
 114#define PCL818_AO_LSB_REG(x)                    (0x04 + ((x) * 2))
 115#define PCL818_AO_MSB_REG(x)                    (0x05 + ((x) * 2))
 116#define PCL818_STATUS_REG                       0x08
 117#define PCL818_STATUS_NEXT_CHAN_MASK            (0xf << 0)
 118#define PCL818_STATUS_INT                       BIT(4)
 119#define PCL818_STATUS_MUX                       BIT(5)
 120#define PCL818_STATUS_UNI                       BIT(6)
 121#define PCL818_STATUS_EOC                       BIT(7)
 122#define PCL818_CTRL_REG                         0x09
 123#define PCL818_CTRL_TRIG(x)                     (((x) & 0x3) << 0)
 124#define PCL818_CTRL_DISABLE_TRIG                PCL818_CTRL_TRIG(0)
 125#define PCL818_CTRL_SOFT_TRIG                   PCL818_CTRL_TRIG(1)
 126#define PCL818_CTRL_EXT_TRIG                    PCL818_CTRL_TRIG(2)
 127#define PCL818_CTRL_PACER_TRIG                  PCL818_CTRL_TRIG(3)
 128#define PCL818_CTRL_DMAE                        BIT(2)
 129#define PCL818_CTRL_IRQ(x)                      ((x) << 4)
 130#define PCL818_CTRL_INTE                        BIT(7)
 131#define PCL818_CNTENABLE_REG                    0x0a
 132#define PCL818_CNTENABLE_PACER_TRIG0            BIT(0)
 133#define PCL818_CNTENABLE_CNT0_INT_CLK           BIT(1)  /* 0=ext clk */
 134#define PCL818_DO_DI_MSB_REG                    0x0b
 135#define PCL818_TIMER_BASE                       0x0c
 136
 137/* W: fifo enable/disable */
 138#define PCL818_FI_ENABLE 6
 139/* W: fifo interrupt clear */
 140#define PCL818_FI_INTCLR 20
 141/* W: fifo interrupt clear */
 142#define PCL818_FI_FLUSH 25
 143/* R: fifo status */
 144#define PCL818_FI_STATUS 25
 145/* R: one record from FIFO */
 146#define PCL818_FI_DATALO 23
 147#define PCL818_FI_DATAHI 24
 148
 149#define MAGIC_DMA_WORD 0x5a5a
 150
 151static const struct comedi_lrange range_pcl818h_ai = {
 152        9, {
 153                BIP_RANGE(5),
 154                BIP_RANGE(2.5),
 155                BIP_RANGE(1.25),
 156                BIP_RANGE(0.625),
 157                UNI_RANGE(10),
 158                UNI_RANGE(5),
 159                UNI_RANGE(2.5),
 160                UNI_RANGE(1.25),
 161                BIP_RANGE(10)
 162        }
 163};
 164
 165static const struct comedi_lrange range_pcl818hg_ai = {
 166        10, {
 167                BIP_RANGE(5),
 168                BIP_RANGE(0.5),
 169                BIP_RANGE(0.05),
 170                BIP_RANGE(0.005),
 171                UNI_RANGE(10),
 172                UNI_RANGE(1),
 173                UNI_RANGE(0.1),
 174                UNI_RANGE(0.01),
 175                BIP_RANGE(10),
 176                BIP_RANGE(1),
 177                BIP_RANGE(0.1),
 178                BIP_RANGE(0.01)
 179        }
 180};
 181
 182static const struct comedi_lrange range_pcl818l_l_ai = {
 183        4, {
 184                BIP_RANGE(5),
 185                BIP_RANGE(2.5),
 186                BIP_RANGE(1.25),
 187                BIP_RANGE(0.625)
 188        }
 189};
 190
 191static const struct comedi_lrange range_pcl818l_h_ai = {
 192        4, {
 193                BIP_RANGE(10),
 194                BIP_RANGE(5),
 195                BIP_RANGE(2.5),
 196                BIP_RANGE(1.25)
 197        }
 198};
 199
 200static const struct comedi_lrange range718_bipolar1 = {
 201        1, {
 202                BIP_RANGE(1)
 203        }
 204};
 205
 206static const struct comedi_lrange range718_bipolar0_5 = {
 207        1, {
 208                BIP_RANGE(0.5)
 209        }
 210};
 211
 212static const struct comedi_lrange range718_unipolar2 = {
 213        1, {
 214                UNI_RANGE(2)
 215        }
 216};
 217
 218static const struct comedi_lrange range718_unipolar1 = {
 219        1, {
 220                BIP_RANGE(1)
 221        }
 222};
 223
 224struct pcl818_board {
 225        const char *name;
 226        unsigned int ns_min;
 227        int n_aochan;
 228        const struct comedi_lrange *ai_range_type;
 229        unsigned int has_dma:1;
 230        unsigned int has_fifo:1;
 231        unsigned int is_818:1;
 232};
 233
 234static const struct pcl818_board boardtypes[] = {
 235        {
 236                .name           = "pcl818l",
 237                .ns_min         = 25000,
 238                .n_aochan       = 1,
 239                .ai_range_type  = &range_pcl818l_l_ai,
 240                .has_dma        = 1,
 241                .is_818         = 1,
 242        }, {
 243                .name           = "pcl818h",
 244                .ns_min         = 10000,
 245                .n_aochan       = 1,
 246                .ai_range_type  = &range_pcl818h_ai,
 247                .has_dma        = 1,
 248                .is_818         = 1,
 249        }, {
 250                .name           = "pcl818hd",
 251                .ns_min         = 10000,
 252                .n_aochan       = 1,
 253                .ai_range_type  = &range_pcl818h_ai,
 254                .has_dma        = 1,
 255                .has_fifo       = 1,
 256                .is_818         = 1,
 257        }, {
 258                .name           = "pcl818hg",
 259                .ns_min         = 10000,
 260                .n_aochan       = 1,
 261                .ai_range_type  = &range_pcl818hg_ai,
 262                .has_dma        = 1,
 263                .has_fifo       = 1,
 264                .is_818         = 1,
 265        }, {
 266                .name           = "pcl818",
 267                .ns_min         = 10000,
 268                .n_aochan       = 2,
 269                .ai_range_type  = &range_pcl818h_ai,
 270                .has_dma        = 1,
 271                .is_818         = 1,
 272        }, {
 273                .name           = "pcl718",
 274                .ns_min         = 16000,
 275                .n_aochan       = 2,
 276                .ai_range_type  = &range_unipolar5,
 277                .has_dma        = 1,
 278        }, {
 279                .name           = "pcm3718",
 280                .ns_min         = 10000,
 281                .ai_range_type  = &range_pcl818h_ai,
 282                .has_dma        = 1,
 283                .is_818         = 1,
 284        },
 285};
 286
 287struct pcl818_private {
 288        struct comedi_isadma *dma;
 289        /*  manimal allowed delay between samples (in us) for actual card */
 290        unsigned int ns_min;
 291        /*  MUX setting for actual AI operations */
 292        unsigned int act_chanlist[16];
 293        unsigned int act_chanlist_len;  /*  how long is actual MUX list */
 294        unsigned int act_chanlist_pos;  /*  actual position in MUX list */
 295        unsigned int usefifo:1;
 296        unsigned int ai_cmd_running:1;
 297        unsigned int ai_cmd_canceled:1;
 298};
 299
 300static void pcl818_ai_setup_dma(struct comedi_device *dev,
 301                                struct comedi_subdevice *s,
 302                                unsigned int unread_samples)
 303{
 304        struct pcl818_private *devpriv = dev->private;
 305        struct comedi_isadma *dma = devpriv->dma;
 306        struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
 307        unsigned int max_samples = comedi_bytes_to_samples(s, desc->maxsize);
 308        unsigned int nsamples;
 309
 310        comedi_isadma_disable(dma->chan);
 311
 312        /*
 313         * Determine dma size based on the buffer maxsize plus the number of
 314         * unread samples and the number of samples remaining in the command.
 315         */
 316        nsamples = comedi_nsamples_left(s, max_samples + unread_samples);
 317        if (nsamples > unread_samples) {
 318                nsamples -= unread_samples;
 319                desc->size = comedi_samples_to_bytes(s, nsamples);
 320                comedi_isadma_program(desc);
 321        }
 322}
 323
 324static void pcl818_ai_set_chan_range(struct comedi_device *dev,
 325                                     unsigned int chan,
 326                                     unsigned int range)
 327{
 328        outb(chan, dev->iobase + PCL818_MUX_REG);
 329        outb(range, dev->iobase + PCL818_RANGE_REG);
 330}
 331
 332static void pcl818_ai_set_chan_scan(struct comedi_device *dev,
 333                                    unsigned int first_chan,
 334                                    unsigned int last_chan)
 335{
 336        outb(PCL818_MUX_SCAN(first_chan, last_chan),
 337             dev->iobase + PCL818_MUX_REG);
 338}
 339
 340static void pcl818_ai_setup_chanlist(struct comedi_device *dev,
 341                                     unsigned int *chanlist,
 342                                     unsigned int seglen)
 343{
 344        struct pcl818_private *devpriv = dev->private;
 345        unsigned int first_chan = CR_CHAN(chanlist[0]);
 346        unsigned int last_chan;
 347        unsigned int range;
 348        int i;
 349
 350        devpriv->act_chanlist_len = seglen;
 351        devpriv->act_chanlist_pos = 0;
 352
 353        /* store range list to card */
 354        for (i = 0; i < seglen; i++) {
 355                last_chan = CR_CHAN(chanlist[i]);
 356                range = CR_RANGE(chanlist[i]);
 357
 358                devpriv->act_chanlist[i] = last_chan;
 359
 360                pcl818_ai_set_chan_range(dev, last_chan, range);
 361        }
 362
 363        udelay(1);
 364
 365        pcl818_ai_set_chan_scan(dev, first_chan, last_chan);
 366}
 367
 368static void pcl818_ai_clear_eoc(struct comedi_device *dev)
 369{
 370        /* writing any value clears the interrupt request */
 371        outb(0, dev->iobase + PCL818_STATUS_REG);
 372}
 373
 374static void pcl818_ai_soft_trig(struct comedi_device *dev)
 375{
 376        /* writing any value triggers a software conversion */
 377        outb(0, dev->iobase + PCL818_AI_LSB_REG);
 378}
 379
 380static unsigned int pcl818_ai_get_fifo_sample(struct comedi_device *dev,
 381                                              struct comedi_subdevice *s,
 382                                              unsigned int *chan)
 383{
 384        unsigned int val;
 385
 386        val = inb(dev->iobase + PCL818_FI_DATALO);
 387        val |= (inb(dev->iobase + PCL818_FI_DATAHI) << 8);
 388
 389        if (chan)
 390                *chan = val & 0xf;
 391
 392        return (val >> 4) & s->maxdata;
 393}
 394
 395static unsigned int pcl818_ai_get_sample(struct comedi_device *dev,
 396                                         struct comedi_subdevice *s,
 397                                         unsigned int *chan)
 398{
 399        unsigned int val;
 400
 401        val = inb(dev->iobase + PCL818_AI_MSB_REG) << 8;
 402        val |= inb(dev->iobase + PCL818_AI_LSB_REG);
 403
 404        if (chan)
 405                *chan = val & 0xf;
 406
 407        return (val >> 4) & s->maxdata;
 408}
 409
 410static int pcl818_ai_eoc(struct comedi_device *dev,
 411                         struct comedi_subdevice *s,
 412                         struct comedi_insn *insn,
 413                         unsigned long context)
 414{
 415        unsigned int status;
 416
 417        status = inb(dev->iobase + PCL818_STATUS_REG);
 418        if (status & PCL818_STATUS_INT)
 419                return 0;
 420        return -EBUSY;
 421}
 422
 423static bool pcl818_ai_write_sample(struct comedi_device *dev,
 424                                   struct comedi_subdevice *s,
 425                                   unsigned int chan, unsigned int val)
 426{
 427        struct pcl818_private *devpriv = dev->private;
 428        struct comedi_cmd *cmd = &s->async->cmd;
 429        unsigned int expected_chan;
 430
 431        expected_chan = devpriv->act_chanlist[devpriv->act_chanlist_pos];
 432        if (chan != expected_chan) {
 433                dev_dbg(dev->class_dev,
 434                        "A/D mode1/3 %s - channel dropout %d!=%d !\n",
 435                        (devpriv->dma) ? "DMA" :
 436                        (devpriv->usefifo) ? "FIFO" : "IRQ",
 437                        chan, expected_chan);
 438                s->async->events |= COMEDI_CB_ERROR;
 439                return false;
 440        }
 441
 442        comedi_buf_write_samples(s, &val, 1);
 443
 444        devpriv->act_chanlist_pos++;
 445        if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len)
 446                devpriv->act_chanlist_pos = 0;
 447
 448        if (cmd->stop_src == TRIG_COUNT &&
 449            s->async->scans_done >= cmd->stop_arg) {
 450                s->async->events |= COMEDI_CB_EOA;
 451                return false;
 452        }
 453
 454        return true;
 455}
 456
 457static void pcl818_handle_eoc(struct comedi_device *dev,
 458                              struct comedi_subdevice *s)
 459{
 460        unsigned int chan;
 461        unsigned int val;
 462
 463        if (pcl818_ai_eoc(dev, s, NULL, 0)) {
 464                dev_err(dev->class_dev, "A/D mode1/3 IRQ without DRDY!\n");
 465                s->async->events |= COMEDI_CB_ERROR;
 466                return;
 467        }
 468
 469        val = pcl818_ai_get_sample(dev, s, &chan);
 470        pcl818_ai_write_sample(dev, s, chan, val);
 471}
 472
 473static void pcl818_handle_dma(struct comedi_device *dev,
 474                              struct comedi_subdevice *s)
 475{
 476        struct pcl818_private *devpriv = dev->private;
 477        struct comedi_isadma *dma = devpriv->dma;
 478        struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
 479        unsigned short *ptr = desc->virt_addr;
 480        unsigned int nsamples = comedi_bytes_to_samples(s, desc->size);
 481        unsigned int chan;
 482        unsigned int val;
 483        int i;
 484
 485        /* restart dma with the next buffer */
 486        dma->cur_dma = 1 - dma->cur_dma;
 487        pcl818_ai_setup_dma(dev, s, nsamples);
 488
 489        for (i = 0; i < nsamples; i++) {
 490                val = ptr[i];
 491                chan = val & 0xf;
 492                val = (val >> 4) & s->maxdata;
 493                if (!pcl818_ai_write_sample(dev, s, chan, val))
 494                        break;
 495        }
 496}
 497
 498static void pcl818_handle_fifo(struct comedi_device *dev,
 499                               struct comedi_subdevice *s)
 500{
 501        unsigned int status;
 502        unsigned int chan;
 503        unsigned int val;
 504        int i, len;
 505
 506        status = inb(dev->iobase + PCL818_FI_STATUS);
 507
 508        if (status & 4) {
 509                dev_err(dev->class_dev, "A/D mode1/3 FIFO overflow!\n");
 510                s->async->events |= COMEDI_CB_ERROR;
 511                return;
 512        }
 513
 514        if (status & 1) {
 515                dev_err(dev->class_dev,
 516                        "A/D mode1/3 FIFO interrupt without data!\n");
 517                s->async->events |= COMEDI_CB_ERROR;
 518                return;
 519        }
 520
 521        if (status & 2)
 522                len = 512;
 523        else
 524                len = 0;
 525
 526        for (i = 0; i < len; i++) {
 527                val = pcl818_ai_get_fifo_sample(dev, s, &chan);
 528                if (!pcl818_ai_write_sample(dev, s, chan, val))
 529                        break;
 530        }
 531}
 532
 533static irqreturn_t pcl818_interrupt(int irq, void *d)
 534{
 535        struct comedi_device *dev = d;
 536        struct pcl818_private *devpriv = dev->private;
 537        struct comedi_subdevice *s = dev->read_subdev;
 538        struct comedi_cmd *cmd = &s->async->cmd;
 539
 540        if (!dev->attached || !devpriv->ai_cmd_running) {
 541                pcl818_ai_clear_eoc(dev);
 542                return IRQ_HANDLED;
 543        }
 544
 545        if (devpriv->ai_cmd_canceled) {
 546                /*
 547                 * The cleanup from ai_cancel() has been delayed
 548                 * until now because the card doesn't seem to like
 549                 * being reprogrammed while a DMA transfer is in
 550                 * progress.
 551                 */
 552                s->async->scans_done = cmd->stop_arg;
 553                s->cancel(dev, s);
 554                return IRQ_HANDLED;
 555        }
 556
 557        if (devpriv->dma)
 558                pcl818_handle_dma(dev, s);
 559        else if (devpriv->usefifo)
 560                pcl818_handle_fifo(dev, s);
 561        else
 562                pcl818_handle_eoc(dev, s);
 563
 564        pcl818_ai_clear_eoc(dev);
 565
 566        comedi_handle_events(dev, s);
 567        return IRQ_HANDLED;
 568}
 569
 570static int check_channel_list(struct comedi_device *dev,
 571                              struct comedi_subdevice *s,
 572                              unsigned int *chanlist, unsigned int n_chan)
 573{
 574        unsigned int chansegment[16];
 575        unsigned int i, nowmustbechan, seglen, segpos;
 576
 577        /* correct channel and range number check itself comedi/range.c */
 578        if (n_chan < 1) {
 579                dev_err(dev->class_dev, "range/channel list is empty!\n");
 580                return 0;
 581        }
 582
 583        if (n_chan > 1) {
 584                /*  first channel is every time ok */
 585                chansegment[0] = chanlist[0];
 586                /*  build part of chanlist */
 587                for (i = 1, seglen = 1; i < n_chan; i++, seglen++) {
 588                        /* we detect loop, this must by finish */
 589
 590                        if (chanlist[0] == chanlist[i])
 591                                break;
 592                        nowmustbechan =
 593                            (CR_CHAN(chansegment[i - 1]) + 1) % s->n_chan;
 594                        if (nowmustbechan != CR_CHAN(chanlist[i])) {
 595                                /*  channel list isn't continuous :-( */
 596                                dev_dbg(dev->class_dev,
 597                                        "channel list must be continuous! chanlist[%i]=%d but must be %d or %d!\n",
 598                                        i, CR_CHAN(chanlist[i]), nowmustbechan,
 599                                        CR_CHAN(chanlist[0]));
 600                                return 0;
 601                        }
 602                        /*  well, this is next correct channel in list */
 603                        chansegment[i] = chanlist[i];
 604                }
 605
 606                /*  check whole chanlist */
 607                for (i = 0, segpos = 0; i < n_chan; i++) {
 608                        if (chanlist[i] != chansegment[i % seglen]) {
 609                                dev_dbg(dev->class_dev,
 610                                        "bad channel or range number! chanlist[%i]=%d,%d,%d and not %d,%d,%d!\n",
 611                                        i, CR_CHAN(chansegment[i]),
 612                                        CR_RANGE(chansegment[i]),
 613                                        CR_AREF(chansegment[i]),
 614                                        CR_CHAN(chanlist[i % seglen]),
 615                                        CR_RANGE(chanlist[i % seglen]),
 616                                        CR_AREF(chansegment[i % seglen]));
 617                                return 0;       /*  chan/gain list is strange */
 618                        }
 619                }
 620        } else {
 621                seglen = 1;
 622        }
 623        return seglen;
 624}
 625
 626static int check_single_ended(unsigned int port)
 627{
 628        if (inb(port + PCL818_STATUS_REG) & PCL818_STATUS_MUX)
 629                return 1;
 630        return 0;
 631}
 632
 633static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
 634                      struct comedi_cmd *cmd)
 635{
 636        const struct pcl818_board *board = dev->board_ptr;
 637        int err = 0;
 638
 639        /* Step 1 : check if triggers are trivially valid */
 640
 641        err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
 642        err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
 643        err |= comedi_check_trigger_src(&cmd->convert_src,
 644                                        TRIG_TIMER | TRIG_EXT);
 645        err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 646        err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
 647
 648        if (err)
 649                return 1;
 650
 651        /* Step 2a : make sure trigger sources are unique */
 652
 653        err |= comedi_check_trigger_is_unique(cmd->convert_src);
 654        err |= comedi_check_trigger_is_unique(cmd->stop_src);
 655
 656        /* Step 2b : and mutually compatible */
 657
 658        if (err)
 659                return 2;
 660
 661        /* Step 3: check if arguments are trivially valid */
 662
 663        err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
 664        err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
 665
 666        if (cmd->convert_src == TRIG_TIMER) {
 667                err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
 668                                                    board->ns_min);
 669        } else {        /* TRIG_EXT */
 670                err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
 671        }
 672
 673        err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
 674                                           cmd->chanlist_len);
 675
 676        if (cmd->stop_src == TRIG_COUNT)
 677                err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
 678        else    /* TRIG_NONE */
 679                err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
 680
 681        if (err)
 682                return 3;
 683
 684        /* step 4: fix up any arguments */
 685
 686        if (cmd->convert_src == TRIG_TIMER) {
 687                unsigned int arg = cmd->convert_arg;
 688
 689                comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
 690                err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
 691        }
 692
 693        if (err)
 694                return 4;
 695
 696        /* step 5: complain about special chanlist considerations */
 697
 698        if (cmd->chanlist) {
 699                if (!check_channel_list(dev, s, cmd->chanlist,
 700                                        cmd->chanlist_len))
 701                        return 5;       /*  incorrect channels list */
 702        }
 703
 704        return 0;
 705}
 706
 707static int pcl818_ai_cmd(struct comedi_device *dev,
 708                         struct comedi_subdevice *s)
 709{
 710        struct pcl818_private *devpriv = dev->private;
 711        struct comedi_isadma *dma = devpriv->dma;
 712        struct comedi_cmd *cmd = &s->async->cmd;
 713        unsigned int ctrl = 0;
 714        unsigned int seglen;
 715
 716        if (devpriv->ai_cmd_running)
 717                return -EBUSY;
 718
 719        seglen = check_channel_list(dev, s, cmd->chanlist, cmd->chanlist_len);
 720        if (seglen < 1)
 721                return -EINVAL;
 722        pcl818_ai_setup_chanlist(dev, cmd->chanlist, seglen);
 723
 724        devpriv->ai_cmd_running = 1;
 725        devpriv->ai_cmd_canceled = 0;
 726        devpriv->act_chanlist_pos = 0;
 727
 728        if (cmd->convert_src == TRIG_TIMER)
 729                ctrl |= PCL818_CTRL_PACER_TRIG;
 730        else
 731                ctrl |= PCL818_CTRL_EXT_TRIG;
 732
 733        outb(0, dev->iobase + PCL818_CNTENABLE_REG);
 734
 735        if (dma) {
 736                /* setup and enable dma for the first buffer */
 737                dma->cur_dma = 0;
 738                pcl818_ai_setup_dma(dev, s, 0);
 739
 740                ctrl |= PCL818_CTRL_INTE | PCL818_CTRL_IRQ(dev->irq) |
 741                        PCL818_CTRL_DMAE;
 742        } else if (devpriv->usefifo) {
 743                /* enable FIFO */
 744                outb(1, dev->iobase + PCL818_FI_ENABLE);
 745        } else {
 746                ctrl |= PCL818_CTRL_INTE | PCL818_CTRL_IRQ(dev->irq);
 747        }
 748        outb(ctrl, dev->iobase + PCL818_CTRL_REG);
 749
 750        if (cmd->convert_src == TRIG_TIMER) {
 751                comedi_8254_update_divisors(dev->pacer);
 752                comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
 753        }
 754
 755        return 0;
 756}
 757
 758static int pcl818_ai_cancel(struct comedi_device *dev,
 759                            struct comedi_subdevice *s)
 760{
 761        struct pcl818_private *devpriv = dev->private;
 762        struct comedi_isadma *dma = devpriv->dma;
 763        struct comedi_cmd *cmd = &s->async->cmd;
 764
 765        if (!devpriv->ai_cmd_running)
 766                return 0;
 767
 768        if (dma) {
 769                if (cmd->stop_src == TRIG_NONE ||
 770                    (cmd->stop_src == TRIG_COUNT &&
 771                     s->async->scans_done < cmd->stop_arg)) {
 772                        if (!devpriv->ai_cmd_canceled) {
 773                                /*
 774                                * Wait for running dma transfer to end,
 775                                * do cleanup in interrupt.
 776                                */
 777                                devpriv->ai_cmd_canceled = 1;
 778                                return 0;
 779                        }
 780                }
 781                comedi_isadma_disable(dma->chan);
 782        }
 783
 784        outb(PCL818_CTRL_DISABLE_TRIG, dev->iobase + PCL818_CTRL_REG);
 785        comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
 786        pcl818_ai_clear_eoc(dev);
 787
 788        if (devpriv->usefifo) { /*  FIFO shutdown */
 789                outb(0, dev->iobase + PCL818_FI_INTCLR);
 790                outb(0, dev->iobase + PCL818_FI_FLUSH);
 791                outb(0, dev->iobase + PCL818_FI_ENABLE);
 792        }
 793        devpriv->ai_cmd_running = 0;
 794        devpriv->ai_cmd_canceled = 0;
 795
 796        return 0;
 797}
 798
 799static int pcl818_ai_insn_read(struct comedi_device *dev,
 800                               struct comedi_subdevice *s,
 801                               struct comedi_insn *insn,
 802                               unsigned int *data)
 803{
 804        unsigned int chan = CR_CHAN(insn->chanspec);
 805        unsigned int range = CR_RANGE(insn->chanspec);
 806        int ret = 0;
 807        int i;
 808
 809        outb(PCL818_CTRL_SOFT_TRIG, dev->iobase + PCL818_CTRL_REG);
 810
 811        pcl818_ai_set_chan_range(dev, chan, range);
 812        pcl818_ai_set_chan_scan(dev, chan, chan);
 813
 814        for (i = 0; i < insn->n; i++) {
 815                pcl818_ai_clear_eoc(dev);
 816                pcl818_ai_soft_trig(dev);
 817
 818                ret = comedi_timeout(dev, s, insn, pcl818_ai_eoc, 0);
 819                if (ret)
 820                        break;
 821
 822                data[i] = pcl818_ai_get_sample(dev, s, NULL);
 823        }
 824        pcl818_ai_clear_eoc(dev);
 825
 826        return ret ? ret : insn->n;
 827}
 828
 829static int pcl818_ao_insn_write(struct comedi_device *dev,
 830                                struct comedi_subdevice *s,
 831                                struct comedi_insn *insn,
 832                                unsigned int *data)
 833{
 834        unsigned int chan = CR_CHAN(insn->chanspec);
 835        unsigned int val = s->readback[chan];
 836        int i;
 837
 838        for (i = 0; i < insn->n; i++) {
 839                val = data[i];
 840                outb((val & 0x000f) << 4,
 841                     dev->iobase + PCL818_AO_LSB_REG(chan));
 842                outb((val & 0x0ff0) >> 4,
 843                     dev->iobase + PCL818_AO_MSB_REG(chan));
 844        }
 845        s->readback[chan] = val;
 846
 847        return insn->n;
 848}
 849
 850static int pcl818_di_insn_bits(struct comedi_device *dev,
 851                               struct comedi_subdevice *s,
 852                               struct comedi_insn *insn,
 853                               unsigned int *data)
 854{
 855        data[1] = inb(dev->iobase + PCL818_DO_DI_LSB_REG) |
 856                  (inb(dev->iobase + PCL818_DO_DI_MSB_REG) << 8);
 857
 858        return insn->n;
 859}
 860
 861static int pcl818_do_insn_bits(struct comedi_device *dev,
 862                               struct comedi_subdevice *s,
 863                               struct comedi_insn *insn,
 864                               unsigned int *data)
 865{
 866        if (comedi_dio_update_state(s, data)) {
 867                outb(s->state & 0xff, dev->iobase + PCL818_DO_DI_LSB_REG);
 868                outb((s->state >> 8), dev->iobase + PCL818_DO_DI_MSB_REG);
 869        }
 870
 871        data[1] = s->state;
 872
 873        return insn->n;
 874}
 875
 876static void pcl818_reset(struct comedi_device *dev)
 877{
 878        const struct pcl818_board *board = dev->board_ptr;
 879        unsigned int chan;
 880
 881        /* flush and disable the FIFO */
 882        if (board->has_fifo) {
 883                outb(0, dev->iobase + PCL818_FI_INTCLR);
 884                outb(0, dev->iobase + PCL818_FI_FLUSH);
 885                outb(0, dev->iobase + PCL818_FI_ENABLE);
 886        }
 887
 888        /* disable analog input trigger */
 889        outb(PCL818_CTRL_DISABLE_TRIG, dev->iobase + PCL818_CTRL_REG);
 890        pcl818_ai_clear_eoc(dev);
 891
 892        pcl818_ai_set_chan_range(dev, 0, 0);
 893
 894        /* stop pacer */
 895        outb(0, dev->iobase + PCL818_CNTENABLE_REG);
 896
 897        /* set analog output channels to 0V */
 898        for (chan = 0; chan < board->n_aochan; chan++) {
 899                outb(0, dev->iobase + PCL818_AO_LSB_REG(chan));
 900                outb(0, dev->iobase + PCL818_AO_MSB_REG(chan));
 901        }
 902
 903        /* set all digital outputs low */
 904        outb(0, dev->iobase + PCL818_DO_DI_MSB_REG);
 905        outb(0, dev->iobase + PCL818_DO_DI_LSB_REG);
 906}
 907
 908static void pcl818_set_ai_range_table(struct comedi_device *dev,
 909                                      struct comedi_subdevice *s,
 910                                      struct comedi_devconfig *it)
 911{
 912        const struct pcl818_board *board = dev->board_ptr;
 913
 914        /* default to the range table from the boardinfo */
 915        s->range_table = board->ai_range_type;
 916
 917        /* now check the user config option based on the boardtype */
 918        if (board->is_818) {
 919                if (it->options[4] == 1 || it->options[4] == 10) {
 920                        /* secondary range list jumper selectable */
 921                        s->range_table = &range_pcl818l_h_ai;
 922                }
 923        } else {
 924                switch (it->options[4]) {
 925                case 0:
 926                        s->range_table = &range_bipolar10;
 927                        break;
 928                case 1:
 929                        s->range_table = &range_bipolar5;
 930                        break;
 931                case 2:
 932                        s->range_table = &range_bipolar2_5;
 933                        break;
 934                case 3:
 935                        s->range_table = &range718_bipolar1;
 936                        break;
 937                case 4:
 938                        s->range_table = &range718_bipolar0_5;
 939                        break;
 940                case 6:
 941                        s->range_table = &range_unipolar10;
 942                        break;
 943                case 7:
 944                        s->range_table = &range_unipolar5;
 945                        break;
 946                case 8:
 947                        s->range_table = &range718_unipolar2;
 948                        break;
 949                case 9:
 950                        s->range_table = &range718_unipolar1;
 951                        break;
 952                default:
 953                        s->range_table = &range_unknown;
 954                        break;
 955                }
 956        }
 957}
 958
 959static void pcl818_alloc_dma(struct comedi_device *dev, unsigned int dma_chan)
 960{
 961        struct pcl818_private *devpriv = dev->private;
 962
 963        /* only DMA channels 3 and 1 are valid */
 964        if (!(dma_chan == 3 || dma_chan == 1))
 965                return;
 966
 967        /* DMA uses two 16K buffers */
 968        devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan, dma_chan,
 969                                           PAGE_SIZE * 4, COMEDI_ISADMA_READ);
 970}
 971
 972static void pcl818_free_dma(struct comedi_device *dev)
 973{
 974        struct pcl818_private *devpriv = dev->private;
 975
 976        if (devpriv)
 977                comedi_isadma_free(devpriv->dma);
 978}
 979
 980static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 981{
 982        const struct pcl818_board *board = dev->board_ptr;
 983        struct pcl818_private *devpriv;
 984        struct comedi_subdevice *s;
 985        unsigned int osc_base;
 986        int ret;
 987
 988        devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
 989        if (!devpriv)
 990                return -ENOMEM;
 991
 992        ret = comedi_request_region(dev, it->options[0],
 993                                    board->has_fifo ? 0x20 : 0x10);
 994        if (ret)
 995                return ret;
 996
 997        /* we can use IRQ 2-7 for async command support */
 998        if (it->options[1] >= 2 && it->options[1] <= 7) {
 999                ret = request_irq(it->options[1], pcl818_interrupt, 0,
1000                                  dev->board_name, dev);
1001                if (ret == 0)
1002                        dev->irq = it->options[1];
1003        }
1004
1005        /* should we use the FIFO? */
1006        if (dev->irq && board->has_fifo && it->options[2] == -1)
1007                devpriv->usefifo = 1;
1008
1009        /* we need an IRQ to do DMA on channel 3 or 1 */
1010        if (dev->irq && board->has_dma)
1011                pcl818_alloc_dma(dev, it->options[2]);
1012
1013        /* use 1MHz or 10MHz oscilator */
1014        if ((it->options[3] == 0) || (it->options[3] == 10))
1015                osc_base = I8254_OSC_BASE_10MHZ;
1016        else
1017                osc_base = I8254_OSC_BASE_1MHZ;
1018
1019        dev->pacer = comedi_8254_init(dev->iobase + PCL818_TIMER_BASE,
1020                                      osc_base, I8254_IO8, 0);
1021        if (!dev->pacer)
1022                return -ENOMEM;
1023
1024        /* max sampling speed */
1025        devpriv->ns_min = board->ns_min;
1026        if (!board->is_818) {
1027                /* extended PCL718 to 100kHz DAC */
1028                if ((it->options[6] == 1) || (it->options[6] == 100))
1029                        devpriv->ns_min = 10000;
1030        }
1031
1032        ret = comedi_alloc_subdevices(dev, 4);
1033        if (ret)
1034                return ret;
1035
1036        s = &dev->subdevices[0];
1037        s->type         = COMEDI_SUBD_AI;
1038        s->subdev_flags = SDF_READABLE;
1039        if (check_single_ended(dev->iobase)) {
1040                s->n_chan       = 16;
1041                s->subdev_flags |= SDF_COMMON | SDF_GROUND;
1042        } else {
1043                s->n_chan       = 8;
1044                s->subdev_flags |= SDF_DIFF;
1045        }
1046        s->maxdata      = 0x0fff;
1047
1048        pcl818_set_ai_range_table(dev, s, it);
1049
1050        s->insn_read    = pcl818_ai_insn_read;
1051        if (dev->irq) {
1052                dev->read_subdev = s;
1053                s->subdev_flags |= SDF_CMD_READ;
1054                s->len_chanlist = s->n_chan;
1055                s->do_cmdtest   = ai_cmdtest;
1056                s->do_cmd       = pcl818_ai_cmd;
1057                s->cancel       = pcl818_ai_cancel;
1058        }
1059
1060        /* Analog Output subdevice */
1061        s = &dev->subdevices[1];
1062        if (board->n_aochan) {
1063                s->type         = COMEDI_SUBD_AO;
1064                s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
1065                s->n_chan       = board->n_aochan;
1066                s->maxdata      = 0x0fff;
1067                s->range_table  = &range_unipolar5;
1068                if (board->is_818) {
1069                        if ((it->options[4] == 1) || (it->options[4] == 10))
1070                                s->range_table = &range_unipolar10;
1071                        if (it->options[4] == 2)
1072                                s->range_table = &range_unknown;
1073                } else {
1074                        if ((it->options[5] == 1) || (it->options[5] == 10))
1075                                s->range_table = &range_unipolar10;
1076                        if (it->options[5] == 2)
1077                                s->range_table = &range_unknown;
1078                }
1079                s->insn_write   = pcl818_ao_insn_write;
1080
1081                ret = comedi_alloc_subdev_readback(s);
1082                if (ret)
1083                        return ret;
1084        } else {
1085                s->type         = COMEDI_SUBD_UNUSED;
1086        }
1087
1088        /* Digital Input subdevice */
1089        s = &dev->subdevices[2];
1090        s->type         = COMEDI_SUBD_DI;
1091        s->subdev_flags = SDF_READABLE;
1092        s->n_chan       = 16;
1093        s->maxdata      = 1;
1094        s->range_table  = &range_digital;
1095        s->insn_bits    = pcl818_di_insn_bits;
1096
1097        /* Digital Output subdevice */
1098        s = &dev->subdevices[3];
1099        s->type         = COMEDI_SUBD_DO;
1100        s->subdev_flags = SDF_WRITABLE;
1101        s->n_chan       = 16;
1102        s->maxdata      = 1;
1103        s->range_table  = &range_digital;
1104        s->insn_bits    = pcl818_do_insn_bits;
1105
1106        pcl818_reset(dev);
1107
1108        return 0;
1109}
1110
1111static void pcl818_detach(struct comedi_device *dev)
1112{
1113        struct pcl818_private *devpriv = dev->private;
1114
1115        if (devpriv) {
1116                pcl818_ai_cancel(dev, dev->read_subdev);
1117                pcl818_reset(dev);
1118        }
1119        pcl818_free_dma(dev);
1120        comedi_legacy_detach(dev);
1121}
1122
1123static struct comedi_driver pcl818_driver = {
1124        .driver_name    = "pcl818",
1125        .module         = THIS_MODULE,
1126        .attach         = pcl818_attach,
1127        .detach         = pcl818_detach,
1128        .board_name     = &boardtypes[0].name,
1129        .num_names      = ARRAY_SIZE(boardtypes),
1130        .offset         = sizeof(struct pcl818_board),
1131};
1132module_comedi_driver(pcl818_driver);
1133
1134MODULE_AUTHOR("Comedi http://www.comedi.org");
1135MODULE_DESCRIPTION("Comedi low-level driver");
1136MODULE_LICENSE("GPL");
1137