LXR linux/drivers/staging/i4l/pcbit/pcbit.h

   1/*
   2 * PCBIT-D device driver definitions
   3 *
   4 * Copyright (C) 1996 Universidade de Lisboa
   5 *
   6 * Written by Pedro Roque Marques (roque@di.fc.ul.pt)
   7 *
   8 * This software may be used and distributed according to the terms of
   9 * the GNU General Public License, incorporated herein by reference.
  10 */
  11
  12#ifndef PCBIT_H
  13#define PCBIT_H
  14
  15#include <linux/workqueue.h>
  16
  17#define MAX_PCBIT_CARDS 4
  18
  19
  20#define BLOCK_TIMER
  21
  22#ifdef __KERNEL__
  23
  24struct pcbit_chan {
  25        unsigned short id;
  26        unsigned short callref;                   /* Call Reference */
  27        unsigned char  proto;                     /* layer2protocol  */
  28        unsigned char  queued;                    /* unacked data messages */
  29        unsigned char  layer2link;                /* used in TData */
  30        unsigned char  snum;                      /* used in TData */
  31        unsigned short s_refnum;
  32        unsigned short r_refnum;
  33        unsigned short fsm_state;
  34        struct timer_list fsm_timer;
  35#ifdef BLOCK_TIMER
  36        struct timer_list block_timer;
  37#endif
  38};
  39
  40struct msn_entry {
  41        char *msn;
  42        struct msn_entry *next;
  43};
  44
  45struct pcbit_dev {
  46        /* board */
  47
  48        volatile unsigned char __iomem *sh_mem;         /* RDP address  */
  49        unsigned long ph_mem;
  50        unsigned int irq;
  51        unsigned int id;
  52        unsigned int interrupt;                 /* set during interrupt
  53                                                   processing */
  54        spinlock_t lock;
  55        /* isdn4linux */
  56
  57        struct msn_entry *msn_list;             /* ISDN address list */
  58
  59        isdn_if *dev_if;
  60
  61        ushort ll_hdrlen;
  62        ushort hl_hdrlen;
  63
  64        /* link layer */
  65        unsigned char l2_state;
  66
  67        struct frame_buf *read_queue;
  68        struct frame_buf *read_frame;
  69        struct frame_buf *write_queue;
  70
  71        /* Protocol start */
  72        wait_queue_head_t set_running_wq;
  73        struct timer_list set_running_timer;
  74
  75        struct timer_list error_recover_timer;
  76
  77        struct work_struct qdelivery;
  78
  79        u_char w_busy;
  80        u_char r_busy;
  81
  82        volatile unsigned char __iomem *readptr;
  83        volatile unsigned char __iomem *writeptr;
  84
  85        ushort loadptr;
  86
  87        unsigned short fsize[8];                /* sent layer2 frames size */
  88
  89        unsigned char send_seq;
  90        unsigned char rcv_seq;
  91        unsigned char unack_seq;
  92
  93        unsigned short free;
  94
  95        /* channels */
  96
  97        struct pcbit_chan *b1;
  98        struct pcbit_chan *b2;
  99};
 100
 101#define STATS_TIMER (10 * HZ)
 102#define ERRTIME     (HZ / 10)
 103
 104/* MRU */
 105#define MAXBUFSIZE  1534
 106#define MRU   MAXBUFSIZE
 107
 108#define STATBUF_LEN 2048
 109/*
 110 *
 111 */
 112
 113#endif /* __KERNEL__ */
 114
 115/* isdn_ctrl only allows a long sized argument */
 116
 117struct pcbit_ioctl {
 118        union {
 119                struct byte_op {
 120                        ushort addr;
 121                        ushort value;
 122                } rdp_byte;
 123                unsigned long l2_status;
 124        } info;
 125};
 126
 127
 128
 129#define PCBIT_IOCTL_GETSTAT  0x01    /* layer2 status */
 130#define PCBIT_IOCTL_LWMODE   0x02    /* linear write mode */
 131#define PCBIT_IOCTL_STRLOAD  0x03    /* start load mode */
 132#define PCBIT_IOCTL_ENDLOAD  0x04    /* end load mode */
 133#define PCBIT_IOCTL_SETBYTE  0x05    /* set byte */
 134#define PCBIT_IOCTL_GETBYTE  0x06    /* get byte */
 135#define PCBIT_IOCTL_RUNNING  0x07    /* set protocol running */
 136#define PCBIT_IOCTL_WATCH188 0x08    /* set watch 188 */
 137#define PCBIT_IOCTL_PING188  0x09    /* ping 188 */
 138#define PCBIT_IOCTL_FWMODE   0x0A    /* firmware write mode */
 139#define PCBIT_IOCTL_STOP     0x0B    /* stop protocol */
 140#define PCBIT_IOCTL_APION    0x0C    /* issue API_ON  */
 141
 142#ifndef __KERNEL__
 143
 144#define PCBIT_GETSTAT  (PCBIT_IOCTL_GETSTAT  + IIOCDRVCTL)
 145#define PCBIT_LWMODE   (PCBIT_IOCTL_LWMODE   + IIOCDRVCTL)
 146#define PCBIT_STRLOAD  (PCBIT_IOCTL_STRLOAD  + IIOCDRVCTL)
 147#define PCBIT_ENDLOAD  (PCBIT_IOCTL_ENDLOAD  + IIOCDRVCTL)
 148#define PCBIT_SETBYTE  (PCBIT_IOCTL_SETBYTE  + IIOCDRVCTL)
 149#define PCBIT_GETBYTE  (PCBIT_IOCTL_GETBYTE  + IIOCDRVCTL)
 150#define PCBIT_RUNNING  (PCBIT_IOCTL_RUNNING  + IIOCDRVCTL)
 151#define PCBIT_WATCH188 (PCBIT_IOCTL_WATCH188 + IIOCDRVCTL)
 152#define PCBIT_PING188  (PCBIT_IOCTL_PING188  + IIOCDRVCTL)
 153#define PCBIT_FWMODE   (PCBIT_IOCTL_FWMODE   + IIOCDRVCTL)
 154#define PCBIT_STOP     (PCBIT_IOCTL_STOP     + IIOCDRVCTL)
 155#define PCBIT_APION    (PCBIT_IOCTL_APION    + IIOCDRVCTL)
 156
 157#define MAXSUPERLINE 3000
 158
 159#endif
 160
 161#define L2_DOWN     0
 162#define L2_LOADING  1
 163#define L2_LWMODE   2
 164#define L2_FWMODE   3
 165#define L2_STARTING 4
 166#define L2_RUNNING  5
 167#define L2_ERROR    6
 168
 169void pcbit_deliver(struct work_struct *work);
 170int pcbit_init_dev(int board, int mem_base, int irq);
 171void pcbit_terminate(int board);
 172void pcbit_l3_receive(struct pcbit_dev *dev, ulong msg, struct sk_buff *skb,
 173                      ushort hdr_len, ushort refnum);
 174void pcbit_state_change(struct pcbit_dev *dev, struct pcbit_chan *chan,
 175                        unsigned short i, unsigned short ev, unsigned short f);
 176
 177#endif
 178