1/* 2 * Copyright(c) 2015, 2016 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47/* QSFP support common definitions, for hfi driver */ 48 49#define QSFP_DEV 0xA0 50#define QSFP_PWR_LAG_MSEC 2000 51#define QSFP_MODPRS_LAG_MSEC 20 52/* 128 byte pages, per SFF 8636 rev 2.4 */ 53#define QSFP_MAX_NUM_PAGES 5 54 55/* 56 * Below are masks for QSFP pins. Pins are the same for HFI0 and HFI1. 57 * _N means asserted low 58 */ 59#define QSFP_HFI0_I2CCLK BIT(0) 60#define QSFP_HFI0_I2CDAT BIT(1) 61#define QSFP_HFI0_RESET_N BIT(2) 62#define QSFP_HFI0_INT_N BIT(3) 63#define QSFP_HFI0_MODPRST_N BIT(4) 64 65/* QSFP is paged at 256 bytes */ 66#define QSFP_PAGESIZE 256 67/* Reads/writes cannot cross 128 byte boundaries */ 68#define QSFP_RW_BOUNDARY 128 69 70/* number of bytes in i2c offset for QSFP devices */ 71#define __QSFP_OFFSET_SIZE 1 /* num address bytes */ 72#define QSFP_OFFSET_SIZE (__QSFP_OFFSET_SIZE << 8) /* shifted value */ 73 74/* Defined fields that Intel requires of qualified cables */ 75/* Byte 0 is Identifier, not checked */ 76/* Byte 1 is reserved "status MSB" */ 77#define QSFP_TX_CTRL_BYTE_OFFS 86 78#define QSFP_PWR_CTRL_BYTE_OFFS 93 79#define QSFP_CDR_CTRL_BYTE_OFFS 98 80 81#define QSFP_PAGE_SELECT_BYTE_OFFS 127 82/* Byte 128 is Identifier: must be 0x0c for QSFP, or 0x0d for QSFP+ */ 83#define QSFP_MOD_ID_OFFS 128 84/* 85 * Byte 129 is "Extended Identifier". We only care about D7,D6: Power class 86 * 0:1.5W, 1:2.0W, 2:2.5W, 3:3.5W 87 */ 88#define QSFP_MOD_PWR_OFFS 129 89/* Byte 130 is Connector type. Not Intel req'd */ 90/* Bytes 131..138 are Transceiver types, bit maps for various tech, none IB */ 91/* Byte 139 is encoding. code 0x01 is 8b10b. Not Intel req'd */ 92/* byte 140 is nominal bit-rate, in units of 100Mbits/sec */ 93#define QSFP_NOM_BIT_RATE_100_OFFS 140 94/* Byte 141 is Extended Rate Select. Not Intel req'd */ 95/* Bytes 142..145 are lengths for various fiber types. Not Intel req'd */ 96/* Byte 146 is length for Copper. Units of 1 meter */ 97#define QSFP_MOD_LEN_OFFS 146 98/* 99 * Byte 147 is Device technology. D0..3 not Intel req'd 100 * D4..7 select from 15 choices, translated by table: 101 */ 102#define QSFP_MOD_TECH_OFFS 147 103extern const char *const hfi1_qsfp_devtech[16]; 104/* Active Equalization includes fiber, copper full EQ, and copper near Eq */ 105#define QSFP_IS_ACTIVE(tech) ((0xA2FF >> ((tech) >> 4)) & 1) 106/* Active Equalization includes fiber, copper full EQ, and copper far Eq */ 107#define QSFP_IS_ACTIVE_FAR(tech) ((0x32FF >> ((tech) >> 4)) & 1) 108/* Attenuation should be valid for copper other than full/near Eq */ 109#define QSFP_HAS_ATTEN(tech) ((0x4D00 >> ((tech) >> 4)) & 1) 110/* Length is only valid if technology is "copper" */ 111#define QSFP_IS_CU(tech) ((0xED00 >> ((tech) >> 4)) & 1) 112#define QSFP_TECH_1490 9 113 114#define QSFP_OUI(oui) (((unsigned)oui[0] << 16) | ((unsigned)oui[1] << 8) | \ 115 oui[2]) 116#define QSFP_OUI_AMPHENOL 0x415048 117#define QSFP_OUI_FINISAR 0x009065 118#define QSFP_OUI_GORE 0x002177 119 120/* Bytes 148..163 are Vendor Name, Left-justified Blank-filled */ 121#define QSFP_VEND_OFFS 148 122#define QSFP_VEND_LEN 16 123/* Byte 164 is IB Extended transceiver codes Bits D0..3 are SDR,DDR,QDR,EDR */ 124#define QSFP_IBXCV_OFFS 164 125/* Bytes 165..167 are Vendor OUI number */ 126#define QSFP_VOUI_OFFS 165 127#define QSFP_VOUI_LEN 3 128/* Bytes 168..183 are Vendor Part Number, string */ 129#define QSFP_PN_OFFS 168 130#define QSFP_PN_LEN 16 131/* Bytes 184,185 are Vendor Rev. Left Justified, Blank-filled */ 132#define QSFP_REV_OFFS 184 133#define QSFP_REV_LEN 2 134/* 135 * Bytes 186,187 are Wavelength, if Optical. Not Intel req'd 136 * If copper, they are attenuation in dB: 137 * Byte 186 is at 2.5Gb/sec (SDR), Byte 187 at 5.0Gb/sec (DDR) 138 */ 139#define QSFP_ATTEN_OFFS 186 140#define QSFP_ATTEN_LEN 2 141/* 142 * Bytes 188,189 are Wavelength tolerance, if optical 143 * If copper, they are attenuation in dB: 144 * Byte 188 is at 12.5 Gb/s, Byte 189 at 25 Gb/s 145 */ 146#define QSFP_CU_ATTEN_7G_OFFS 188 147#define QSFP_CU_ATTEN_12G_OFFS 189 148/* Byte 190 is Max Case Temp. Not Intel req'd */ 149/* Byte 191 is LSB of sum of bytes 128..190. Not Intel req'd */ 150#define QSFP_CC_OFFS 191 151#define QSFP_EQ_INFO_OFFS 193 152#define QSFP_CDR_INFO_OFFS 194 153/* Bytes 196..211 are Serial Number, String */ 154#define QSFP_SN_OFFS 196 155#define QSFP_SN_LEN 16 156/* Bytes 212..219 are date-code YYMMDD (MM==1 for Jan) */ 157#define QSFP_DATE_OFFS 212 158#define QSFP_DATE_LEN 6 159/* Bytes 218,219 are optional lot-code, string */ 160#define QSFP_LOT_OFFS 218 161#define QSFP_LOT_LEN 2 162/* Bytes 220, 221 indicate monitoring options, Not Intel req'd */ 163/* Byte 222 indicates nominal bitrate in units of 250Mbits/sec */ 164#define QSFP_NOM_BIT_RATE_250_OFFS 222 165/* Byte 223 is LSB of sum of bytes 192..222 */ 166#define QSFP_CC_EXT_OFFS 223 167 168/* 169 * Interrupt flag masks 170 */ 171#define QSFP_DATA_NOT_READY 0x01 172 173#define QSFP_HIGH_TEMP_ALARM 0x80 174#define QSFP_LOW_TEMP_ALARM 0x40 175#define QSFP_HIGH_TEMP_WARNING 0x20 176#define QSFP_LOW_TEMP_WARNING 0x10 177 178#define QSFP_HIGH_VCC_ALARM 0x80 179#define QSFP_LOW_VCC_ALARM 0x40 180#define QSFP_HIGH_VCC_WARNING 0x20 181#define QSFP_LOW_VCC_WARNING 0x10 182 183#define QSFP_HIGH_POWER_ALARM 0x88 184#define QSFP_LOW_POWER_ALARM 0x44 185#define QSFP_HIGH_POWER_WARNING 0x22 186#define QSFP_LOW_POWER_WARNING 0x11 187 188#define QSFP_HIGH_BIAS_ALARM 0x88 189#define QSFP_LOW_BIAS_ALARM 0x44 190#define QSFP_HIGH_BIAS_WARNING 0x22 191#define QSFP_LOW_BIAS_WARNING 0x11 192 193/* 194 * struct qsfp_data encapsulates state of QSFP device for one port. 195 * it will be part of port-specific data if a board supports QSFP. 196 * 197 * Since multiple board-types use QSFP, and their pport_data structs 198 * differ (in the chip-specific section), we need a pointer to its head. 199 * 200 * Avoiding premature optimization, we will have one work_struct per port, 201 * and let the qsfp_lock arbitrate access to common resources. 202 * 203 */ 204 205#define QSFP_PWR(pbyte) (((pbyte) >> 6) & 3) 206#define QSFP_HIGH_PWR(pbyte) (((pbyte) & 3) | 4) 207#define QSFP_ATTEN_SDR(attenarray) (attenarray[0]) 208#define QSFP_ATTEN_DDR(attenarray) (attenarray[1]) 209 210struct qsfp_data { 211 /* Helps to find our way */ 212 struct hfi1_pportdata *ppd; 213 struct work_struct qsfp_work; 214 u8 cache[QSFP_MAX_NUM_PAGES * 128]; 215 /* protect qsfp data */ 216 spinlock_t qsfp_lock; 217 u8 check_interrupt_flags; 218 u8 reset_needed; 219 u8 limiting_active; 220 u8 cache_valid; 221 u8 cache_refresh_required; 222}; 223 224int refresh_qsfp_cache(struct hfi1_pportdata *ppd, 225 struct qsfp_data *cp); 226int qsfp_mod_present(struct hfi1_pportdata *ppd); 227int get_cable_info(struct hfi1_devdata *dd, u32 port_num, u32 addr, 228 u32 len, u8 *data); 229 230int i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, 231 int offset, void *bp, int len); 232int i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, 233 int offset, void *bp, int len); 234int qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, 235 int len); 236int qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, 237 int len); 238int one_qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, 239 int len); 240int one_qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, 241 int len); 242