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11#include <linux/kernel.h>
12#include <linux/platform_device.h>
13#include <linux/dma-mapping.h>
14#include <linux/interrupt.h>
15#include <linux/clk.h>
16#include <linux/fb.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/backlight.h>
20#include <linux/gfp.h>
21#include <linux/module.h>
22#include <linux/of.h>
23#include <linux/of_device.h>
24#include <linux/of_gpio.h>
25#include <video/of_display_timing.h>
26#include <linux/regulator/consumer.h>
27#include <video/videomode.h>
28
29#include <video/atmel_lcdc.h>
30
31struct atmel_lcdfb_config {
32 bool have_alt_pixclock;
33 bool have_hozval;
34 bool have_intensity_bit;
35};
36
37
38struct atmel_lcdfb_info {
39 spinlock_t lock;
40 struct fb_info *info;
41 void __iomem *mmio;
42 int irq_base;
43 struct work_struct task;
44
45 unsigned int smem_len;
46 struct platform_device *pdev;
47 struct clk *bus_clk;
48 struct clk *lcdc_clk;
49
50 struct backlight_device *backlight;
51 u8 bl_power;
52 u8 saved_lcdcon;
53
54 u32 pseudo_palette[16];
55 bool have_intensity_bit;
56
57 struct atmel_lcdfb_pdata pdata;
58
59 struct atmel_lcdfb_config *config;
60 struct regulator *reg_lcd;
61};
62
63struct atmel_lcdfb_power_ctrl_gpio {
64 int gpio;
65 int active_low;
66
67 struct list_head list;
68};
69
70#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
71#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
72
73
74#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
75#define ATMEL_LCDC_DMA_BURST_LEN 8
76#define ATMEL_LCDC_FIFO_SIZE 512
77
78static struct atmel_lcdfb_config at91sam9261_config = {
79 .have_hozval = true,
80 .have_intensity_bit = true,
81};
82
83static struct atmel_lcdfb_config at91sam9263_config = {
84 .have_intensity_bit = true,
85};
86
87static struct atmel_lcdfb_config at91sam9g10_config = {
88 .have_hozval = true,
89};
90
91static struct atmel_lcdfb_config at91sam9g45_config = {
92 .have_alt_pixclock = true,
93};
94
95static struct atmel_lcdfb_config at91sam9g45es_config = {
96};
97
98static struct atmel_lcdfb_config at91sam9rl_config = {
99 .have_intensity_bit = true,
100};
101
102static struct atmel_lcdfb_config at32ap_config = {
103 .have_hozval = true,
104};
105
106static const struct platform_device_id atmel_lcdfb_devtypes[] = {
107 {
108 .name = "at91sam9261-lcdfb",
109 .driver_data = (unsigned long)&at91sam9261_config,
110 }, {
111 .name = "at91sam9263-lcdfb",
112 .driver_data = (unsigned long)&at91sam9263_config,
113 }, {
114 .name = "at91sam9g10-lcdfb",
115 .driver_data = (unsigned long)&at91sam9g10_config,
116 }, {
117 .name = "at91sam9g45-lcdfb",
118 .driver_data = (unsigned long)&at91sam9g45_config,
119 }, {
120 .name = "at91sam9g45es-lcdfb",
121 .driver_data = (unsigned long)&at91sam9g45es_config,
122 }, {
123 .name = "at91sam9rl-lcdfb",
124 .driver_data = (unsigned long)&at91sam9rl_config,
125 }, {
126 .name = "at32ap-lcdfb",
127 .driver_data = (unsigned long)&at32ap_config,
128 }, {
129
130 }
131};
132MODULE_DEVICE_TABLE(platform, atmel_lcdfb_devtypes);
133
134static struct atmel_lcdfb_config *
135atmel_lcdfb_get_config(struct platform_device *pdev)
136{
137 unsigned long data;
138
139 data = platform_get_device_id(pdev)->driver_data;
140
141 return (struct atmel_lcdfb_config *)data;
142}
143
144#if defined(CONFIG_ARCH_AT91)
145#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
146 | FBINFO_PARTIAL_PAN_OK \
147 | FBINFO_HWACCEL_YPAN)
148
149static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
150 struct fb_var_screeninfo *var,
151 struct fb_info *info)
152{
153
154}
155#elif defined(CONFIG_AVR32)
156#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
157 | FBINFO_PARTIAL_PAN_OK \
158 | FBINFO_HWACCEL_XPAN \
159 | FBINFO_HWACCEL_YPAN)
160
161static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
162 struct fb_var_screeninfo *var,
163 struct fb_info *info)
164{
165 u32 dma2dcfg;
166 u32 pixeloff;
167
168 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
169
170 dma2dcfg = (info->var.xres_virtual - info->var.xres)
171 * info->var.bits_per_pixel / 8;
172 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
173 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
174
175
176 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
177 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
178 | ATMEL_LCDC_DMAUPDT);
179}
180#endif
181
182static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
183 | ATMEL_LCDC_POL_POSITIVE
184 | ATMEL_LCDC_ENA_PWMENABLE;
185
186#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
187
188
189static int atmel_bl_update_status(struct backlight_device *bl)
190{
191 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
192 int power = sinfo->bl_power;
193 int brightness = bl->props.brightness;
194
195
196
197
198
199 if (bl->props.fb_blank != sinfo->bl_power)
200 power = bl->props.fb_blank;
201 else if (bl->props.power != sinfo->bl_power)
202 power = bl->props.power;
203
204 if (brightness < 0 && power == FB_BLANK_UNBLANK)
205 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
206 else if (power != FB_BLANK_UNBLANK)
207 brightness = 0;
208
209 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
210 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
211 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
212 brightness ? contrast_ctr : 0);
213 else
214 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
215
216 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
217
218 return 0;
219}
220
221static int atmel_bl_get_brightness(struct backlight_device *bl)
222{
223 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
224
225 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
226}
227
228static const struct backlight_ops atmel_lcdc_bl_ops = {
229 .update_status = atmel_bl_update_status,
230 .get_brightness = atmel_bl_get_brightness,
231};
232
233static void init_backlight(struct atmel_lcdfb_info *sinfo)
234{
235 struct backlight_properties props;
236 struct backlight_device *bl;
237
238 sinfo->bl_power = FB_BLANK_UNBLANK;
239
240 if (sinfo->backlight)
241 return;
242
243 memset(&props, 0, sizeof(struct backlight_properties));
244 props.type = BACKLIGHT_RAW;
245 props.max_brightness = 0xff;
246 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
247 &atmel_lcdc_bl_ops, &props);
248 if (IS_ERR(bl)) {
249 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
250 PTR_ERR(bl));
251 return;
252 }
253 sinfo->backlight = bl;
254
255 bl->props.power = FB_BLANK_UNBLANK;
256 bl->props.fb_blank = FB_BLANK_UNBLANK;
257 bl->props.brightness = atmel_bl_get_brightness(bl);
258}
259
260static void exit_backlight(struct atmel_lcdfb_info *sinfo)
261{
262 if (!sinfo->backlight)
263 return;
264
265 if (sinfo->backlight->ops) {
266 sinfo->backlight->props.power = FB_BLANK_POWERDOWN;
267 sinfo->backlight->ops->update_status(sinfo->backlight);
268 }
269 backlight_device_unregister(sinfo->backlight);
270}
271
272#else
273
274static void init_backlight(struct atmel_lcdfb_info *sinfo)
275{
276 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
277}
278
279static void exit_backlight(struct atmel_lcdfb_info *sinfo)
280{
281}
282
283#endif
284
285static void init_contrast(struct atmel_lcdfb_info *sinfo)
286{
287 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
288
289
290 if (pdata->lcdcon_pol_negative)
291 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
292
293
294 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
295 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
296
297 if (pdata->lcdcon_is_backlight)
298 init_backlight(sinfo);
299}
300
301static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)
302{
303 int ret;
304 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
305
306 if (pdata->atmel_lcdfb_power_control)
307 pdata->atmel_lcdfb_power_control(pdata, on);
308 else if (sinfo->reg_lcd) {
309 if (on) {
310 ret = regulator_enable(sinfo->reg_lcd);
311 if (ret)
312 dev_err(&sinfo->pdev->dev,
313 "lcd regulator enable failed: %d\n", ret);
314 } else {
315 ret = regulator_disable(sinfo->reg_lcd);
316 if (ret)
317 dev_err(&sinfo->pdev->dev,
318 "lcd regulator disable failed: %d\n", ret);
319 }
320 }
321}
322
323static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
324 .type = FB_TYPE_PACKED_PIXELS,
325 .visual = FB_VISUAL_TRUECOLOR,
326 .xpanstep = 0,
327 .ypanstep = 1,
328 .ywrapstep = 0,
329 .accel = FB_ACCEL_NONE,
330};
331
332static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
333 unsigned long xres)
334{
335 unsigned long lcdcon2;
336 unsigned long value;
337
338 if (!sinfo->config->have_hozval)
339 return xres;
340
341 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
342 value = xres;
343 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
344
345 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
346 value *= 3;
347 }
348 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
349 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
350 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
351 value = DIV_ROUND_UP(value, 4);
352 else
353 value = DIV_ROUND_UP(value, 8);
354 }
355
356 return value;
357}
358
359static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
360{
361 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
362
363
364 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
365 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
366
367
368 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
369 msleep(10);
370
371 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
372}
373
374static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
375{
376 atmel_lcdfb_stop_nowait(sinfo);
377
378
379 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
380 msleep(10);
381}
382
383static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
384{
385 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
386
387 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);
388 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
389 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
390 | ATMEL_LCDC_PWR);
391}
392
393static void atmel_lcdfb_update_dma(struct fb_info *info,
394 struct fb_var_screeninfo *var)
395{
396 struct atmel_lcdfb_info *sinfo = info->par;
397 struct fb_fix_screeninfo *fix = &info->fix;
398 unsigned long dma_addr;
399
400 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
401 + var->xoffset * info->var.bits_per_pixel / 8);
402
403 dma_addr &= ~3UL;
404
405
406 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
407
408 atmel_lcdfb_update_dma2d(sinfo, var, info);
409}
410
411static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
412{
413 struct fb_info *info = sinfo->info;
414
415 dma_free_wc(info->device, info->fix.smem_len, info->screen_base,
416 info->fix.smem_start);
417}
418
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425
426static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
427{
428 struct fb_info *info = sinfo->info;
429 struct fb_var_screeninfo *var = &info->var;
430 unsigned int smem_len;
431
432 smem_len = (var->xres_virtual * var->yres_virtual
433 * ((var->bits_per_pixel + 7) / 8));
434 info->fix.smem_len = max(smem_len, sinfo->smem_len);
435
436 info->screen_base = dma_alloc_wc(info->device, info->fix.smem_len,
437 (dma_addr_t *)&info->fix.smem_start,
438 GFP_KERNEL);
439
440 if (!info->screen_base) {
441 return -ENOMEM;
442 }
443
444 memset(info->screen_base, 0, info->fix.smem_len);
445
446 return 0;
447}
448
449static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
450 struct fb_info *info)
451{
452 struct fb_videomode varfbmode;
453 const struct fb_videomode *fbmode = NULL;
454
455 fb_var_to_videomode(&varfbmode, var);
456 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
457 if (fbmode)
458 fb_videomode_to_var(var, fbmode);
459 return fbmode;
460}
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486static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
487 struct fb_info *info)
488{
489 struct device *dev = info->device;
490 struct atmel_lcdfb_info *sinfo = info->par;
491 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
492 unsigned long clk_value_khz;
493
494 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
495
496 dev_dbg(dev, "%s:\n", __func__);
497
498 if (!(var->pixclock && var->bits_per_pixel)) {
499
500 if (!atmel_lcdfb_choose_mode(var, info)) {
501 dev_err(dev, "needed value not specified\n");
502 return -EINVAL;
503 }
504 }
505
506 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
507 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
508 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
509 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
510
511 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
512 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
513 return -EINVAL;
514 }
515
516
517 if (var->xres > var->xres_virtual)
518 var->xres_virtual = var->xres;
519
520 if (var->yres > var->yres_virtual)
521 var->yres_virtual = var->yres;
522
523
524 var->xres = (var->xres + 3) & ~3UL;
525 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
526
527 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
528 var->transp.msb_right = 0;
529 var->transp.offset = var->transp.length = 0;
530 var->xoffset = var->yoffset = 0;
531
532 if (info->fix.smem_len) {
533 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
534 * ((var->bits_per_pixel + 7) / 8));
535 if (smem_len > info->fix.smem_len) {
536 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
537 info->fix.smem_len, smem_len);
538 return -EINVAL;
539 }
540 }
541
542
543 var->vsync_len = min_t(u32, var->vsync_len,
544 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
545 var->upper_margin = min_t(u32, var->upper_margin,
546 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
547 var->lower_margin = min_t(u32, var->lower_margin,
548 ATMEL_LCDC_VFP);
549 var->right_margin = min_t(u32, var->right_margin,
550 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
551 var->hsync_len = min_t(u32, var->hsync_len,
552 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
553 var->left_margin = min_t(u32, var->left_margin,
554 ATMEL_LCDC_HBP + 1);
555
556
557 var->vsync_len = max_t(u32, var->vsync_len, 1);
558 var->right_margin = max_t(u32, var->right_margin, 1);
559 var->hsync_len = max_t(u32, var->hsync_len, 1);
560 var->left_margin = max_t(u32, var->left_margin, 1);
561
562 switch (var->bits_per_pixel) {
563 case 1:
564 case 2:
565 case 4:
566 case 8:
567 var->red.offset = var->green.offset = var->blue.offset = 0;
568 var->red.length = var->green.length = var->blue.length
569 = var->bits_per_pixel;
570 break;
571 case 16:
572
573 if (sinfo->config->have_intensity_bit)
574 var->green.length = 5;
575 else
576 var->green.length = 6;
577
578 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
579
580 var->red.offset = var->green.length + 5;
581 var->blue.offset = 0;
582 } else {
583
584 var->red.offset = 0;
585 var->blue.offset = var->green.length + 5;
586 }
587 var->green.offset = 5;
588 var->red.length = var->blue.length = 5;
589 break;
590 case 32:
591 var->transp.offset = 24;
592 var->transp.length = 8;
593
594 case 24:
595 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
596
597 var->red.offset = 16;
598 var->blue.offset = 0;
599 } else {
600
601 var->red.offset = 0;
602 var->blue.offset = 16;
603 }
604 var->green.offset = 8;
605 var->red.length = var->green.length = var->blue.length = 8;
606 break;
607 default:
608 dev_err(dev, "color depth %d not supported\n",
609 var->bits_per_pixel);
610 return -EINVAL;
611 }
612
613 return 0;
614}
615
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618
619static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
620{
621 might_sleep();
622
623 atmel_lcdfb_stop(sinfo);
624 atmel_lcdfb_start(sinfo);
625}
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641static int atmel_lcdfb_set_par(struct fb_info *info)
642{
643 struct atmel_lcdfb_info *sinfo = info->par;
644 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
645 unsigned long hozval_linesz;
646 unsigned long value;
647 unsigned long clk_value_khz;
648 unsigned long bits_per_line;
649 unsigned long pix_factor = 2;
650
651 might_sleep();
652
653 dev_dbg(info->device, "%s:\n", __func__);
654 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
655 info->var.xres, info->var.yres,
656 info->var.xres_virtual, info->var.yres_virtual);
657
658 atmel_lcdfb_stop_nowait(sinfo);
659
660 if (info->var.bits_per_pixel == 1)
661 info->fix.visual = FB_VISUAL_MONO01;
662 else if (info->var.bits_per_pixel <= 8)
663 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
664 else
665 info->fix.visual = FB_VISUAL_TRUECOLOR;
666
667 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
668 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
669
670
671 dev_dbg(info->device, " * update DMA engine\n");
672 atmel_lcdfb_update_dma(info, &info->var);
673
674
675 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
676 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
677 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
678
679
680
681
682 if (sinfo->config->have_alt_pixclock)
683 pix_factor = 1;
684
685 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
686
687 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
688
689 if (value < pix_factor) {
690 dev_notice(info->device, "Bypassing pixel clock divider\n");
691 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
692 } else {
693 value = (value / pix_factor) - 1;
694 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
695 value);
696 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
697 value << ATMEL_LCDC_CLKVAL_OFFSET);
698 info->var.pixclock =
699 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
700 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
701 PICOS2KHZ(info->var.pixclock));
702 }
703
704
705
706 value = pdata->default_lcdcon2;
707
708 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
709 value |= ATMEL_LCDC_INVLINE_INVERTED;
710 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
711 value |= ATMEL_LCDC_INVFRAME_INVERTED;
712
713 switch (info->var.bits_per_pixel) {
714 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
715 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
716 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
717 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
718 case 15:
719 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
720 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
721 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
722 default: BUG(); break;
723 }
724 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
725 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
726
727
728 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
729 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
730 value |= info->var.lower_margin;
731 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
732 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
733
734
735 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
736 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
737 value |= (info->var.left_margin - 1);
738 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
739 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
740
741
742 hozval_linesz = compute_hozval(sinfo, info->var.xres);
743
744
745 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
746 value |= info->var.yres - 1;
747 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
748 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
749
750
751 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
752 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
753
754
755 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
756
757
758 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
759
760 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
761
762
763 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
764 msleep(10);
765
766 atmel_lcdfb_start(sinfo);
767
768 dev_dbg(info->device, " * DONE\n");
769
770 return 0;
771}
772
773static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
774{
775 chan &= 0xffff;
776 chan >>= 16 - bf->length;
777 return chan << bf->offset;
778}
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
806 unsigned int green, unsigned int blue,
807 unsigned int transp, struct fb_info *info)
808{
809 struct atmel_lcdfb_info *sinfo = info->par;
810 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
811 unsigned int val;
812 u32 *pal;
813 int ret = 1;
814
815 if (info->var.grayscale)
816 red = green = blue = (19595 * red + 38470 * green
817 + 7471 * blue) >> 16;
818
819 switch (info->fix.visual) {
820 case FB_VISUAL_TRUECOLOR:
821 if (regno < 16) {
822 pal = info->pseudo_palette;
823
824 val = chan_to_field(red, &info->var.red);
825 val |= chan_to_field(green, &info->var.green);
826 val |= chan_to_field(blue, &info->var.blue);
827
828 pal[regno] = val;
829 ret = 0;
830 }
831 break;
832
833 case FB_VISUAL_PSEUDOCOLOR:
834 if (regno < 256) {
835 if (sinfo->config->have_intensity_bit) {
836
837 val = ((red >> 11) & 0x001f);
838 val |= ((green >> 6) & 0x03e0);
839 val |= ((blue >> 1) & 0x7c00);
840
841
842
843
844
845 } else {
846
847 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
848 val = ((blue >> 11) & 0x001f);
849 val |= ((red >> 0) & 0xf800);
850 } else {
851 val = ((red >> 11) & 0x001f);
852 val |= ((blue >> 0) & 0xf800);
853 }
854
855 val |= ((green >> 5) & 0x07e0);
856 }
857
858 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
859 ret = 0;
860 }
861 break;
862
863 case FB_VISUAL_MONO01:
864 if (regno < 2) {
865 val = (regno == 0) ? 0x00 : 0x1F;
866 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
867 ret = 0;
868 }
869 break;
870
871 }
872
873 return ret;
874}
875
876static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
877 struct fb_info *info)
878{
879 dev_dbg(info->device, "%s\n", __func__);
880
881 atmel_lcdfb_update_dma(info, var);
882
883 return 0;
884}
885
886static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
887{
888 struct atmel_lcdfb_info *sinfo = info->par;
889
890 switch (blank_mode) {
891 case FB_BLANK_UNBLANK:
892 case FB_BLANK_NORMAL:
893 atmel_lcdfb_start(sinfo);
894 break;
895 case FB_BLANK_VSYNC_SUSPEND:
896 case FB_BLANK_HSYNC_SUSPEND:
897 break;
898 case FB_BLANK_POWERDOWN:
899 atmel_lcdfb_stop(sinfo);
900 break;
901 default:
902 return -EINVAL;
903 }
904
905
906 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
907}
908
909static struct fb_ops atmel_lcdfb_ops = {
910 .owner = THIS_MODULE,
911 .fb_check_var = atmel_lcdfb_check_var,
912 .fb_set_par = atmel_lcdfb_set_par,
913 .fb_setcolreg = atmel_lcdfb_setcolreg,
914 .fb_blank = atmel_lcdfb_blank,
915 .fb_pan_display = atmel_lcdfb_pan_display,
916 .fb_fillrect = cfb_fillrect,
917 .fb_copyarea = cfb_copyarea,
918 .fb_imageblit = cfb_imageblit,
919};
920
921static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
922{
923 struct fb_info *info = dev_id;
924 struct atmel_lcdfb_info *sinfo = info->par;
925 u32 status;
926
927 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
928 if (status & ATMEL_LCDC_UFLWI) {
929 dev_warn(info->device, "FIFO underflow %#x\n", status);
930
931 schedule_work(&sinfo->task);
932 }
933 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
934 return IRQ_HANDLED;
935}
936
937
938
939
940static void atmel_lcdfb_task(struct work_struct *work)
941{
942 struct atmel_lcdfb_info *sinfo =
943 container_of(work, struct atmel_lcdfb_info, task);
944
945 atmel_lcdfb_reset(sinfo);
946}
947
948static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
949{
950 struct fb_info *info = sinfo->info;
951 int ret = 0;
952
953 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
954
955 dev_info(info->device,
956 "%luKiB frame buffer at %08lx (mapped at %p)\n",
957 (unsigned long)info->fix.smem_len / 1024,
958 (unsigned long)info->fix.smem_start,
959 info->screen_base);
960
961
962 ret = fb_alloc_cmap(&info->cmap, 256, 0);
963 if (ret < 0)
964 dev_err(info->device, "Alloc color map failed\n");
965
966 return ret;
967}
968
969static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
970{
971 clk_prepare_enable(sinfo->bus_clk);
972 clk_prepare_enable(sinfo->lcdc_clk);
973}
974
975static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
976{
977 clk_disable_unprepare(sinfo->bus_clk);
978 clk_disable_unprepare(sinfo->lcdc_clk);
979}
980
981#ifdef CONFIG_OF
982static const struct of_device_id atmel_lcdfb_dt_ids[] = {
983 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },
984 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },
985 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },
986 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },
987 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },
988 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },
989 { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, },
990 { }
991};
992
993MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids);
994
995static const char *atmel_lcdfb_wiring_modes[] = {
996 [ATMEL_LCDC_WIRING_BGR] = "BRG",
997 [ATMEL_LCDC_WIRING_RGB] = "RGB",
998};
999
1000static int atmel_lcdfb_get_of_wiring_modes(struct device_node *np)
1001{
1002 const char *mode;
1003 int err, i;
1004
1005 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode);
1006 if (err < 0)
1007 return ATMEL_LCDC_WIRING_BGR;
1008
1009 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++)
1010 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i]))
1011 return i;
1012
1013 return -ENODEV;
1014}
1015
1016static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on)
1017{
1018 struct atmel_lcdfb_power_ctrl_gpio *og;
1019
1020 list_for_each_entry(og, &pdata->pwr_gpios, list)
1021 gpio_set_value(og->gpio, on);
1022}
1023
1024static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
1025{
1026 struct fb_info *info = sinfo->info;
1027 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
1028 struct fb_var_screeninfo *var = &info->var;
1029 struct device *dev = &sinfo->pdev->dev;
1030 struct device_node *np =dev->of_node;
1031 struct device_node *display_np;
1032 struct device_node *timings_np;
1033 struct display_timings *timings;
1034 enum of_gpio_flags flags;
1035 struct atmel_lcdfb_power_ctrl_gpio *og;
1036 bool is_gpio_power = false;
1037 int ret = -ENOENT;
1038 int i, gpio;
1039
1040 sinfo->config = (struct atmel_lcdfb_config*)
1041 of_match_device(atmel_lcdfb_dt_ids, dev)->data;
1042
1043 display_np = of_parse_phandle(np, "display", 0);
1044 if (!display_np) {
1045 dev_err(dev, "failed to find display phandle\n");
1046 return -ENOENT;
1047 }
1048
1049 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel);
1050 if (ret < 0) {
1051 dev_err(dev, "failed to get property bits-per-pixel\n");
1052 goto put_display_node;
1053 }
1054
1055 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time);
1056 if (ret < 0) {
1057 dev_err(dev, "failed to get property atmel,guard-time\n");
1058 goto put_display_node;
1059 }
1060
1061 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2);
1062 if (ret < 0) {
1063 dev_err(dev, "failed to get property atmel,lcdcon2\n");
1064 goto put_display_node;
1065 }
1066
1067 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon);
1068 if (ret < 0) {
1069 dev_err(dev, "failed to get property bits-per-pixel\n");
1070 goto put_display_node;
1071 }
1072
1073 INIT_LIST_HEAD(&pdata->pwr_gpios);
1074 ret = -ENOMEM;
1075 for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) {
1076 gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio",
1077 i, &flags);
1078 if (gpio < 0)
1079 continue;
1080
1081 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);
1082 if (!og)
1083 goto put_display_node;
1084
1085 og->gpio = gpio;
1086 og->active_low = flags & OF_GPIO_ACTIVE_LOW;
1087 is_gpio_power = true;
1088 ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio");
1089 if (ret) {
1090 dev_err(dev, "request gpio %d failed\n", gpio);
1091 goto put_display_node;
1092 }
1093
1094 ret = gpio_direction_output(gpio, og->active_low);
1095 if (ret) {
1096 dev_err(dev, "set direction output gpio %d failed\n", gpio);
1097 goto put_display_node;
1098 }
1099 list_add(&og->list, &pdata->pwr_gpios);
1100 }
1101
1102 if (is_gpio_power)
1103 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio;
1104
1105 ret = atmel_lcdfb_get_of_wiring_modes(display_np);
1106 if (ret < 0) {
1107 dev_err(dev, "invalid atmel,lcd-wiring-mode\n");
1108 goto put_display_node;
1109 }
1110 pdata->lcd_wiring_mode = ret;
1111
1112 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight");
1113 pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted");
1114
1115 timings = of_get_display_timings(display_np);
1116 if (!timings) {
1117 dev_err(dev, "failed to get display timings\n");
1118 ret = -EINVAL;
1119 goto put_display_node;
1120 }
1121
1122 timings_np = of_find_node_by_name(display_np, "display-timings");
1123 if (!timings_np) {
1124 dev_err(dev, "failed to find display-timings node\n");
1125 ret = -ENODEV;
1126 goto put_display_node;
1127 }
1128
1129 for (i = 0; i < of_get_child_count(timings_np); i++) {
1130 struct videomode vm;
1131 struct fb_videomode fb_vm;
1132
1133 ret = videomode_from_timings(timings, &vm, i);
1134 if (ret < 0)
1135 goto put_timings_node;
1136 ret = fb_videomode_from_videomode(&vm, &fb_vm);
1137 if (ret < 0)
1138 goto put_timings_node;
1139
1140 fb_add_videomode(&fb_vm, &info->modelist);
1141 }
1142
1143 return 0;
1144
1145put_timings_node:
1146 of_node_put(timings_np);
1147put_display_node:
1148 of_node_put(display_np);
1149 return ret;
1150}
1151#else
1152static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
1153{
1154 return 0;
1155}
1156#endif
1157
1158static int __init atmel_lcdfb_probe(struct platform_device *pdev)
1159{
1160 struct device *dev = &pdev->dev;
1161 struct fb_info *info;
1162 struct atmel_lcdfb_info *sinfo;
1163 struct atmel_lcdfb_pdata *pdata = NULL;
1164 struct resource *regs = NULL;
1165 struct resource *map = NULL;
1166 struct fb_modelist *modelist;
1167 int ret;
1168
1169 dev_dbg(dev, "%s BEGIN\n", __func__);
1170
1171 ret = -ENOMEM;
1172 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
1173 if (!info) {
1174 dev_err(dev, "cannot allocate memory\n");
1175 goto out;
1176 }
1177
1178 sinfo = info->par;
1179 sinfo->pdev = pdev;
1180 sinfo->info = info;
1181
1182 INIT_LIST_HEAD(&info->modelist);
1183
1184 if (pdev->dev.of_node) {
1185 ret = atmel_lcdfb_of_init(sinfo);
1186 if (ret)
1187 goto free_info;
1188 } else if (dev_get_platdata(dev)) {
1189 struct fb_monspecs *monspecs;
1190 int i;
1191
1192 pdata = dev_get_platdata(dev);
1193 monspecs = pdata->default_monspecs;
1194 sinfo->pdata = *pdata;
1195
1196 for (i = 0; i < monspecs->modedb_len; i++)
1197 fb_add_videomode(&monspecs->modedb[i], &info->modelist);
1198
1199 sinfo->config = atmel_lcdfb_get_config(pdev);
1200
1201 info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
1202 memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs));
1203 } else {
1204 dev_err(dev, "cannot get default configuration\n");
1205 goto free_info;
1206 }
1207
1208 if (!sinfo->config)
1209 goto free_info;
1210
1211 sinfo->reg_lcd = devm_regulator_get(&pdev->dev, "lcd");
1212 if (IS_ERR(sinfo->reg_lcd))
1213 sinfo->reg_lcd = NULL;
1214
1215 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
1216 info->pseudo_palette = sinfo->pseudo_palette;
1217 info->fbops = &atmel_lcdfb_ops;
1218
1219 info->fix = atmel_lcdfb_fix;
1220 strcpy(info->fix.id, sinfo->pdev->name);
1221
1222
1223 sinfo->bus_clk = clk_get(dev, "hclk");
1224 if (IS_ERR(sinfo->bus_clk)) {
1225 ret = PTR_ERR(sinfo->bus_clk);
1226 goto free_info;
1227 }
1228 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
1229 if (IS_ERR(sinfo->lcdc_clk)) {
1230 ret = PTR_ERR(sinfo->lcdc_clk);
1231 goto put_bus_clk;
1232 }
1233 atmel_lcdfb_start_clock(sinfo);
1234
1235 modelist = list_first_entry(&info->modelist,
1236 struct fb_modelist, list);
1237 fb_videomode_to_var(&info->var, &modelist->mode);
1238
1239 atmel_lcdfb_check_var(&info->var, info);
1240
1241 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1242 if (!regs) {
1243 dev_err(dev, "resources unusable\n");
1244 ret = -ENXIO;
1245 goto stop_clk;
1246 }
1247
1248 sinfo->irq_base = platform_get_irq(pdev, 0);
1249 if (sinfo->irq_base < 0) {
1250 dev_err(dev, "unable to get irq\n");
1251 ret = sinfo->irq_base;
1252 goto stop_clk;
1253 }
1254
1255
1256 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1257 if (map) {
1258
1259 info->fix.smem_start = map->start;
1260 info->fix.smem_len = resource_size(map);
1261 if (!request_mem_region(info->fix.smem_start,
1262 info->fix.smem_len, pdev->name)) {
1263 ret = -EBUSY;
1264 goto stop_clk;
1265 }
1266
1267 info->screen_base = ioremap_wc(info->fix.smem_start,
1268 info->fix.smem_len);
1269 if (!info->screen_base) {
1270 ret = -ENOMEM;
1271 goto release_intmem;
1272 }
1273
1274
1275
1276
1277
1278 } else {
1279
1280 ret = atmel_lcdfb_alloc_video_memory(sinfo);
1281 if (ret < 0) {
1282 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
1283 goto stop_clk;
1284 }
1285 }
1286
1287
1288 info->fix.mmio_start = regs->start;
1289 info->fix.mmio_len = resource_size(regs);
1290
1291 if (!request_mem_region(info->fix.mmio_start,
1292 info->fix.mmio_len, pdev->name)) {
1293 ret = -EBUSY;
1294 goto free_fb;
1295 }
1296
1297 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
1298 if (!sinfo->mmio) {
1299 dev_err(dev, "cannot map LCDC registers\n");
1300 ret = -ENOMEM;
1301 goto release_mem;
1302 }
1303
1304
1305 init_contrast(sinfo);
1306
1307
1308 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
1309 if (ret) {
1310 dev_err(dev, "request_irq failed: %d\n", ret);
1311 goto unmap_mmio;
1312 }
1313
1314
1315
1316 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
1317
1318 ret = atmel_lcdfb_init_fbinfo(sinfo);
1319 if (ret < 0) {
1320 dev_err(dev, "init fbinfo failed: %d\n", ret);
1321 goto unregister_irqs;
1322 }
1323
1324 ret = atmel_lcdfb_set_par(info);
1325 if (ret < 0) {
1326 dev_err(dev, "set par failed: %d\n", ret);
1327 goto unregister_irqs;
1328 }
1329
1330 dev_set_drvdata(dev, info);
1331
1332
1333
1334
1335 ret = register_framebuffer(info);
1336 if (ret < 0) {
1337 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1338 goto reset_drvdata;
1339 }
1340
1341
1342 atmel_lcdfb_power_control(sinfo, 1);
1343
1344 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1345 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1346
1347 return 0;
1348
1349reset_drvdata:
1350 dev_set_drvdata(dev, NULL);
1351 fb_dealloc_cmap(&info->cmap);
1352unregister_irqs:
1353 cancel_work_sync(&sinfo->task);
1354 free_irq(sinfo->irq_base, info);
1355unmap_mmio:
1356 exit_backlight(sinfo);
1357 iounmap(sinfo->mmio);
1358release_mem:
1359 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1360free_fb:
1361 if (map)
1362 iounmap(info->screen_base);
1363 else
1364 atmel_lcdfb_free_video_memory(sinfo);
1365
1366release_intmem:
1367 if (map)
1368 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1369stop_clk:
1370 atmel_lcdfb_stop_clock(sinfo);
1371 clk_put(sinfo->lcdc_clk);
1372put_bus_clk:
1373 clk_put(sinfo->bus_clk);
1374free_info:
1375 framebuffer_release(info);
1376out:
1377 dev_dbg(dev, "%s FAILED\n", __func__);
1378 return ret;
1379}
1380
1381static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1382{
1383 struct device *dev = &pdev->dev;
1384 struct fb_info *info = dev_get_drvdata(dev);
1385 struct atmel_lcdfb_info *sinfo;
1386 struct atmel_lcdfb_pdata *pdata;
1387
1388 if (!info || !info->par)
1389 return 0;
1390 sinfo = info->par;
1391 pdata = &sinfo->pdata;
1392
1393 cancel_work_sync(&sinfo->task);
1394 exit_backlight(sinfo);
1395 atmel_lcdfb_power_control(sinfo, 0);
1396 unregister_framebuffer(info);
1397 atmel_lcdfb_stop_clock(sinfo);
1398 clk_put(sinfo->lcdc_clk);
1399 clk_put(sinfo->bus_clk);
1400 fb_dealloc_cmap(&info->cmap);
1401 free_irq(sinfo->irq_base, info);
1402 iounmap(sinfo->mmio);
1403 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1404 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1405 iounmap(info->screen_base);
1406 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1407 } else {
1408 atmel_lcdfb_free_video_memory(sinfo);
1409 }
1410
1411 framebuffer_release(info);
1412
1413 return 0;
1414}
1415
1416#ifdef CONFIG_PM
1417
1418static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1419{
1420 struct fb_info *info = platform_get_drvdata(pdev);
1421 struct atmel_lcdfb_info *sinfo = info->par;
1422
1423
1424
1425
1426
1427 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1428
1429 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1430 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1431 atmel_lcdfb_power_control(sinfo, 0);
1432 atmel_lcdfb_stop(sinfo);
1433 atmel_lcdfb_stop_clock(sinfo);
1434
1435 return 0;
1436}
1437
1438static int atmel_lcdfb_resume(struct platform_device *pdev)
1439{
1440 struct fb_info *info = platform_get_drvdata(pdev);
1441 struct atmel_lcdfb_info *sinfo = info->par;
1442
1443 atmel_lcdfb_start_clock(sinfo);
1444 atmel_lcdfb_start(sinfo);
1445 atmel_lcdfb_power_control(sinfo, 1);
1446 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1447
1448
1449 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1450 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1451
1452 return 0;
1453}
1454
1455#else
1456#define atmel_lcdfb_suspend NULL
1457#define atmel_lcdfb_resume NULL
1458#endif
1459
1460static struct platform_driver atmel_lcdfb_driver = {
1461 .remove = __exit_p(atmel_lcdfb_remove),
1462 .suspend = atmel_lcdfb_suspend,
1463 .resume = atmel_lcdfb_resume,
1464 .id_table = atmel_lcdfb_devtypes,
1465 .driver = {
1466 .name = "atmel_lcdfb",
1467 .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids),
1468 },
1469};
1470
1471module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
1472
1473MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1474MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1475MODULE_LICENSE("GPL");
1476