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19#ifndef __ASM_ARM_KVM_VGIC_H
20#define __ASM_ARM_KVM_VGIC_H
21
22#include <linux/kernel.h>
23#include <linux/kvm.h>
24#include <linux/irqreturn.h>
25#include <linux/spinlock.h>
26#include <linux/types.h>
27#include <kvm/iodev.h>
28
29#define VGIC_NR_IRQS_LEGACY 256
30#define VGIC_NR_SGIS 16
31#define VGIC_NR_PPIS 16
32#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS)
33
34#define VGIC_V2_MAX_LRS (1 << 6)
35#define VGIC_V3_MAX_LRS 16
36#define VGIC_MAX_IRQS 1024
37#define VGIC_V2_MAX_CPUS 8
38#define VGIC_V3_MAX_CPUS 255
39
40#if (VGIC_NR_IRQS_LEGACY & 31)
41#error "VGIC_NR_IRQS must be a multiple of 32"
42#endif
43
44#if (VGIC_NR_IRQS_LEGACY > VGIC_MAX_IRQS)
45#error "VGIC_NR_IRQS must be <= 1024"
46#endif
47
48
49
50
51
52
53struct vgic_bitmap {
54
55
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61
62
63
64 unsigned long *private;
65 unsigned long *shared;
66};
67
68struct vgic_bytemap {
69
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76
77
78
79 u32 *private;
80 u32 *shared;
81};
82
83struct kvm_vcpu;
84
85enum vgic_type {
86 VGIC_V2,
87 VGIC_V3,
88};
89
90#define LR_STATE_PENDING (1 << 0)
91#define LR_STATE_ACTIVE (1 << 1)
92#define LR_STATE_MASK (3 << 0)
93#define LR_EOI_INT (1 << 2)
94#define LR_HW (1 << 3)
95
96struct vgic_lr {
97 unsigned irq:10;
98 union {
99 unsigned hwirq:10;
100 unsigned source:3;
101 };
102 unsigned state:4;
103};
104
105struct vgic_vmcr {
106 u32 ctlr;
107 u32 abpr;
108 u32 bpr;
109 u32 pmr;
110};
111
112struct vgic_ops {
113 struct vgic_lr (*get_lr)(const struct kvm_vcpu *, int);
114 void (*set_lr)(struct kvm_vcpu *, int, struct vgic_lr);
115 u64 (*get_elrsr)(const struct kvm_vcpu *vcpu);
116 u64 (*get_eisr)(const struct kvm_vcpu *vcpu);
117 void (*clear_eisr)(struct kvm_vcpu *vcpu);
118 u32 (*get_interrupt_status)(const struct kvm_vcpu *vcpu);
119 void (*enable_underflow)(struct kvm_vcpu *vcpu);
120 void (*disable_underflow)(struct kvm_vcpu *vcpu);
121 void (*get_vmcr)(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
122 void (*set_vmcr)(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
123 void (*enable)(struct kvm_vcpu *vcpu);
124};
125
126struct vgic_params {
127
128 enum vgic_type type;
129
130 phys_addr_t vcpu_base;
131
132 u32 nr_lr;
133
134 unsigned int maint_irq;
135
136 void __iomem *vctrl_base;
137 int max_gic_vcpus;
138
139 bool can_emulate_gicv2;
140};
141
142struct vgic_vm_ops {
143 bool (*queue_sgi)(struct kvm_vcpu *, int irq);
144 void (*add_sgi_source)(struct kvm_vcpu *, int irq, int source);
145 int (*init_model)(struct kvm *);
146 int (*map_resources)(struct kvm *, const struct vgic_params *);
147};
148
149struct vgic_io_device {
150 gpa_t addr;
151 int len;
152 const struct vgic_io_range *reg_ranges;
153 struct kvm_vcpu *redist_vcpu;
154 struct kvm_io_device dev;
155};
156
157struct irq_phys_map {
158 u32 virt_irq;
159 u32 phys_irq;
160 u32 irq;
161};
162
163struct irq_phys_map_entry {
164 struct list_head entry;
165 struct rcu_head rcu;
166 struct irq_phys_map map;
167};
168
169struct vgic_dist {
170 spinlock_t lock;
171 bool in_kernel;
172 bool ready;
173
174
175 u32 vgic_model;
176
177 int nr_cpus;
178 int nr_irqs;
179
180
181 void __iomem *vctrl_base;
182
183
184 phys_addr_t vgic_dist_base;
185
186 union {
187 phys_addr_t vgic_cpu_base;
188 phys_addr_t vgic_redist_base;
189 };
190
191
192 u32 enabled;
193
194
195 struct vgic_bitmap irq_enabled;
196
197
198 struct vgic_bitmap irq_level;
199
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202
203 struct vgic_bitmap irq_pending;
204
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211
212 struct vgic_bitmap irq_soft_pend;
213
214
215 struct vgic_bitmap irq_queued;
216
217
218 struct vgic_bitmap irq_active;
219
220
221 struct vgic_bytemap irq_priority;
222
223
224 struct vgic_bitmap irq_cfg;
225
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235
236 u8 *irq_sgi_sources;
237
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243
244 u8 *irq_spi_cpu;
245
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251
252 struct vgic_bitmap *irq_spi_target;
253
254
255 u32 *irq_spi_mpidr;
256
257
258 unsigned long *irq_pending_on_cpu;
259
260
261 unsigned long *irq_active_on_cpu;
262
263 struct vgic_vm_ops vm_ops;
264 struct vgic_io_device dist_iodev;
265 struct vgic_io_device *redist_iodevs;
266
267
268 spinlock_t irq_phys_map_lock;
269 struct list_head irq_phys_map_list;
270};
271
272struct vgic_v2_cpu_if {
273 u32 vgic_hcr;
274 u32 vgic_vmcr;
275 u32 vgic_misr;
276 u64 vgic_eisr;
277 u64 vgic_elrsr;
278 u32 vgic_apr;
279 u32 vgic_lr[VGIC_V2_MAX_LRS];
280};
281
282struct vgic_v3_cpu_if {
283#ifdef CONFIG_KVM_ARM_VGIC_V3
284 u32 vgic_hcr;
285 u32 vgic_vmcr;
286 u32 vgic_sre;
287 u32 vgic_misr;
288 u32 vgic_eisr;
289 u32 vgic_elrsr;
290 u32 vgic_ap0r[4];
291 u32 vgic_ap1r[4];
292 u64 vgic_lr[VGIC_V3_MAX_LRS];
293#endif
294};
295
296struct vgic_cpu {
297
298 DECLARE_BITMAP(pending_percpu, VGIC_NR_PRIVATE_IRQS);
299 DECLARE_BITMAP(active_percpu, VGIC_NR_PRIVATE_IRQS);
300 DECLARE_BITMAP(pend_act_percpu, VGIC_NR_PRIVATE_IRQS);
301
302
303 unsigned long *pending_shared;
304 unsigned long *active_shared;
305 unsigned long *pend_act_shared;
306
307
308 int nr_lr;
309
310
311 union {
312 struct vgic_v2_cpu_if vgic_v2;
313 struct vgic_v3_cpu_if vgic_v3;
314 };
315
316
317 struct list_head irq_phys_map_list;
318
319 u64 live_lrs;
320};
321
322#define LR_EMPTY 0xff
323
324#define INT_STATUS_EOI (1 << 0)
325#define INT_STATUS_UNDERFLOW (1 << 1)
326
327struct kvm;
328struct kvm_vcpu;
329
330int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
331int kvm_vgic_hyp_init(void);
332int kvm_vgic_map_resources(struct kvm *kvm);
333int kvm_vgic_get_max_vcpus(void);
334void kvm_vgic_early_init(struct kvm *kvm);
335int kvm_vgic_create(struct kvm *kvm, u32 type);
336void kvm_vgic_destroy(struct kvm *kvm);
337void kvm_vgic_vcpu_early_init(struct kvm_vcpu *vcpu);
338void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu);
339void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
340void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
341int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int irq_num,
342 bool level);
343int kvm_vgic_inject_mapped_irq(struct kvm *kvm, int cpuid,
344 struct irq_phys_map *map, bool level);
345void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg);
346int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
347struct irq_phys_map *kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu,
348 int virt_irq, int irq);
349int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, struct irq_phys_map *map);
350bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, struct irq_phys_map *map);
351
352#define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel))
353#define vgic_initialized(k) (!!((k)->arch.vgic.nr_cpus))
354#define vgic_ready(k) ((k)->arch.vgic.ready)
355
356int vgic_v2_probe(struct device_node *vgic_node,
357 const struct vgic_ops **ops,
358 const struct vgic_params **params);
359#ifdef CONFIG_KVM_ARM_VGIC_V3
360int vgic_v3_probe(struct device_node *vgic_node,
361 const struct vgic_ops **ops,
362 const struct vgic_params **params);
363#else
364static inline int vgic_v3_probe(struct device_node *vgic_node,
365 const struct vgic_ops **ops,
366 const struct vgic_params **params)
367{
368 return -ENODEV;
369}
370#endif
371
372#endif
373