LXR linux/include/linux/mbus.h

   1/*
   2 * Marvell MBUS common definitions.
   3 *
   4 * Copyright (C) 2008 Marvell Semiconductor
   5 *
   6 * This file is licensed under the terms of the GNU General Public
   7 * License version 2.  This program is licensed "as is" without any
   8 * warranty of any kind, whether express or implied.
   9 */
  10
  11#ifndef __LINUX_MBUS_H
  12#define __LINUX_MBUS_H
  13
  14struct resource;
  15
  16struct mbus_dram_target_info
  17{
  18        /*
  19         * The 4-bit MBUS target ID of the DRAM controller.
  20         */
  21        u8              mbus_dram_target_id;
  22
  23        /*
  24         * The base address, size, and MBUS attribute ID for each
  25         * of the possible DRAM chip selects.  Peripherals are
  26         * required to support at least 4 decode windows.
  27         */
  28        int             num_cs;
  29        struct mbus_dram_window {
  30                u8      cs_index;
  31                u8      mbus_attr;
  32                u32     base;
  33                u32     size;
  34        } cs[4];
  35};
  36
  37/* Flags for PCI/PCIe address decoding regions */
  38#define MVEBU_MBUS_PCI_IO  0x1
  39#define MVEBU_MBUS_PCI_MEM 0x2
  40#define MVEBU_MBUS_PCI_WA  0x3
  41
  42/*
  43 * Magic value that explicits that we don't need a remapping-capable
  44 * address decoding window.
  45 */
  46#define MVEBU_MBUS_NO_REMAP (0xffffffff)
  47
  48/* Maximum size of a mbus window name */
  49#define MVEBU_MBUS_MAX_WINNAME_SZ 32
  50
  51/*
  52 * The Marvell mbus is to be found only on SOCs from the Orion family
  53 * at the moment.  Provide a dummy stub for other architectures.
  54 */
  55#ifdef CONFIG_PLAT_ORION
  56extern const struct mbus_dram_target_info *mv_mbus_dram_info(void);
  57extern const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void);
  58#else
  59static inline const struct mbus_dram_target_info *mv_mbus_dram_info(void)
  60{
  61        return NULL;
  62}
  63static inline const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void)
  64{
  65        return NULL;
  66}
  67#endif
  68
  69int mvebu_mbus_save_cpu_target(u32 *store_addr);
  70void mvebu_mbus_get_pcie_mem_aperture(struct resource *res);
  71void mvebu_mbus_get_pcie_io_aperture(struct resource *res);
  72int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr);
  73int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
  74                               u8 *attr);
  75int mvebu_mbus_add_window_remap_by_id(unsigned int target,
  76                                      unsigned int attribute,
  77                                      phys_addr_t base, size_t size,
  78                                      phys_addr_t remap);
  79int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute,
  80                                phys_addr_t base, size_t size);
  81int mvebu_mbus_del_window(phys_addr_t base, size_t size);
  82int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
  83                    size_t mbus_size, phys_addr_t sdram_phys_base,
  84                    size_t sdram_size);
  85int mvebu_mbus_dt_init(bool is_coherent);
  86
  87#endif /* __LINUX_MBUS_H */
  88