LXR linux/include/uapi/drm/omap

   1/*
   2 * include/uapi/drm/omap_drm.h
   3 *
   4 * Copyright (C) 2011 Texas Instruments
   5 * Author: Rob Clark <rob@ti.com>
   6 *
   7 * This program is free software; you can redistribute it and/or modify it
   8 * under the terms of the GNU General Public License version 2 as published by
   9 * the Free Software Foundation.
  10 *
  11 * This program is distributed in the hope that it will be useful, but WITHOUT
  12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14 * more details.
  15 *
  16 * You should have received a copy of the GNU General Public License along with
  17 * this program.  If not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#ifndef __OMAP_DRM_H__
  21#define __OMAP_DRM_H__
  22
  23#include "drm.h"
  24
  25/* Please note that modifications to all structs defined here are
  26 * subject to backwards-compatibility constraints.
  27 */
  28
  29#define OMAP_PARAM_CHIPSET_ID   1       /* ie. 0x3430, 0x4430, etc */
  30
  31struct drm_omap_param {
  32        uint64_t param;                 /* in */
  33        uint64_t value;                 /* in (set_param), out (get_param) */
  34};
  35
  36#define OMAP_BO_SCANOUT         0x00000001      /* scanout capable (phys contiguous) */
  37#define OMAP_BO_CACHE_MASK      0x00000006      /* cache type mask, see cache modes */
  38#define OMAP_BO_TILED_MASK      0x00000f00      /* tiled mapping mask, see tiled modes */
  39
  40/* cache modes */
  41#define OMAP_BO_CACHED          0x00000000      /* default */
  42#define OMAP_BO_WC              0x00000002      /* write-combine */
  43#define OMAP_BO_UNCACHED        0x00000004      /* strongly-ordered (uncached) */
  44
  45/* tiled modes */
  46#define OMAP_BO_TILED_8         0x00000100
  47#define OMAP_BO_TILED_16        0x00000200
  48#define OMAP_BO_TILED_32        0x00000300
  49#define OMAP_BO_TILED           (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)
  50
  51union omap_gem_size {
  52        uint32_t bytes;         /* (for non-tiled formats) */
  53        struct {
  54                uint16_t width;
  55                uint16_t height;
  56        } tiled;                /* (for tiled formats) */
  57};
  58
  59struct drm_omap_gem_new {
  60        union omap_gem_size size;       /* in */
  61        uint32_t flags;                 /* in */
  62        uint32_t handle;                /* out */
  63        uint32_t __pad;
  64};
  65
  66/* mask of operations: */
  67enum omap_gem_op {
  68        OMAP_GEM_READ = 0x01,
  69        OMAP_GEM_WRITE = 0x02,
  70};
  71
  72struct drm_omap_gem_cpu_prep {
  73        uint32_t handle;                /* buffer handle (in) */
  74        uint32_t op;                    /* mask of omap_gem_op (in) */
  75};
  76
  77struct drm_omap_gem_cpu_fini {
  78        uint32_t handle;                /* buffer handle (in) */
  79        uint32_t op;                    /* mask of omap_gem_op (in) */
  80        /* TODO maybe here we pass down info about what regions are touched
  81         * by sw so we can be clever about cache ops?  For now a placeholder,
  82         * set to zero and we just do full buffer flush..
  83         */
  84        uint32_t nregions;
  85        uint32_t __pad;
  86};
  87
  88struct drm_omap_gem_info {
  89        uint32_t handle;                /* buffer handle (in) */
  90        uint32_t pad;
  91        uint64_t offset;                /* mmap offset (out) */
  92        /* note: in case of tiled buffers, the user virtual size can be
  93         * different from the physical size (ie. how many pages are needed
  94         * to back the object) which is returned in DRM_IOCTL_GEM_OPEN..
  95         * This size here is the one that should be used if you want to
  96         * mmap() the buffer:
  97         */
  98        uint32_t size;                  /* virtual size for mmap'ing (out) */
  99        uint32_t __pad;
 100};
 101
 102#define DRM_OMAP_GET_PARAM              0x00
 103#define DRM_OMAP_SET_PARAM              0x01
 104#define DRM_OMAP_GEM_NEW                0x03
 105#define DRM_OMAP_GEM_CPU_PREP           0x04
 106#define DRM_OMAP_GEM_CPU_FINI           0x05
 107#define DRM_OMAP_GEM_INFO               0x06
 108#define DRM_OMAP_NUM_IOCTLS             0x07
 109
 110#define DRM_IOCTL_OMAP_GET_PARAM        DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
 111#define DRM_IOCTL_OMAP_SET_PARAM        DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
 112#define DRM_IOCTL_OMAP_GEM_NEW          DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
 113#define DRM_IOCTL_OMAP_GEM_CPU_PREP     DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
 114#define DRM_IOCTL_OMAP_GEM_CPU_FINI     DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
 115#define DRM_IOCTL_OMAP_GEM_INFO         DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
 116
 117#endif /* __OMAP_DRM_H__ */
 118