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29#include <linux/types.h>
30#include <linux/init.h>
31#include <linux/platform_device.h>
32#include <linux/memory.h>
33#include <linux/gpio.h>
34#include <linux/usb/otg.h>
35
36#include <linux/mtd/physmap.h>
37#include <linux/mfd/mc13892.h>
38#include <linux/regulator/machine.h>
39
40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
42#include <asm/mach/time.h>
43#include <asm/mach/map.h>
44#include <asm/memblock.h>
45
46#include <video/platform_lcd.h>
47
48#include <media/soc_camera.h>
49
50#include "3ds_debugboard.h"
51#include "common.h"
52#include "devices-imx35.h"
53#include "ehci.h"
54#include "hardware.h"
55#include "iomux-mx35.h"
56
57#define GPIO_MC9S08DZ60_GPS_ENABLE 0
58#define GPIO_MC9S08DZ60_HDD_ENABLE 4
59#define GPIO_MC9S08DZ60_WIFI_ENABLE 5
60#define GPIO_MC9S08DZ60_LCD_ENABLE 6
61#define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8
62
63static const struct fb_videomode fb_modedb[] = {
64 {
65
66 .name = "Ceramate-CLAA070VC01",
67 .refresh = 55,
68 .xres = 800,
69 .yres = 480,
70 .pixclock = 40000,
71 .left_margin = 40,
72 .right_margin = 40,
73 .upper_margin = 5,
74 .lower_margin = 5,
75 .hsync_len = 20,
76 .vsync_len = 10,
77 .sync = FB_SYNC_OE_ACT_HIGH,
78 .vmode = FB_VMODE_NONINTERLACED,
79 .flag = 0,
80 },
81};
82
83static struct mx3fb_platform_data mx3fb_pdata __initdata = {
84 .name = "Ceramate-CLAA070VC01",
85 .mode = fb_modedb,
86 .num_modes = ARRAY_SIZE(fb_modedb),
87};
88
89static struct i2c_board_info __initdata i2c_devices_3ds[] = {
90 {
91 I2C_BOARD_INFO("mc9s08dz60", 0x69),
92 },
93};
94
95static int lcd_power_gpio = -ENXIO;
96
97static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)
98{
99 return !strcmp(chip->label, data);
100}
101
102static void mx35_3ds_lcd_set_power(
103 struct plat_lcd_data *pd, unsigned int power)
104{
105 struct gpio_chip *chip;
106
107 if (!gpio_is_valid(lcd_power_gpio)) {
108 chip = gpiochip_find(
109 "mc9s08dz60", mc9s08dz60_gpiochip_match);
110 if (chip) {
111 lcd_power_gpio =
112 chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
113 if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
114 pr_err("error: gpio already requested!\n");
115 lcd_power_gpio = -ENXIO;
116 }
117 } else {
118 pr_err("error: didn't find mc9s08dz60 gpio chip\n");
119 }
120 }
121
122 if (gpio_is_valid(lcd_power_gpio))
123 gpio_set_value_cansleep(lcd_power_gpio, power);
124}
125
126static struct plat_lcd_data mx35_3ds_lcd_data = {
127 .set_power = mx35_3ds_lcd_set_power,
128};
129
130static struct platform_device mx35_3ds_lcd = {
131 .name = "platform-lcd",
132 .dev.platform_data = &mx35_3ds_lcd_data,
133};
134
135static const struct imxuart_platform_data uart_pdata __initconst = {
136 .flags = IMXUART_HAVE_RTSCTS,
137};
138
139static struct physmap_flash_data mx35pdk_flash_data = {
140 .width = 2,
141};
142
143static struct resource mx35pdk_flash_resource = {
144 .start = MX35_CS0_BASE_ADDR,
145 .end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
146 .flags = IORESOURCE_MEM,
147};
148
149static struct platform_device mx35pdk_flash = {
150 .name = "physmap-flash",
151 .id = 0,
152 .dev = {
153 .platform_data = &mx35pdk_flash_data,
154 },
155 .resource = &mx35pdk_flash_resource,
156 .num_resources = 1,
157};
158
159static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
160 .width = 1,
161 .hw_ecc = 1,
162 .flash_bbt = 1,
163};
164
165static struct platform_device *devices[] __initdata = {
166 &mx35pdk_flash,
167};
168
169static const iomux_v3_cfg_t mx35pdk_pads[] __initconst = {
170
171 MX35_PAD_CTS1__UART1_CTS,
172 MX35_PAD_RTS1__UART1_RTS,
173 MX35_PAD_TXD1__UART1_TXD_MUX,
174 MX35_PAD_RXD1__UART1_RXD_MUX,
175
176 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
177 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
178 MX35_PAD_FEC_RX_DV__FEC_RX_DV,
179 MX35_PAD_FEC_COL__FEC_COL,
180 MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
181 MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
182 MX35_PAD_FEC_TX_EN__FEC_TX_EN,
183 MX35_PAD_FEC_MDC__FEC_MDC,
184 MX35_PAD_FEC_MDIO__FEC_MDIO,
185 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
186 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
187 MX35_PAD_FEC_CRS__FEC_CRS,
188 MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
189 MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
190 MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
191 MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
192 MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
193 MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
194
195 MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
196 MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
197
198 MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
199 MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
200
201 MX35_PAD_SD1_CMD__ESDHC1_CMD,
202 MX35_PAD_SD1_CLK__ESDHC1_CLK,
203 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
204 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
205 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
206 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
207
208 MX35_PAD_I2C1_CLK__I2C1_SCL,
209 MX35_PAD_I2C1_DAT__I2C1_SDA,
210
211 MX35_PAD_LD0__IPU_DISPB_DAT_0,
212 MX35_PAD_LD1__IPU_DISPB_DAT_1,
213 MX35_PAD_LD2__IPU_DISPB_DAT_2,
214 MX35_PAD_LD3__IPU_DISPB_DAT_3,
215 MX35_PAD_LD4__IPU_DISPB_DAT_4,
216 MX35_PAD_LD5__IPU_DISPB_DAT_5,
217 MX35_PAD_LD6__IPU_DISPB_DAT_6,
218 MX35_PAD_LD7__IPU_DISPB_DAT_7,
219 MX35_PAD_LD8__IPU_DISPB_DAT_8,
220 MX35_PAD_LD9__IPU_DISPB_DAT_9,
221 MX35_PAD_LD10__IPU_DISPB_DAT_10,
222 MX35_PAD_LD11__IPU_DISPB_DAT_11,
223 MX35_PAD_LD12__IPU_DISPB_DAT_12,
224 MX35_PAD_LD13__IPU_DISPB_DAT_13,
225 MX35_PAD_LD14__IPU_DISPB_DAT_14,
226 MX35_PAD_LD15__IPU_DISPB_DAT_15,
227 MX35_PAD_LD16__IPU_DISPB_DAT_16,
228 MX35_PAD_LD17__IPU_DISPB_DAT_17,
229 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
230 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
231 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
232 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
233 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
234 MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
235 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
236
237 MX35_PAD_TX1__IPU_CSI_D_6,
238 MX35_PAD_TX0__IPU_CSI_D_7,
239 MX35_PAD_CSI_D8__IPU_CSI_D_8,
240 MX35_PAD_CSI_D9__IPU_CSI_D_9,
241 MX35_PAD_CSI_D10__IPU_CSI_D_10,
242 MX35_PAD_CSI_D11__IPU_CSI_D_11,
243 MX35_PAD_CSI_D12__IPU_CSI_D_12,
244 MX35_PAD_CSI_D13__IPU_CSI_D_13,
245 MX35_PAD_CSI_D14__IPU_CSI_D_14,
246 MX35_PAD_CSI_D15__IPU_CSI_D_15,
247 MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC,
248 MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,
249 MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,
250 MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,
251
252 MX35_PAD_GPIO2_0__GPIO2_0,
253};
254
255
256
257
258static phys_addr_t mx3_camera_base __initdata;
259#define MX35_3DS_CAMERA_BUF_SIZE SZ_8M
260
261static const struct mx3_camera_pdata mx35_3ds_camera_pdata __initconst = {
262 .flags = MX3_CAMERA_DATAWIDTH_8,
263 .mclk_10khz = 2000,
264};
265
266static int __init imx35_3ds_init_camera(void)
267{
268 int dma, ret = -ENOMEM;
269 struct platform_device *pdev =
270 imx35_alloc_mx3_camera(&mx35_3ds_camera_pdata);
271
272 if (IS_ERR(pdev))
273 return PTR_ERR(pdev);
274
275 if (!mx3_camera_base)
276 goto err;
277
278 dma = dma_declare_coherent_memory(&pdev->dev,
279 mx3_camera_base, mx3_camera_base,
280 MX35_3DS_CAMERA_BUF_SIZE,
281 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
282
283 if (!(dma & DMA_MEMORY_MAP))
284 goto err;
285
286 ret = platform_device_add(pdev);
287 if (ret)
288err:
289 platform_device_put(pdev);
290
291 return ret;
292}
293
294static struct i2c_board_info mx35_3ds_i2c_camera = {
295 I2C_BOARD_INFO("ov2640", 0x30),
296};
297
298static struct soc_camera_link iclink_ov2640 = {
299 .bus_id = 0,
300 .board_info = &mx35_3ds_i2c_camera,
301 .i2c_adapter_id = 0,
302 .power = NULL,
303};
304
305static struct platform_device mx35_3ds_ov2640 = {
306 .name = "soc-camera-pdrv",
307 .id = 0,
308 .dev = {
309 .platform_data = &iclink_ov2640,
310 },
311};
312
313static struct regulator_consumer_supply sw1_consumers[] = {
314 {
315 .supply = "cpu_vcc",
316 }
317};
318
319static struct regulator_consumer_supply vcam_consumers[] = {
320
321 REGULATOR_SUPPLY("VDDA", "0-000a"),
322};
323
324static struct regulator_consumer_supply vaudio_consumers[] = {
325 REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),
326};
327
328static struct regulator_init_data sw1_init = {
329 .constraints = {
330 .name = "SW1",
331 .min_uV = 600000,
332 .max_uV = 1375000,
333 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
334 .valid_modes_mask = 0,
335 .always_on = 1,
336 .boot_on = 1,
337 },
338 .num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
339 .consumer_supplies = sw1_consumers,
340};
341
342static struct regulator_init_data sw2_init = {
343 .constraints = {
344 .name = "SW2",
345 .always_on = 1,
346 .boot_on = 1,
347 }
348};
349
350static struct regulator_init_data sw3_init = {
351 .constraints = {
352 .name = "SW3",
353 .always_on = 1,
354 .boot_on = 1,
355 }
356};
357
358static struct regulator_init_data sw4_init = {
359 .constraints = {
360 .name = "SW4",
361 .always_on = 1,
362 .boot_on = 1,
363 }
364};
365
366static struct regulator_init_data viohi_init = {
367 .constraints = {
368 .name = "VIOHI",
369 .boot_on = 1,
370 }
371};
372
373static struct regulator_init_data vusb_init = {
374 .constraints = {
375 .name = "VUSB",
376 .boot_on = 1,
377 }
378};
379
380static struct regulator_init_data vdig_init = {
381 .constraints = {
382 .name = "VDIG",
383 .boot_on = 1,
384 }
385};
386
387static struct regulator_init_data vpll_init = {
388 .constraints = {
389 .name = "VPLL",
390 .boot_on = 1,
391 }
392};
393
394static struct regulator_init_data vusb2_init = {
395 .constraints = {
396 .name = "VUSB2",
397 .boot_on = 1,
398 }
399};
400
401static struct regulator_init_data vvideo_init = {
402 .constraints = {
403 .name = "VVIDEO",
404 .boot_on = 1
405 }
406};
407
408static struct regulator_init_data vaudio_init = {
409 .constraints = {
410 .name = "VAUDIO",
411 .min_uV = 2300000,
412 .max_uV = 3000000,
413 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
414 .boot_on = 1
415 },
416 .num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),
417 .consumer_supplies = vaudio_consumers,
418};
419
420static struct regulator_init_data vcam_init = {
421 .constraints = {
422 .name = "VCAM",
423 .min_uV = 2500000,
424 .max_uV = 3000000,
425 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
426 REGULATOR_CHANGE_MODE,
427 .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
428 .boot_on = 1
429 },
430 .num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
431 .consumer_supplies = vcam_consumers,
432};
433
434static struct regulator_init_data vgen1_init = {
435 .constraints = {
436 .name = "VGEN1",
437 }
438};
439
440static struct regulator_init_data vgen2_init = {
441 .constraints = {
442 .name = "VGEN2",
443 .boot_on = 1,
444 }
445};
446
447static struct regulator_init_data vgen3_init = {
448 .constraints = {
449 .name = "VGEN3",
450 }
451};
452
453static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
454 { .id = MC13892_SW1, .init_data = &sw1_init },
455 { .id = MC13892_SW2, .init_data = &sw2_init },
456 { .id = MC13892_SW3, .init_data = &sw3_init },
457 { .id = MC13892_SW4, .init_data = &sw4_init },
458 { .id = MC13892_VIOHI, .init_data = &viohi_init },
459 { .id = MC13892_VPLL, .init_data = &vpll_init },
460 { .id = MC13892_VDIG, .init_data = &vdig_init },
461 { .id = MC13892_VUSB2, .init_data = &vusb2_init },
462 { .id = MC13892_VVIDEO, .init_data = &vvideo_init },
463 { .id = MC13892_VAUDIO, .init_data = &vaudio_init },
464 { .id = MC13892_VCAM, .init_data = &vcam_init },
465 { .id = MC13892_VGEN1, .init_data = &vgen1_init },
466 { .id = MC13892_VGEN2, .init_data = &vgen2_init },
467 { .id = MC13892_VGEN3, .init_data = &vgen3_init },
468 { .id = MC13892_VUSB, .init_data = &vusb_init },
469};
470
471static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
472 .flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
473 .regulators = {
474 .num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
475 .regulators = mx35_3ds_regulators,
476 },
477};
478
479#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
480
481static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
482
483 I2C_BOARD_INFO("mc13892", 0x08),
484 .platform_data = &mx35_3ds_mc13892_data,
485
486};
487
488static void __init imx35_3ds_init_mc13892(void)
489{
490 int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
491
492 if (ret) {
493 pr_err("failed to get pmic irq: %d\n", ret);
494 return;
495 }
496
497 mx35_3ds_i2c_mc13892.irq = gpio_to_irq(GPIO_PMIC_INT);
498 i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
499}
500
501static int mx35_3ds_otg_init(struct platform_device *pdev)
502{
503 return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
504}
505
506
507static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
508 .operating_mode = FSL_USB2_DR_DEVICE,
509 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
510 .workaround = FLS_USB2_WORKAROUND_ENGCM09152,
511
512
513
514
515};
516
517static struct mxc_usbh_platform_data otg_pdata __initdata = {
518 .init = mx35_3ds_otg_init,
519 .portsc = MXC_EHCI_MODE_UTMI,
520};
521
522static int mx35_3ds_usbh_init(struct platform_device *pdev)
523{
524 return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
525 MXC_EHCI_INTERNAL_PHY);
526}
527
528
529static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
530 .init = mx35_3ds_usbh_init,
531 .portsc = MXC_EHCI_MODE_SERIAL,
532};
533
534static bool otg_mode_host __initdata;
535
536static int __init mx35_3ds_otg_mode(char *options)
537{
538 if (!strcmp(options, "host"))
539 otg_mode_host = true;
540 else if (!strcmp(options, "device"))
541 otg_mode_host = false;
542 else
543 pr_info("otg_mode neither \"host\" nor \"device\". "
544 "Defaulting to device\n");
545 return 1;
546}
547__setup("otg_mode=", mx35_3ds_otg_mode);
548
549static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
550 .bitrate = 100000,
551};
552
553
554
555
556static void __init mx35_3ds_init(void)
557{
558 imx35_soc_init();
559
560 mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
561
562 imx35_add_fec(NULL);
563 imx35_add_imx2_wdt();
564 imx35_add_mxc_rtc();
565 platform_add_devices(devices, ARRAY_SIZE(devices));
566
567 imx35_add_imx_uart0(&uart_pdata);
568
569 if (otg_mode_host)
570 imx35_add_mxc_ehci_otg(&otg_pdata);
571
572 imx35_add_mxc_ehci_hs(&usb_host_pdata);
573
574 if (!otg_mode_host)
575 imx35_add_fsl_usb2_udc(&usb_otg_pdata);
576
577 imx35_add_mxc_nand(&mx35pdk_nand_board_info);
578 imx35_add_sdhci_esdhc_imx(0, NULL);
579
580 imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);
581
582 i2c_register_board_info(
583 0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));
584
585 imx35_add_ipu_core();
586 platform_device_register(&mx35_3ds_ov2640);
587 imx35_3ds_init_camera();
588}
589
590static void __init mx35_3ds_late_init(void)
591{
592 struct platform_device *imx35_fb_pdev;
593
594 if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1)))
595 pr_warn("Init of the debugboard failed, all "
596 "devices on the debugboard are unusable.\n");
597
598 imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
599 mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
600 platform_device_register(&mx35_3ds_lcd);
601
602 imx35_3ds_init_mc13892();
603}
604
605static void __init mx35pdk_timer_init(void)
606{
607 mx35_clocks_init();
608}
609
610static void __init mx35_3ds_reserve(void)
611{
612
613 mx3_camera_base = arm_memblock_steal(MX35_3DS_CAMERA_BUF_SIZE,
614 MX35_3DS_CAMERA_BUF_SIZE);
615}
616
617MACHINE_START(MX35_3DS, "Freescale MX35PDK")
618
619 .atag_offset = 0x100,
620 .map_io = mx35_map_io,
621 .init_early = imx35_init_early,
622 .init_irq = mx35_init_irq,
623 .init_time = mx35pdk_timer_init,
624 .init_machine = mx35_3ds_init,
625 .init_late = mx35_3ds_late_init,
626 .reserve = mx35_3ds_reserve,
627 .restart = mxc_restart,
628MACHINE_END
629
