LXR linux/arch/ia64/include/asm/iosapic.h

   1#ifndef __ASM_IA64_IOSAPIC_H
   2#define __ASM_IA64_IOSAPIC_H
   3
   4#define IOSAPIC_REG_SELECT      0x0
   5#define IOSAPIC_WINDOW          0x10
   6#define IOSAPIC_EOI             0x40
   7
   8#define IOSAPIC_VERSION         0x1
   9
  10/*
  11 * Redirection table entry
  12 */
  13#define IOSAPIC_RTE_LOW(i)      (0x10+i*2)
  14#define IOSAPIC_RTE_HIGH(i)     (0x11+i*2)
  15
  16#define IOSAPIC_DEST_SHIFT              16
  17
  18/*
  19 * Delivery mode
  20 */
  21#define IOSAPIC_DELIVERY_SHIFT          8
  22#define IOSAPIC_FIXED                   0x0
  23#define IOSAPIC_LOWEST_PRIORITY 0x1
  24#define IOSAPIC_PMI                     0x2
  25#define IOSAPIC_NMI                     0x4
  26#define IOSAPIC_INIT                    0x5
  27#define IOSAPIC_EXTINT                  0x7
  28
  29/*
  30 * Interrupt polarity
  31 */
  32#define IOSAPIC_POLARITY_SHIFT          13
  33#define IOSAPIC_POL_HIGH                0
  34#define IOSAPIC_POL_LOW         1
  35
  36/*
  37 * Trigger mode
  38 */
  39#define IOSAPIC_TRIGGER_SHIFT           15
  40#define IOSAPIC_EDGE                    0
  41#define IOSAPIC_LEVEL                   1
  42
  43/*
  44 * Mask bit
  45 */
  46
  47#define IOSAPIC_MASK_SHIFT              16
  48#define IOSAPIC_MASK                    (1<<IOSAPIC_MASK_SHIFT)
  49
  50#define IOSAPIC_VECTOR_MASK             0xffffff00
  51
  52#ifndef __ASSEMBLY__
  53
  54#ifdef CONFIG_IOSAPIC
  55
  56#define NR_IOSAPICS                     256
  57
  58#define iosapic_pcat_compat_init        ia64_native_iosapic_pcat_compat_init
  59#define __iosapic_read                  __ia64_native_iosapic_read
  60#define __iosapic_write                 __ia64_native_iosapic_write
  61#define iosapic_get_irq_chip            ia64_native_iosapic_get_irq_chip
  62
  63extern void __init ia64_native_iosapic_pcat_compat_init(void);
  64extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger);
  65
  66static inline unsigned int
  67__ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg)
  68{
  69        writel(reg, iosapic + IOSAPIC_REG_SELECT);
  70        return readl(iosapic + IOSAPIC_WINDOW);
  71}
  72
  73static inline void
  74__ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
  75{
  76        writel(reg, iosapic + IOSAPIC_REG_SELECT);
  77        writel(val, iosapic + IOSAPIC_WINDOW);
  78}
  79
  80static inline void iosapic_eoi(char __iomem *iosapic, u32 vector)
  81{
  82        writel(vector, iosapic + IOSAPIC_EOI);
  83}
  84
  85extern void __init iosapic_system_init (int pcat_compat);
  86extern int iosapic_init (unsigned long address, unsigned int gsi_base);
  87extern int iosapic_remove (unsigned int gsi_base);
  88extern int gsi_to_irq (unsigned int gsi);
  89extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity,
  90                                  unsigned long trigger);
  91extern void iosapic_unregister_intr (unsigned int irq);
  92extern void iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
  93                                      unsigned long polarity,
  94                                      unsigned long trigger);
  95extern int __init iosapic_register_platform_intr (u32 int_type,
  96                                           unsigned int gsi,
  97                                           int pmi_vector,
  98                                           u16 eid, u16 id,
  99                                           unsigned long polarity,
 100                                           unsigned long trigger);
 101
 102#ifdef CONFIG_NUMA
 103extern void map_iosapic_to_node (unsigned int, int);
 104#endif
 105#else
 106#define iosapic_system_init(pcat_compat)                        do { } while (0)
 107#define iosapic_init(address,gsi_base)                          (-EINVAL)
 108#define iosapic_remove(gsi_base)                                (-ENODEV)
 109#define iosapic_register_intr(gsi,polarity,trigger)             (gsi)
 110#define iosapic_unregister_intr(irq)                            do { } while (0)
 111#define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger)  do { } while (0)
 112#define iosapic_register_platform_intr(type,gsi,pmi,eid,id, \
 113        polarity,trigger)                                       (gsi)
 114#endif
 115
 116# endif /* !__ASSEMBLY__ */
 117#endif /* __ASM_IA64_IOSAPIC_H */
 118