LXR linux/arch/powerpc/platforms/embedded6xx/holly.c

   1/*
   2 * Board setup routines for the IBM 750GX/CL platform w/ TSI10x bridge
   3 *
   4 * Copyright 2007 IBM Corporation
   5 *
   6 * Stephen Winiecki <stevewin@us.ibm.com>
   7 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
   8 *
   9 * Based on code from mpc7448_hpc2.c
  10 *
  11 * This program is free software; you can redistribute it and/or
  12 * modify it under the terms of the GNU General Public License
  13 * version 2 as published by the Free Software Foundation.
  14 */
  15
  16#include <linux/stddef.h>
  17#include <linux/kernel.h>
  18#include <linux/pci.h>
  19#include <linux/kdev_t.h>
  20#include <linux/console.h>
  21#include <linux/delay.h>
  22#include <linux/irq.h>
  23#include <linux/seq_file.h>
  24#include <linux/root_dev.h>
  25#include <linux/serial.h>
  26#include <linux/tty.h>
  27#include <linux/serial_core.h>
  28#include <linux/of_platform.h>
  29#include <linux/extable.h>
  30
  31#include <asm/time.h>
  32#include <asm/machdep.h>
  33#include <asm/prom.h>
  34#include <asm/udbg.h>
  35#include <asm/tsi108.h>
  36#include <asm/pci-bridge.h>
  37#include <asm/reg.h>
  38#include <mm/mmu_decl.h>
  39#include <asm/tsi108_irq.h>
  40#include <asm/tsi108_pci.h>
  41#include <asm/mpic.h>
  42
  43#undef DEBUG
  44
  45#define HOLLY_PCI_CFG_PHYS 0x7c000000
  46
  47int holly_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn)
  48{
  49        if (bus == 0 && PCI_SLOT(devfn) == 0)
  50                return PCIBIOS_DEVICE_NOT_FOUND;
  51        else
  52                return PCIBIOS_SUCCESSFUL;
  53}
  54
  55static void holly_remap_bridge(void)
  56{
  57        u32 lut_val, lut_addr;
  58        int i;
  59
  60        printk(KERN_INFO "Remapping PCI bridge\n");
  61
  62        /* Re-init the PCI bridge and LUT registers to have mappings that don't
  63         * rely on PIBS
  64         */
  65        lut_addr = 0x900;
  66        for (i = 0; i < 31; i++) {
  67                tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000201);
  68                lut_addr += 4;
  69                tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
  70                lut_addr += 4;
  71        }
  72
  73        /* Reserve the last LUT entry for PCI I/O space */
  74        tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000241);
  75        lut_addr += 4;
  76        tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
  77
  78        /* Map PCI I/O space */
  79        tsi108_write_reg(TSI108_PCI_PFAB_IO_UPPER, 0x0);
  80        tsi108_write_reg(TSI108_PCI_PFAB_IO, 0x1);
  81
  82        /* Map PCI CFG space */
  83        tsi108_write_reg(TSI108_PCI_PFAB_BAR0_UPPER, 0x0);
  84        tsi108_write_reg(TSI108_PCI_PFAB_BAR0, 0x7c000000 | 0x01);
  85
  86        /* We don't need MEM32 and PRM remapping so disable them */
  87        tsi108_write_reg(TSI108_PCI_PFAB_MEM32, 0x0);
  88        tsi108_write_reg(TSI108_PCI_PFAB_PFM3, 0x0);
  89        tsi108_write_reg(TSI108_PCI_PFAB_PFM4, 0x0);
  90
  91        /* Set P2O_BAR0 */
  92        tsi108_write_reg(TSI108_PCI_P2O_BAR0_UPPER, 0x0);
  93        tsi108_write_reg(TSI108_PCI_P2O_BAR0, 0xc0000000);
  94
  95        /* Init the PCI LUTs to do no remapping */
  96        lut_addr = 0x500;
  97        lut_val = 0x00000002;
  98
  99        for (i = 0; i < 32; i++) {
 100                tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, lut_val);
 101                lut_addr += 4;
 102                tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, 0x40000000);
 103                lut_addr += 4;
 104                lut_val += 0x02000000;
 105        }
 106        tsi108_write_reg(TSI108_PCI_P2O_PAGE_SIZES, 0x00007900);
 107
 108        /* Set 64-bit PCI bus address for system memory */
 109        tsi108_write_reg(TSI108_PCI_P2O_BAR2_UPPER, 0x0);
 110        tsi108_write_reg(TSI108_PCI_P2O_BAR2, 0x0);
 111}
 112
 113static void __init holly_setup_arch(void)
 114{
 115        struct device_node *np;
 116
 117        if (ppc_md.progress)
 118                ppc_md.progress("holly_setup_arch():set_bridge", 0);
 119
 120        tsi108_csr_vir_base = get_vir_csrbase();
 121
 122        /* setup PCI host bridge */
 123        holly_remap_bridge();
 124
 125        np = of_find_node_by_type(NULL, "pci");
 126        if (np)
 127                tsi108_setup_pci(np, HOLLY_PCI_CFG_PHYS, 1);
 128
 129        ppc_md.pci_exclude_device = holly_exclude_device;
 130        if (ppc_md.progress)
 131                ppc_md.progress("tsi108: resources set", 0x100);
 132
 133        printk(KERN_INFO "PPC750GX/CL Platform\n");
 134}
 135
 136/*
 137 * Interrupt setup and service.  Interrupts on the holly come
 138 * from the four external INT pins, PCI interrupts are routed via
 139 * PCI interrupt control registers, it generates internal IRQ23
 140 *
 141 * Interrupt routing on the Holly Board:
 142 * TSI108:PB_INT[0] -> CPU0:INT#
 143 * TSI108:PB_INT[1] -> CPU0:MCP#
 144 * TSI108:PB_INT[2] -> N/C
 145 * TSI108:PB_INT[3] -> N/C
 146 */
 147static void __init holly_init_IRQ(void)
 148{
 149        struct mpic *mpic;
 150#ifdef CONFIG_PCI
 151        unsigned int cascade_pci_irq;
 152        struct device_node *tsi_pci;
 153        struct device_node *cascade_node = NULL;
 154#endif
 155
 156        mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
 157                        MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
 158                        24, 0,
 159                        "Tsi108_PIC");
 160
 161        BUG_ON(mpic == NULL);
 162
 163        mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
 164
 165        mpic_init(mpic);
 166
 167#ifdef CONFIG_PCI
 168        tsi_pci = of_find_node_by_type(NULL, "pci");
 169        if (tsi_pci == NULL) {
 170                printk(KERN_ERR "%s: No tsi108 pci node found !\n", __func__);
 171                return;
 172        }
 173
 174        cascade_node = of_find_node_by_type(NULL, "pic-router");
 175        if (cascade_node == NULL) {
 176                printk(KERN_ERR "%s: No tsi108 pci cascade node found !\n", __func__);
 177                return;
 178        }
 179
 180        cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
 181        pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq);
 182        tsi108_pci_int_init(cascade_node);
 183        irq_set_handler_data(cascade_pci_irq, mpic);
 184        irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
 185#endif
 186        /* Configure MPIC outputs to CPU0 */
 187        tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
 188}
 189
 190void holly_show_cpuinfo(struct seq_file *m)
 191{
 192        seq_printf(m, "vendor\t\t: IBM\n");
 193        seq_printf(m, "machine\t\t: PPC750 GX/CL\n");
 194}
 195
 196void __noreturn holly_restart(char *cmd)
 197{
 198        __be32 __iomem *ocn_bar1 = NULL;
 199        unsigned long bar;
 200        struct device_node *bridge = NULL;
 201        const void *prop;
 202        int size;
 203        phys_addr_t addr = 0xc0000000;
 204
 205        local_irq_disable();
 206
 207        bridge = of_find_node_by_type(NULL, "tsi-bridge");
 208        if (bridge) {
 209                prop = of_get_property(bridge, "reg", &size);
 210                addr = of_translate_address(bridge, prop);
 211        }
 212        addr += (TSI108_PB_OFFSET + 0x414);
 213
 214        ocn_bar1 = ioremap(addr, 0x4);
 215
 216        /* Turn on the BOOT bit so the addresses are correctly
 217         * routed to the HLP interface */
 218        bar = ioread32be(ocn_bar1);
 219        bar |= 2;
 220        iowrite32be(bar, ocn_bar1);
 221        iosync();
 222
 223        /* Set SRR0 to the reset vector and turn on MSR_IP */
 224        mtspr(SPRN_SRR0, 0xfff00100);
 225        mtspr(SPRN_SRR1, MSR_IP);
 226
 227        /* Do an rfi to jump back to firmware.  Somewhat evil,
 228         * but it works
 229         */
 230        __asm__ __volatile__("rfi" : : : "memory");
 231
 232        /* Spin until reset happens.  Shouldn't really get here */
 233        for (;;) ;
 234}
 235
 236void holly_power_off(void)
 237{
 238        local_irq_disable();
 239        /* No way to shut power off with software */
 240        for (;;) ;
 241}
 242
 243void holly_halt(void)
 244{
 245        holly_power_off();
 246}
 247
 248/*
 249 * Called very early, device-tree isn't unflattened
 250 */
 251static int __init holly_probe(void)
 252{
 253        if (!of_machine_is_compatible("ibm,holly"))
 254                return 0;
 255        return 1;
 256}
 257
 258static int ppc750_machine_check_exception(struct pt_regs *regs)
 259{
 260        const struct exception_table_entry *entry;
 261
 262        /* Are we prepared to handle this fault */
 263        if ((entry = search_exception_tables(regs->nip)) != NULL) {
 264                tsi108_clear_pci_cfg_error();
 265                regs->msr |= MSR_RI;
 266                regs->nip = entry->fixup;
 267                return 1;
 268        }
 269        return 0;
 270}
 271
 272define_machine(holly){
 273        .name                           = "PPC750 GX/CL TSI",
 274        .probe                          = holly_probe,
 275        .setup_arch                     = holly_setup_arch,
 276        .init_IRQ                       = holly_init_IRQ,
 277        .show_cpuinfo                   = holly_show_cpuinfo,
 278        .get_irq                        = mpic_get_irq,
 279        .restart                        = holly_restart,
 280        .calibrate_decr                 = generic_calibrate_decr,
 281        .machine_check_exception        = ppc750_machine_check_exception,
 282        .progress                       = udbg_progress,
 283};
 284