1#ifndef _ASM_X86_IO_H
2#define _ASM_X86_IO_H
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37#define ARCH_HAS_IOREMAP_WC
38#define ARCH_HAS_IOREMAP_WT
39
40#include <linux/string.h>
41#include <linux/compiler.h>
42#include <asm/page.h>
43#include <asm/early_ioremap.h>
44#include <asm/pgtable_types.h>
45
46#define build_mmio_read(name, size, type, reg, barrier) \
47static inline type name(const volatile void __iomem *addr) \
48{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
49:"m" (*(volatile type __force *)addr) barrier); return ret; }
50
51#define build_mmio_write(name, size, type, reg, barrier) \
52static inline void name(type val, volatile void __iomem *addr) \
53{ asm volatile("mov" size " %0,%1": :reg (val), \
54"m" (*(volatile type __force *)addr) barrier); }
55
56build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
57build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
58build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
59
60build_mmio_read(__readb, "b", unsigned char, "=q", )
61build_mmio_read(__readw, "w", unsigned short, "=r", )
62build_mmio_read(__readl, "l", unsigned int, "=r", )
63
64build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
65build_mmio_write(writew, "w", unsigned short, "r", :"memory")
66build_mmio_write(writel, "l", unsigned int, "r", :"memory")
67
68build_mmio_write(__writeb, "b", unsigned char, "q", )
69build_mmio_write(__writew, "w", unsigned short, "r", )
70build_mmio_write(__writel, "l", unsigned int, "r", )
71
72#define readb_relaxed(a) __readb(a)
73#define readw_relaxed(a) __readw(a)
74#define readl_relaxed(a) __readl(a)
75#define __raw_readb __readb
76#define __raw_readw __readw
77#define __raw_readl __readl
78
79#define writeb_relaxed(v, a) __writeb(v, a)
80#define writew_relaxed(v, a) __writew(v, a)
81#define writel_relaxed(v, a) __writel(v, a)
82#define __raw_writeb __writeb
83#define __raw_writew __writew
84#define __raw_writel __writel
85
86#define mmiowb() barrier()
87
88#ifdef CONFIG_X86_64
89
90build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
91build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
92
93#define readq_relaxed(a) readq(a)
94#define writeq_relaxed(v, a) writeq(v, a)
95
96#define __raw_readq(a) readq(a)
97#define __raw_writeq(val, addr) writeq(val, addr)
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100#define readq readq
101#define writeq writeq
102
103#endif
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118static inline phys_addr_t virt_to_phys(volatile void *address)
119{
120 return __pa(address);
121}
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135
136static inline void *phys_to_virt(phys_addr_t address)
137{
138 return __va(address);
139}
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144#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
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151static inline unsigned int isa_virt_to_bus(volatile void *address)
152{
153 return (unsigned int)virt_to_phys(address);
154}
155#define isa_page_to_bus(page) ((unsigned int)page_to_phys(page))
156#define isa_bus_to_virt phys_to_virt
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164#define virt_to_bus virt_to_phys
165#define bus_to_virt phys_to_virt
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181extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
182extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size);
183#define ioremap_uc ioremap_uc
184
185extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
186extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
187 unsigned long prot_val);
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192static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
193{
194 return ioremap_nocache(offset, size);
195}
196
197extern void iounmap(volatile void __iomem *addr);
198
199extern void set_iounmap_nonlazy(void);
200
201#ifdef __KERNEL__
202
203#include <asm-generic/iomap.h>
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207
208#define xlate_dev_kmem_ptr(p) p
209
210static inline void
211memset_io(volatile void __iomem *addr, unsigned char val, size_t count)
212{
213 memset((void __force *)addr, val, count);
214}
215
216static inline void
217memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count)
218{
219 memcpy(dst, (const void __force *)src, count);
220}
221
222static inline void
223memcpy_toio(volatile void __iomem *dst, const void *src, size_t count)
224{
225 memcpy((void __force *)dst, src, count);
226}
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235
236#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
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246static inline void flush_write_buffers(void)
247{
248#if defined(CONFIG_X86_PPRO_FENCE)
249 asm volatile("lock; addl $0,0(%%esp)": : :"memory");
250#endif
251}
252
253#endif
254
255extern void native_io_delay(void);
256
257extern int io_delay_type;
258extern void io_delay_init(void);
259
260#if defined(CONFIG_PARAVIRT)
261#include <asm/paravirt.h>
262#else
263
264static inline void slow_down_io(void)
265{
266 native_io_delay();
267#ifdef REALLY_SLOW_IO
268 native_io_delay();
269 native_io_delay();
270 native_io_delay();
271#endif
272}
273
274#endif
275
276#define BUILDIO(bwl, bw, type) \
277static inline void out##bwl(unsigned type value, int port) \
278{ \
279 asm volatile("out" #bwl " %" #bw "0, %w1" \
280 : : "a"(value), "Nd"(port)); \
281} \
282 \
283static inline unsigned type in##bwl(int port) \
284{ \
285 unsigned type value; \
286 asm volatile("in" #bwl " %w1, %" #bw "0" \
287 : "=a"(value) : "Nd"(port)); \
288 return value; \
289} \
290 \
291static inline void out##bwl##_p(unsigned type value, int port) \
292{ \
293 out##bwl(value, port); \
294 slow_down_io(); \
295} \
296 \
297static inline unsigned type in##bwl##_p(int port) \
298{ \
299 unsigned type value = in##bwl(port); \
300 slow_down_io(); \
301 return value; \
302} \
303 \
304static inline void outs##bwl(int port, const void *addr, unsigned long count) \
305{ \
306 asm volatile("rep; outs" #bwl \
307 : "+S"(addr), "+c"(count) : "d"(port)); \
308} \
309 \
310static inline void ins##bwl(int port, void *addr, unsigned long count) \
311{ \
312 asm volatile("rep; ins" #bwl \
313 : "+D"(addr), "+c"(count) : "d"(port)); \
314}
315
316BUILDIO(b, b, char)
317BUILDIO(w, w, short)
318BUILDIO(l, , int)
319
320extern void *xlate_dev_mem_ptr(phys_addr_t phys);
321extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);
322
323extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
324 enum page_cache_mode pcm);
325extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
326extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size);
327
328extern bool is_early_ioremap_ptep(pte_t *ptep);
329
330#ifdef CONFIG_XEN
331#include <xen/xen.h>
332struct bio_vec;
333
334extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
335 const struct bio_vec *vec2);
336
337#define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
338 (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \
339 (!xen_domain() || xen_biovec_phys_mergeable(vec1, vec2)))
340#endif
341
342#define IO_SPACE_LIMIT 0xffff
343
344#ifdef CONFIG_MTRR
345extern int __must_check arch_phys_wc_index(int handle);
346#define arch_phys_wc_index arch_phys_wc_index
347
348extern int __must_check arch_phys_wc_add(unsigned long base,
349 unsigned long size);
350extern void arch_phys_wc_del(int handle);
351#define arch_phys_wc_add arch_phys_wc_add
352#endif
353
354#ifdef CONFIG_X86_PAT
355extern int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size);
356extern void arch_io_free_memtype_wc(resource_size_t start, resource_size_t size);
357#define arch_io_reserve_memtype_wc arch_io_reserve_memtype_wc
358#endif
359
360#endif
361