LXR linux/arch/x86/include/asm/pmem.h

   1/*
   2 * Copyright(c) 2015 Intel Corporation. All rights reserved.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of version 2 of the GNU General Public License as
   6 * published by the Free Software Foundation.
   7 *
   8 * This program is distributed in the hope that it will be useful, but
   9 * WITHOUT ANY WARRANTY; without even the implied warranty of
  10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11 * General Public License for more details.
  12 */
  13#ifndef __ASM_X86_PMEM_H__
  14#define __ASM_X86_PMEM_H__
  15
  16#include <linux/uaccess.h>
  17#include <asm/cacheflush.h>
  18#include <asm/cpufeature.h>
  19#include <asm/special_insns.h>
  20
  21#ifdef CONFIG_ARCH_HAS_PMEM_API
  22/**
  23 * arch_memcpy_to_pmem - copy data to persistent memory
  24 * @dst: destination buffer for the copy
  25 * @src: source buffer for the copy
  26 * @n: length of the copy in bytes
  27 *
  28 * Copy data to persistent memory media via non-temporal stores so that
  29 * a subsequent pmem driver flush operation will drain posted write queues.
  30 */
  31static inline void arch_memcpy_to_pmem(void *dst, const void *src, size_t n)
  32{
  33        int rem;
  34
  35        /*
  36         * We are copying between two kernel buffers, if
  37         * __copy_from_user_inatomic_nocache() returns an error (page
  38         * fault) we would have already reported a general protection fault
  39         * before the WARN+BUG.
  40         */
  41        rem = __copy_from_user_inatomic_nocache(dst, (void __user *) src, n);
  42        if (WARN(rem, "%s: fault copying %p <- %p unwritten: %d\n",
  43                                __func__, dst, src, rem))
  44                BUG();
  45}
  46
  47static inline int arch_memcpy_from_pmem(void *dst, const void *src, size_t n)
  48{
  49        return memcpy_mcsafe(dst, src, n);
  50}
  51
  52/**
  53 * arch_wb_cache_pmem - write back a cache range with CLWB
  54 * @vaddr:      virtual start address
  55 * @size:       number of bytes to write back
  56 *
  57 * Write back a cache range using the CLWB (cache line write back)
  58 * instruction.
  59 */
  60static inline void arch_wb_cache_pmem(void *addr, size_t size)
  61{
  62        u16 x86_clflush_size = boot_cpu_data.x86_clflush_size;
  63        unsigned long clflush_mask = x86_clflush_size - 1;
  64        void *vend = addr + size;
  65        void *p;
  66
  67        for (p = (void *)((unsigned long)addr & ~clflush_mask);
  68             p < vend; p += x86_clflush_size)
  69                clwb(p);
  70}
  71
  72/*
  73 * copy_from_iter_nocache() on x86 only uses non-temporal stores for iovec
  74 * iterators, so for other types (bvec & kvec) we must do a cache write-back.
  75 */
  76static inline bool __iter_needs_pmem_wb(struct iov_iter *i)
  77{
  78        return iter_is_iovec(i) == false;
  79}
  80
  81/**
  82 * arch_copy_from_iter_pmem - copy data from an iterator to PMEM
  83 * @addr:       PMEM destination address
  84 * @bytes:      number of bytes to copy
  85 * @i:          iterator with source data
  86 *
  87 * Copy data from the iterator 'i' to the PMEM buffer starting at 'addr'.
  88 */
  89static inline size_t arch_copy_from_iter_pmem(void *addr, size_t bytes,
  90                struct iov_iter *i)
  91{
  92        size_t len;
  93
  94        /* TODO: skip the write-back by always using non-temporal stores */
  95        len = copy_from_iter_nocache(addr, bytes, i);
  96
  97        if (__iter_needs_pmem_wb(i))
  98                arch_wb_cache_pmem(addr, bytes);
  99
 100        return len;
 101}
 102
 103/**
 104 * arch_clear_pmem - zero a PMEM memory range
 105 * @addr:       virtual start address
 106 * @size:       number of bytes to zero
 107 *
 108 * Write zeros into the memory range starting at 'addr' for 'size' bytes.
 109 */
 110static inline void arch_clear_pmem(void *addr, size_t size)
 111{
 112        memset(addr, 0, size);
 113        arch_wb_cache_pmem(addr, size);
 114}
 115
 116static inline void arch_invalidate_pmem(void *addr, size_t size)
 117{
 118        clflush_cache_range(addr, size);
 119}
 120#endif /* CONFIG_ARCH_HAS_PMEM_API */
 121#endif /* __ASM_X86_PMEM_H__ */
 122