LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22#include <engine/falcon.h>
  23
  24#include <core/gpuobj.h>
  25#include <subdev/timer.h>
  26#include <engine/fifo.h>
  27
  28static int
  29nvkm_falcon_oclass_get(struct nvkm_oclass *oclass, int index)
  30{
  31        struct nvkm_falcon *falcon = nvkm_falcon(oclass->engine);
  32        int c = 0;
  33
  34        while (falcon->func->sclass[c].oclass) {
  35                if (c++ == index) {
  36                        oclass->base = falcon->func->sclass[index];
  37                        return index;
  38                }
  39        }
  40
  41        return c;
  42}
  43
  44static int
  45nvkm_falcon_cclass_bind(struct nvkm_object *object, struct nvkm_gpuobj *parent,
  46                        int align, struct nvkm_gpuobj **pgpuobj)
  47{
  48        return nvkm_gpuobj_new(object->engine->subdev.device, 256,
  49                               align, true, parent, pgpuobj);
  50}
  51
  52static const struct nvkm_object_func
  53nvkm_falcon_cclass = {
  54        .bind = nvkm_falcon_cclass_bind,
  55};
  56
  57static void
  58nvkm_falcon_intr(struct nvkm_engine *engine)
  59{
  60        struct nvkm_falcon *falcon = nvkm_falcon(engine);
  61        struct nvkm_subdev *subdev = &falcon->engine.subdev;
  62        struct nvkm_device *device = subdev->device;
  63        const u32 base = falcon->addr;
  64        u32 dest = nvkm_rd32(device, base + 0x01c);
  65        u32 intr = nvkm_rd32(device, base + 0x008) & dest & ~(dest >> 16);
  66        u32 inst = nvkm_rd32(device, base + 0x050) & 0x3fffffff;
  67        struct nvkm_fifo_chan *chan;
  68        unsigned long flags;
  69
  70        chan = nvkm_fifo_chan_inst(device->fifo, (u64)inst << 12, &flags);
  71
  72        if (intr & 0x00000040) {
  73                if (falcon->func->intr) {
  74                        falcon->func->intr(falcon, chan);
  75                        nvkm_wr32(device, base + 0x004, 0x00000040);
  76                        intr &= ~0x00000040;
  77                }
  78        }
  79
  80        if (intr & 0x00000010) {
  81                nvkm_debug(subdev, "ucode halted\n");
  82                nvkm_wr32(device, base + 0x004, 0x00000010);
  83                intr &= ~0x00000010;
  84        }
  85
  86        if (intr)  {
  87                nvkm_error(subdev, "intr %08x\n", intr);
  88                nvkm_wr32(device, base + 0x004, intr);
  89        }
  90
  91        nvkm_fifo_chan_put(device->fifo, flags, &chan);
  92}
  93
  94static int
  95nvkm_falcon_fini(struct nvkm_engine *engine, bool suspend)
  96{
  97        struct nvkm_falcon *falcon = nvkm_falcon(engine);
  98        struct nvkm_device *device = falcon->engine.subdev.device;
  99        const u32 base = falcon->addr;
 100
 101        if (!suspend) {
 102                nvkm_memory_del(&falcon->core);
 103                if (falcon->external) {
 104                        vfree(falcon->data.data);
 105                        vfree(falcon->code.data);
 106                        falcon->code.data = NULL;
 107                }
 108        }
 109
 110        nvkm_mask(device, base + 0x048, 0x00000003, 0x00000000);
 111        nvkm_wr32(device, base + 0x014, 0xffffffff);
 112        return 0;
 113}
 114
 115static void *
 116vmemdup(const void *src, size_t len)
 117{
 118        void *p = vmalloc(len);
 119
 120        if (p)
 121                memcpy(p, src, len);
 122        return p;
 123}
 124
 125static int
 126nvkm_falcon_oneinit(struct nvkm_engine *engine)
 127{
 128        struct nvkm_falcon *falcon = nvkm_falcon(engine);
 129        struct nvkm_subdev *subdev = &falcon->engine.subdev;
 130        struct nvkm_device *device = subdev->device;
 131        const u32 base = falcon->addr;
 132        u32 caps;
 133
 134        /* determine falcon capabilities */
 135        if (device->chipset <  0xa3 ||
 136            device->chipset == 0xaa || device->chipset == 0xac) {
 137                falcon->version = 0;
 138                falcon->secret  = (falcon->addr == 0x087000) ? 1 : 0;
 139        } else {
 140                caps = nvkm_rd32(device, base + 0x12c);
 141                falcon->version = (caps & 0x0000000f);
 142                falcon->secret  = (caps & 0x00000030) >> 4;
 143        }
 144
 145        caps = nvkm_rd32(device, base + 0x108);
 146        falcon->code.limit = (caps & 0x000001ff) << 8;
 147        falcon->data.limit = (caps & 0x0003fe00) >> 1;
 148
 149        nvkm_debug(subdev, "falcon version: %d\n", falcon->version);
 150        nvkm_debug(subdev, "secret level: %d\n", falcon->secret);
 151        nvkm_debug(subdev, "code limit: %d\n", falcon->code.limit);
 152        nvkm_debug(subdev, "data limit: %d\n", falcon->data.limit);
 153        return 0;
 154}
 155
 156static int
 157nvkm_falcon_init(struct nvkm_engine *engine)
 158{
 159        struct nvkm_falcon *falcon = nvkm_falcon(engine);
 160        struct nvkm_subdev *subdev = &falcon->engine.subdev;
 161        struct nvkm_device *device = subdev->device;
 162        const struct firmware *fw;
 163        char name[32] = "internal";
 164        const u32 base = falcon->addr;
 165        int ret, i;
 166
 167        /* wait for 'uc halted' to be signalled before continuing */
 168        if (falcon->secret && falcon->version < 4) {
 169                if (!falcon->version) {
 170                        nvkm_msec(device, 2000,
 171                                if (nvkm_rd32(device, base + 0x008) & 0x00000010)
 172                                        break;
 173                        );
 174                } else {
 175                        nvkm_msec(device, 2000,
 176                                if (!(nvkm_rd32(device, base + 0x180) & 0x80000000))
 177                                        break;
 178                        );
 179                }
 180                nvkm_wr32(device, base + 0x004, 0x00000010);
 181        }
 182
 183        /* disable all interrupts */
 184        nvkm_wr32(device, base + 0x014, 0xffffffff);
 185
 186        /* no default ucode provided by the engine implementation, try and
 187         * locate a "self-bootstrapping" firmware image for the engine
 188         */
 189        if (!falcon->code.data) {
 190                snprintf(name, sizeof(name), "nouveau/nv%02x_fuc%03x",
 191                         device->chipset, falcon->addr >> 12);
 192
 193                ret = request_firmware(&fw, name, device->dev);
 194                if (ret == 0) {
 195                        falcon->code.data = vmemdup(fw->data, fw->size);
 196                        falcon->code.size = fw->size;
 197                        falcon->data.data = NULL;
 198                        falcon->data.size = 0;
 199                        release_firmware(fw);
 200                }
 201
 202                falcon->external = true;
 203        }
 204
 205        /* next step is to try and load "static code/data segment" firmware
 206         * images for the engine
 207         */
 208        if (!falcon->code.data) {
 209                snprintf(name, sizeof(name), "nouveau/nv%02x_fuc%03xd",
 210                         device->chipset, falcon->addr >> 12);
 211
 212                ret = request_firmware(&fw, name, device->dev);
 213                if (ret) {
 214                        nvkm_error(subdev, "unable to load firmware data\n");
 215                        return -ENODEV;
 216                }
 217
 218                falcon->data.data = vmemdup(fw->data, fw->size);
 219                falcon->data.size = fw->size;
 220                release_firmware(fw);
 221                if (!falcon->data.data)
 222                        return -ENOMEM;
 223
 224                snprintf(name, sizeof(name), "nouveau/nv%02x_fuc%03xc",
 225                         device->chipset, falcon->addr >> 12);
 226
 227                ret = request_firmware(&fw, name, device->dev);
 228                if (ret) {
 229                        nvkm_error(subdev, "unable to load firmware code\n");
 230                        return -ENODEV;
 231                }
 232
 233                falcon->code.data = vmemdup(fw->data, fw->size);
 234                falcon->code.size = fw->size;
 235                release_firmware(fw);
 236                if (!falcon->code.data)
 237                        return -ENOMEM;
 238        }
 239
 240        nvkm_debug(subdev, "firmware: %s (%s)\n", name, falcon->data.data ?
 241                   "static code/data segments" : "self-bootstrapping");
 242
 243        /* ensure any "self-bootstrapping" firmware image is in vram */
 244        if (!falcon->data.data && !falcon->core) {
 245                ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST,
 246                                      falcon->code.size, 256, false,
 247                                      &falcon->core);
 248                if (ret) {
 249                        nvkm_error(subdev, "core allocation failed, %d\n", ret);
 250                        return ret;
 251                }
 252
 253                nvkm_kmap(falcon->core);
 254                for (i = 0; i < falcon->code.size; i += 4)
 255                        nvkm_wo32(falcon->core, i, falcon->code.data[i / 4]);
 256                nvkm_done(falcon->core);
 257        }
 258
 259        /* upload firmware bootloader (or the full code segments) */
 260        if (falcon->core) {
 261                u64 addr = nvkm_memory_addr(falcon->core);
 262                if (device->card_type < NV_C0)
 263                        nvkm_wr32(device, base + 0x618, 0x04000000);
 264                else
 265                        nvkm_wr32(device, base + 0x618, 0x00000114);
 266                nvkm_wr32(device, base + 0x11c, 0);
 267                nvkm_wr32(device, base + 0x110, addr >> 8);
 268                nvkm_wr32(device, base + 0x114, 0);
 269                nvkm_wr32(device, base + 0x118, 0x00006610);
 270        } else {
 271                if (falcon->code.size > falcon->code.limit ||
 272                    falcon->data.size > falcon->data.limit) {
 273                        nvkm_error(subdev, "ucode exceeds falcon limit(s)\n");
 274                        return -EINVAL;
 275                }
 276
 277                if (falcon->version < 3) {
 278                        nvkm_wr32(device, base + 0xff8, 0x00100000);
 279                        for (i = 0; i < falcon->code.size / 4; i++)
 280                                nvkm_wr32(device, base + 0xff4, falcon->code.data[i]);
 281                } else {
 282                        nvkm_wr32(device, base + 0x180, 0x01000000);
 283                        for (i = 0; i < falcon->code.size / 4; i++) {
 284                                if ((i & 0x3f) == 0)
 285                                        nvkm_wr32(device, base + 0x188, i >> 6);
 286                                nvkm_wr32(device, base + 0x184, falcon->code.data[i]);
 287                        }
 288                }
 289        }
 290
 291        /* upload data segment (if necessary), zeroing the remainder */
 292        if (falcon->version < 3) {
 293                nvkm_wr32(device, base + 0xff8, 0x00000000);
 294                for (i = 0; !falcon->core && i < falcon->data.size / 4; i++)
 295                        nvkm_wr32(device, base + 0xff4, falcon->data.data[i]);
 296                for (; i < falcon->data.limit; i += 4)
 297                        nvkm_wr32(device, base + 0xff4, 0x00000000);
 298        } else {
 299                nvkm_wr32(device, base + 0x1c0, 0x01000000);
 300                for (i = 0; !falcon->core && i < falcon->data.size / 4; i++)
 301                        nvkm_wr32(device, base + 0x1c4, falcon->data.data[i]);
 302                for (; i < falcon->data.limit / 4; i++)
 303                        nvkm_wr32(device, base + 0x1c4, 0x00000000);
 304        }
 305
 306        /* start it running */
 307        nvkm_wr32(device, base + 0x10c, 0x00000001); /* BLOCK_ON_FIFO */
 308        nvkm_wr32(device, base + 0x104, 0x00000000); /* ENTRY */
 309        nvkm_wr32(device, base + 0x100, 0x00000002); /* TRIGGER */
 310        nvkm_wr32(device, base + 0x048, 0x00000003); /* FIFO | CHSW */
 311
 312        if (falcon->func->init)
 313                falcon->func->init(falcon);
 314        return 0;
 315}
 316
 317static void *
 318nvkm_falcon_dtor(struct nvkm_engine *engine)
 319{
 320        return nvkm_falcon(engine);
 321}
 322
 323static const struct nvkm_engine_func
 324nvkm_falcon = {
 325        .dtor = nvkm_falcon_dtor,
 326        .oneinit = nvkm_falcon_oneinit,
 327        .init = nvkm_falcon_init,
 328        .fini = nvkm_falcon_fini,
 329        .intr = nvkm_falcon_intr,
 330        .fifo.sclass = nvkm_falcon_oclass_get,
 331        .cclass = &nvkm_falcon_cclass,
 332};
 333
 334int
 335nvkm_falcon_new_(const struct nvkm_falcon_func *func,
 336                 struct nvkm_device *device, int index, bool enable,
 337                 u32 addr, struct nvkm_engine **pengine)
 338{
 339        struct nvkm_falcon *falcon;
 340
 341        if (!(falcon = kzalloc(sizeof(*falcon), GFP_KERNEL)))
 342                return -ENOMEM;
 343        falcon->func = func;
 344        falcon->addr = addr;
 345        falcon->code.data = func->code.data;
 346        falcon->code.size = func->code.size;
 347        falcon->data.data = func->data.data;
 348        falcon->data.size = func->data.size;
 349        *pengine = &falcon->engine;
 350
 351        return nvkm_engine_ctor(&nvkm_falcon, device, index,
 352                                enable, &falcon->engine);
 353}
 354