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35#ifndef I40IW_IW_H
36#define I40IW_IW_H
37#include <linux/netdevice.h>
38#include <linux/inetdevice.h>
39#include <linux/spinlock.h>
40#include <linux/kernel.h>
41#include <linux/delay.h>
42#include <linux/pci.h>
43#include <linux/dma-mapping.h>
44#include <linux/workqueue.h>
45#include <linux/slab.h>
46#include <linux/io.h>
47#include <linux/crc32c.h>
48#include <rdma/ib_smi.h>
49#include <rdma/ib_verbs.h>
50#include <rdma/ib_pack.h>
51#include <rdma/rdma_cm.h>
52#include <rdma/iw_cm.h>
53#include <crypto/hash.h>
54
55#include "i40iw_status.h"
56#include "i40iw_osdep.h"
57#include "i40iw_d.h"
58#include "i40iw_hmc.h"
59
60#include <i40e_client.h>
61#include "i40iw_type.h"
62#include "i40iw_p.h"
63#include "i40iw_ucontext.h"
64#include "i40iw_pble.h"
65#include "i40iw_verbs.h"
66#include "i40iw_cm.h"
67#include "i40iw_user.h"
68#include "i40iw_puda.h"
69
70#define I40IW_FW_VERSION 2
71#define I40IW_HW_VERSION 2
72
73#define I40IW_ARP_ADD 1
74#define I40IW_ARP_DELETE 2
75#define I40IW_ARP_RESOLVE 3
76
77#define I40IW_MACIP_ADD 1
78#define I40IW_MACIP_DELETE 2
79
80#define IW_CCQ_SIZE (I40IW_CQP_SW_SQSIZE_2048 + 1)
81#define IW_CEQ_SIZE 2048
82#define IW_AEQ_SIZE 2048
83
84#define RX_BUF_SIZE (1536 + 8)
85#define IW_REG0_SIZE (4 * 1024)
86#define IW_TX_TIMEOUT (6 * HZ)
87#define IW_FIRST_QPN 1
88#define IW_SW_CONTEXT_ALIGN 1024
89
90#define MAX_DPC_ITERATIONS 128
91
92#define I40IW_EVENT_TIMEOUT 100000
93#define I40IW_VCHNL_EVENT_TIMEOUT 100000
94
95#define I40IW_NO_VLAN 0xffff
96#define I40IW_NO_QSET 0xffff
97
98
99#define IW_ADD_MCAST false
100#define IW_DEL_MCAST true
101
102#define I40IW_DRV_OPT_ENABLE_MPA_VER_0 0x00000001
103#define I40IW_DRV_OPT_DISABLE_MPA_CRC 0x00000002
104#define I40IW_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
105#define I40IW_DRV_OPT_DISABLE_INTF 0x00000008
106#define I40IW_DRV_OPT_ENABLE_MSI 0x00000010
107#define I40IW_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
108#define I40IW_DRV_OPT_NO_INLINE_DATA 0x00000080
109#define I40IW_DRV_OPT_DISABLE_INT_MOD 0x00000100
110#define I40IW_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
111#define I40IW_DRV_OPT_ENABLE_PAU 0x00000400
112#define I40IW_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
113
114#define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
115#define IW_CFG_FPM_QP_COUNT 32768
116#define I40IW_MAX_PAGES_PER_FMR 512
117#define I40IW_MIN_PAGES_PER_FMR 1
118
119#define I40IW_MTU_TO_MSS 40
120#define I40IW_DEFAULT_MSS 1460
121
122struct i40iw_cqp_compl_info {
123 u32 op_ret_val;
124 u16 maj_err_code;
125 u16 min_err_code;
126 bool error;
127 u8 op_code;
128};
129
130#define i40iw_pr_err(fmt, args ...) pr_err("%s: "fmt, __func__, ## args)
131
132#define i40iw_pr_info(fmt, args ...) pr_info("%s: " fmt, __func__, ## args)
133
134#define i40iw_pr_warn(fmt, args ...) pr_warn("%s: " fmt, __func__, ## args)
135
136struct i40iw_cqp_request {
137 struct cqp_commands_info info;
138 wait_queue_head_t waitq;
139 struct list_head list;
140 atomic_t refcount;
141 void (*callback_fcn)(struct i40iw_cqp_request*, u32);
142 void *param;
143 struct i40iw_cqp_compl_info compl_info;
144 bool waiting;
145 bool request_done;
146 bool dynamic;
147};
148
149struct i40iw_cqp {
150 struct i40iw_sc_cqp sc_cqp;
151 spinlock_t req_lock;
152 wait_queue_head_t waitq;
153 struct i40iw_dma_mem sq;
154 struct i40iw_dma_mem host_ctx;
155 u64 *scratch_array;
156 struct i40iw_cqp_request *cqp_requests;
157 struct list_head cqp_avail_reqs;
158 struct list_head cqp_pending_reqs;
159};
160
161struct i40iw_device;
162
163struct i40iw_ccq {
164 struct i40iw_sc_cq sc_cq;
165 spinlock_t lock;
166 wait_queue_head_t waitq;
167 struct i40iw_dma_mem mem_cq;
168 struct i40iw_dma_mem shadow_area;
169};
170
171struct i40iw_ceq {
172 struct i40iw_sc_ceq sc_ceq;
173 struct i40iw_dma_mem mem;
174 u32 irq;
175 u32 msix_idx;
176 struct i40iw_device *iwdev;
177 struct tasklet_struct dpc_tasklet;
178};
179
180struct i40iw_aeq {
181 struct i40iw_sc_aeq sc_aeq;
182 struct i40iw_dma_mem mem;
183};
184
185struct i40iw_arp_entry {
186 u32 ip_addr[4];
187 u8 mac_addr[ETH_ALEN];
188};
189
190enum init_completion_state {
191 INVALID_STATE = 0,
192 INITIAL_STATE,
193 CQP_CREATED,
194 HMC_OBJS_CREATED,
195 PBLE_CHUNK_MEM,
196 CCQ_CREATED,
197 AEQ_CREATED,
198 CEQ_CREATED,
199 ILQ_CREATED,
200 IEQ_CREATED,
201 INET_NOTIFIER,
202 IP_ADDR_REGISTERED,
203 RDMA_DEV_REGISTERED
204};
205
206struct i40iw_msix_vector {
207 u32 idx;
208 u32 irq;
209 u32 cpu_affinity;
210 u32 ceq_id;
211};
212
213#define I40IW_MSIX_TABLE_SIZE 65
214
215struct virtchnl_work {
216 struct work_struct work;
217 union {
218 struct i40iw_cqp_request *cqp_request;
219 struct i40iw_virtchnl_work_info work_info;
220 };
221};
222
223struct i40e_qvlist_info;
224
225struct i40iw_device {
226 struct i40iw_ib_device *iwibdev;
227 struct net_device *netdev;
228 wait_queue_head_t vchnl_waitq;
229 struct i40iw_sc_dev sc_dev;
230 struct i40iw_handler *hdl;
231 struct i40e_info *ldev;
232 struct i40e_client *client;
233 struct i40iw_hw hw;
234 struct i40iw_cm_core cm_core;
235 u8 *mem_resources;
236 unsigned long *allocated_qps;
237 unsigned long *allocated_cqs;
238 unsigned long *allocated_mrs;
239 unsigned long *allocated_pds;
240 unsigned long *allocated_arps;
241 struct i40iw_qp **qp_table;
242 bool msix_shared;
243 u32 msix_count;
244 struct i40iw_msix_vector *iw_msixtbl;
245 struct i40e_qvlist_info *iw_qvlist;
246
247 struct i40iw_hmc_pble_rsrc *pble_rsrc;
248 struct i40iw_arp_entry *arp_table;
249 struct i40iw_cqp cqp;
250 struct i40iw_ccq ccq;
251 u32 ceqs_count;
252 struct i40iw_ceq *ceqlist;
253 struct i40iw_aeq aeq;
254 u32 arp_table_size;
255 u32 next_arp_index;
256 spinlock_t resource_lock;
257 spinlock_t qptable_lock;
258 u32 vendor_id;
259 u32 vendor_part_id;
260 u32 of_device_registered;
261
262 u32 device_cap_flags;
263 unsigned long db_start;
264 u8 resource_profile;
265 u8 max_rdma_vfs;
266 u8 max_enabled_vfs;
267 u8 max_sge;
268 u8 iw_status;
269 u8 send_term_ok;
270 bool push_mode;
271
272
273 struct mutex pbl_mutex;
274 struct tasklet_struct dpc_tasklet;
275 struct workqueue_struct *virtchnl_wq;
276 struct virtchnl_work virtchnl_w[I40IW_MAX_PE_ENABLED_VF_COUNT];
277 struct i40iw_dma_mem obj_mem;
278 struct i40iw_dma_mem obj_next;
279 u8 *hmc_info_mem;
280 u32 sd_type;
281 struct workqueue_struct *param_wq;
282 atomic_t params_busy;
283 u32 mss;
284 enum init_completion_state init_state;
285 u16 mac_ip_table_idx;
286 atomic_t vchnl_msgs;
287 u32 max_mr;
288 u32 max_qp;
289 u32 max_cq;
290 u32 max_pd;
291 u32 next_qp;
292 u32 next_cq;
293 u32 next_pd;
294 u32 max_mr_size;
295 u32 max_qp_wr;
296 u32 max_cqe;
297 u32 mr_stagmask;
298 u32 mpa_version;
299 bool dcb;
300};
301
302struct i40iw_ib_device {
303 struct ib_device ibdev;
304 struct i40iw_device *iwdev;
305};
306
307struct i40iw_handler {
308 struct list_head list;
309 struct i40e_client *client;
310 struct i40iw_device device;
311 struct i40e_info ldev;
312};
313
314
315
316
317
318static inline struct i40iw_device *to_iwdev(struct ib_device *ibdev)
319{
320 return container_of(ibdev, struct i40iw_ib_device, ibdev)->iwdev;
321}
322
323
324
325
326
327static inline struct i40iw_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
328{
329 return container_of(ibucontext, struct i40iw_ucontext, ibucontext);
330}
331
332
333
334
335
336static inline struct i40iw_pd *to_iwpd(struct ib_pd *ibpd)
337{
338 return container_of(ibpd, struct i40iw_pd, ibpd);
339}
340
341
342
343
344
345static inline struct i40iw_mr *to_iwmr(struct ib_mr *ibmr)
346{
347 return container_of(ibmr, struct i40iw_mr, ibmr);
348}
349
350
351
352
353
354static inline struct i40iw_mr *to_iwmr_from_ibfmr(struct ib_fmr *ibfmr)
355{
356 return container_of(ibfmr, struct i40iw_mr, ibfmr);
357}
358
359
360
361
362
363static inline struct i40iw_mr *to_iwmw(struct ib_mw *ibmw)
364{
365 return container_of(ibmw, struct i40iw_mr, ibmw);
366}
367
368
369
370
371
372static inline struct i40iw_cq *to_iwcq(struct ib_cq *ibcq)
373{
374 return container_of(ibcq, struct i40iw_cq, ibcq);
375}
376
377
378
379
380
381static inline struct i40iw_qp *to_iwqp(struct ib_qp *ibqp)
382{
383 return container_of(ibqp, struct i40iw_qp, ibqp);
384}
385
386
387void i40iw_add_ref(struct ib_qp *);
388void i40iw_rem_ref(struct ib_qp *);
389struct ib_qp *i40iw_get_qp(struct ib_device *, int);
390
391void i40iw_flush_wqes(struct i40iw_device *iwdev,
392 struct i40iw_qp *qp);
393
394void i40iw_manage_arp_cache(struct i40iw_device *iwdev,
395 unsigned char *mac_addr,
396 u32 *ip_addr,
397 bool ipv4,
398 u32 action);
399
400int i40iw_manage_apbvt(struct i40iw_device *iwdev,
401 u16 accel_local_port,
402 bool add_port);
403
404struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait);
405void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
406void i40iw_put_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
407
408
409
410
411
412
413
414
415
416static inline int i40iw_alloc_resource(struct i40iw_device *iwdev,
417 unsigned long *resource_array,
418 u32 max_resources,
419 u32 *req_resource_num,
420 u32 *next)
421{
422 u32 resource_num;
423 unsigned long flags;
424
425 spin_lock_irqsave(&iwdev->resource_lock, flags);
426 resource_num = find_next_zero_bit(resource_array, max_resources, *next);
427 if (resource_num >= max_resources) {
428 resource_num = find_first_zero_bit(resource_array, max_resources);
429 if (resource_num >= max_resources) {
430 spin_unlock_irqrestore(&iwdev->resource_lock, flags);
431 return -EOVERFLOW;
432 }
433 }
434 set_bit(resource_num, resource_array);
435 *next = resource_num + 1;
436 if (*next == max_resources)
437 *next = 0;
438 *req_resource_num = resource_num;
439 spin_unlock_irqrestore(&iwdev->resource_lock, flags);
440
441 return 0;
442}
443
444
445
446
447
448
449
450
451static inline bool i40iw_is_resource_allocated(struct i40iw_device *iwdev,
452 unsigned long *resource_array,
453 u32 resource_num)
454{
455 bool bit_is_set;
456 unsigned long flags;
457
458 spin_lock_irqsave(&iwdev->resource_lock, flags);
459
460 bit_is_set = test_bit(resource_num, resource_array);
461 spin_unlock_irqrestore(&iwdev->resource_lock, flags);
462
463 return bit_is_set;
464}
465
466
467
468
469
470
471
472static inline void i40iw_free_resource(struct i40iw_device *iwdev,
473 unsigned long *resource_array,
474 u32 resource_num)
475{
476 unsigned long flags;
477
478 spin_lock_irqsave(&iwdev->resource_lock, flags);
479 clear_bit(resource_num, resource_array);
480 spin_unlock_irqrestore(&iwdev->resource_lock, flags);
481}
482
483
484
485
486
487static inline struct i40iw_handler *to_iwhdl(struct i40iw_device *iw_dev)
488{
489 return container_of(iw_dev, struct i40iw_handler, device);
490}
491
492struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev);
493
494
495
496
497u32 i40iw_initialize_hw_resources(struct i40iw_device *iwdev);
498
499int i40iw_register_rdma_device(struct i40iw_device *iwdev);
500void i40iw_port_ibevent(struct i40iw_device *iwdev);
501int i40iw_cm_disconn(struct i40iw_qp *);
502void i40iw_cm_disconn_worker(void *);
503int mini_cm_recv_pkt(struct i40iw_cm_core *, struct i40iw_device *,
504 struct sk_buff *);
505
506enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
507 struct i40iw_cqp_request *cqp_request);
508enum i40iw_status_code i40iw_add_mac_addr(struct i40iw_device *iwdev,
509 u8 *mac_addr, u8 *mac_index);
510int i40iw_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
511
512void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev);
513void i40iw_add_pdusecount(struct i40iw_pd *iwpd);
514void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
515 struct i40iw_modify_qp_info *info, bool wait);
516
517enum i40iw_status_code i40iw_manage_qhash(struct i40iw_device *iwdev,
518 struct i40iw_cm_info *cminfo,
519 enum i40iw_quad_entry_type etype,
520 enum i40iw_quad_hash_manage_type mtype,
521 void *cmnode,
522 bool wait);
523void i40iw_receive_ilq(struct i40iw_sc_dev *dev, struct i40iw_puda_buf *rbuf);
524void i40iw_free_sqbuf(struct i40iw_sc_dev *dev, void *bufp);
525void i40iw_free_qp_resources(struct i40iw_device *iwdev,
526 struct i40iw_qp *iwqp,
527 u32 qp_num);
528enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
529 struct i40iw_dma_mem *memptr,
530 u32 size, u32 mask);
531
532void i40iw_request_reset(struct i40iw_device *iwdev);
533void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev);
534void i40iw_setup_cm_core(struct i40iw_device *iwdev);
535void i40iw_cleanup_cm_core(struct i40iw_cm_core *cm_core);
536void i40iw_process_ceq(struct i40iw_device *, struct i40iw_ceq *iwceq);
537void i40iw_process_aeq(struct i40iw_device *);
538void i40iw_next_iw_state(struct i40iw_qp *iwqp,
539 u8 state, u8 del_hash,
540 u8 term, u8 term_len);
541int i40iw_send_syn(struct i40iw_cm_node *cm_node, u32 sendack);
542struct i40iw_cm_node *i40iw_find_node(struct i40iw_cm_core *cm_core,
543 u16 rem_port,
544 u32 *rem_addr,
545 u16 loc_port,
546 u32 *loc_addr,
547 bool add_refcnt);
548
549enum i40iw_status_code i40iw_hw_flush_wqes(struct i40iw_device *iwdev,
550 struct i40iw_sc_qp *qp,
551 struct i40iw_qp_flush_info *info,
552 bool wait);
553
554void i40iw_copy_ip_ntohl(u32 *dst, __be32 *src);
555struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *ib_pd,
556 u64 addr,
557 u64 size,
558 int acc,
559 u64 *iova_start);
560
561int i40iw_inetaddr_event(struct notifier_block *notifier,
562 unsigned long event,
563 void *ptr);
564int i40iw_inet6addr_event(struct notifier_block *notifier,
565 unsigned long event,
566 void *ptr);
567int i40iw_net_event(struct notifier_block *notifier,
568 unsigned long event,
569 void *ptr);
570
571#endif
572
