linux/drivers/media/pci/cobalt/cobalt-irq.c
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   1/*
   2 *  cobalt interrupt handling
   3 *
   4 *  Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
   5 *  All rights reserved.
   6 *
   7 *  This program is free software; you may redistribute it and/or modify
   8 *  it under the terms of the GNU General Public License as published by
   9 *  the Free Software Foundation; version 2 of the License.
  10 *
  11 *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  12 *  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  13 *  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  14 *  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  15 *  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  16 *  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  17 *  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  18 *  SOFTWARE.
  19 */
  20
  21#include <media/i2c/adv7604.h>
  22
  23#include "cobalt-driver.h"
  24#include "cobalt-irq.h"
  25#include "cobalt-omnitek.h"
  26
  27static void cobalt_dma_stream_queue_handler(struct cobalt_stream *s)
  28{
  29        struct cobalt *cobalt = s->cobalt;
  30        int rx = s->video_channel;
  31        struct m00473_freewheel_regmap __iomem *fw =
  32                COBALT_CVI_FREEWHEEL(s->cobalt, rx);
  33        struct m00233_video_measure_regmap __iomem *vmr =
  34                COBALT_CVI_VMR(s->cobalt, rx);
  35        struct m00389_cvi_regmap __iomem *cvi =
  36                COBALT_CVI(s->cobalt, rx);
  37        struct m00479_clk_loss_detector_regmap __iomem *clkloss =
  38                COBALT_CVI_CLK_LOSS(s->cobalt, rx);
  39        struct cobalt_buffer *cb;
  40        bool skip = false;
  41
  42        spin_lock(&s->irqlock);
  43
  44        if (list_empty(&s->bufs)) {
  45                pr_err("no buffers!\n");
  46                spin_unlock(&s->irqlock);
  47                return;
  48        }
  49
  50        /* Give the fresh filled up buffer to the user.
  51         * Note that the interrupt is only sent if the DMA can continue
  52         * with a new buffer, so it is always safe to return this buffer
  53         * to userspace. */
  54        cb = list_first_entry(&s->bufs, struct cobalt_buffer, list);
  55        list_del(&cb->list);
  56        spin_unlock(&s->irqlock);
  57
  58        if (s->is_audio || s->is_output)
  59                goto done;
  60
  61        if (s->unstable_frame) {
  62                uint32_t stat = ioread32(&vmr->irq_status);
  63
  64                iowrite32(stat, &vmr->irq_status);
  65                if (!(ioread32(&vmr->status) &
  66                      M00233_STATUS_BITMAP_INIT_DONE_MSK)) {
  67                        cobalt_dbg(1, "!init_done\n");
  68                        if (s->enable_freewheel)
  69                                goto restart_fw;
  70                        goto done;
  71                }
  72
  73                if (ioread32(&clkloss->status) &
  74                    M00479_STATUS_BITMAP_CLOCK_MISSING_MSK) {
  75                        iowrite32(0, &clkloss->ctrl);
  76                        iowrite32(M00479_CTRL_BITMAP_ENABLE_MSK, &clkloss->ctrl);
  77                        cobalt_dbg(1, "no clock\n");
  78                        if (s->enable_freewheel)
  79                                goto restart_fw;
  80                        goto done;
  81                }
  82                if ((stat & (M00233_IRQ_STATUS_BITMAP_VACTIVE_AREA_MSK |
  83                             M00233_IRQ_STATUS_BITMAP_HACTIVE_AREA_MSK)) ||
  84                                ioread32(&vmr->vactive_area) != s->timings.bt.height ||
  85                                ioread32(&vmr->hactive_area) != s->timings.bt.width) {
  86                        cobalt_dbg(1, "unstable\n");
  87                        if (s->enable_freewheel)
  88                                goto restart_fw;
  89                        goto done;
  90                }
  91                if (!s->enable_cvi) {
  92                        s->enable_cvi = true;
  93                        iowrite32(M00389_CONTROL_BITMAP_ENABLE_MSK, &cvi->control);
  94                        goto done;
  95                }
  96                if (!(ioread32(&cvi->status) & M00389_STATUS_BITMAP_LOCK_MSK)) {
  97                        cobalt_dbg(1, "cvi no lock\n");
  98                        if (s->enable_freewheel)
  99                                goto restart_fw;
 100                        goto done;
 101                }
 102                if (!s->enable_freewheel) {
 103                        cobalt_dbg(1, "stable\n");
 104                        s->enable_freewheel = true;
 105                        iowrite32(0, &fw->ctrl);
 106                        goto done;
 107                }
 108                cobalt_dbg(1, "enabled fw\n");
 109                iowrite32(M00233_CONTROL_BITMAP_ENABLE_MEASURE_MSK |
 110                          M00233_CONTROL_BITMAP_ENABLE_INTERRUPT_MSK,
 111                          &vmr->control);
 112                iowrite32(M00473_CTRL_BITMAP_ENABLE_MSK, &fw->ctrl);
 113                s->enable_freewheel = false;
 114                s->unstable_frame = false;
 115                s->skip_first_frames = 2;
 116                skip = true;
 117                goto done;
 118        }
 119        if (ioread32(&fw->status) & M00473_STATUS_BITMAP_FREEWHEEL_MODE_MSK) {
 120restart_fw:
 121                cobalt_dbg(1, "lost lock\n");
 122                iowrite32(M00233_CONTROL_BITMAP_ENABLE_MEASURE_MSK,
 123                          &vmr->control);
 124                iowrite32(M00473_CTRL_BITMAP_ENABLE_MSK |
 125                          M00473_CTRL_BITMAP_FORCE_FREEWHEEL_MODE_MSK,
 126                          &fw->ctrl);
 127                iowrite32(0, &cvi->control);
 128                s->unstable_frame = true;
 129                s->enable_freewheel = false;
 130                s->enable_cvi = false;
 131        }
 132done:
 133        if (s->skip_first_frames) {
 134                skip = true;
 135                s->skip_first_frames--;
 136        }
 137        cb->vb.vb2_buf.timestamp = ktime_get_ns();
 138        /* TODO: the sequence number should be read from the FPGA so we
 139           also know about dropped frames. */
 140        cb->vb.sequence = s->sequence++;
 141        vb2_buffer_done(&cb->vb.vb2_buf,
 142                        (skip || s->unstable_frame) ?
 143                        VB2_BUF_STATE_REQUEUEING : VB2_BUF_STATE_DONE);
 144}
 145
 146irqreturn_t cobalt_irq_handler(int irq, void *dev_id)
 147{
 148        struct cobalt *cobalt = (struct cobalt *)dev_id;
 149        u32 dma_interrupt =
 150                cobalt_read_bar0(cobalt, DMA_INTERRUPT_STATUS_REG) & 0xffff;
 151        u32 mask = cobalt_read_bar1(cobalt, COBALT_SYS_STAT_MASK);
 152        u32 edge = cobalt_read_bar1(cobalt, COBALT_SYS_STAT_EDGE);
 153        int i;
 154
 155        /* Clear DMA interrupt */
 156        cobalt_write_bar0(cobalt, DMA_INTERRUPT_STATUS_REG, dma_interrupt);
 157        cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, mask & ~edge);
 158        cobalt_write_bar1(cobalt, COBALT_SYS_STAT_EDGE, edge);
 159
 160        for (i = 0; i < COBALT_NUM_STREAMS; i++) {
 161                struct cobalt_stream *s = &cobalt->streams[i];
 162                unsigned dma_fifo_mask = s->dma_fifo_mask;
 163
 164                if (dma_interrupt & (1 << s->dma_channel)) {
 165                        cobalt->irq_dma[i]++;
 166                        /* Give fresh buffer to user and chain newly
 167                         * queued buffers */
 168                        cobalt_dma_stream_queue_handler(s);
 169                        if (!s->is_audio) {
 170                                edge &= ~dma_fifo_mask;
 171                                cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK,
 172                                                  mask & ~edge);
 173                        }
 174                }
 175                if (s->is_audio)
 176                        continue;
 177                if (edge & s->adv_irq_mask)
 178                        set_bit(COBALT_STREAM_FL_ADV_IRQ, &s->flags);
 179                if ((edge & mask & dma_fifo_mask) && vb2_is_streaming(&s->q)) {
 180                        cobalt_info("full rx FIFO %d\n", i);
 181                        cobalt->irq_full_fifo++;
 182                }
 183        }
 184
 185        queue_work(cobalt->irq_work_queues, &cobalt->irq_work_queue);
 186
 187        if (edge & mask & (COBALT_SYSSTAT_VI0_INT1_MSK |
 188                           COBALT_SYSSTAT_VI1_INT1_MSK |
 189                           COBALT_SYSSTAT_VI2_INT1_MSK |
 190                           COBALT_SYSSTAT_VI3_INT1_MSK |
 191                           COBALT_SYSSTAT_VIHSMA_INT1_MSK |
 192                           COBALT_SYSSTAT_VOHSMA_INT1_MSK))
 193                cobalt->irq_adv1++;
 194        if (edge & mask & (COBALT_SYSSTAT_VI0_INT2_MSK |
 195                           COBALT_SYSSTAT_VI1_INT2_MSK |
 196                           COBALT_SYSSTAT_VI2_INT2_MSK |
 197                           COBALT_SYSSTAT_VI3_INT2_MSK |
 198                           COBALT_SYSSTAT_VIHSMA_INT2_MSK))
 199                cobalt->irq_adv2++;
 200        if (edge & mask & COBALT_SYSSTAT_VOHSMA_INT1_MSK)
 201                cobalt->irq_advout++;
 202        if (dma_interrupt)
 203                cobalt->irq_dma_tot++;
 204        if (!(edge & mask) && !dma_interrupt)
 205                cobalt->irq_none++;
 206        dma_interrupt = cobalt_read_bar0(cobalt, DMA_INTERRUPT_STATUS_REG);
 207
 208        return IRQ_HANDLED;
 209}
 210
 211void cobalt_irq_work_handler(struct work_struct *work)
 212{
 213        struct cobalt *cobalt =
 214                container_of(work, struct cobalt, irq_work_queue);
 215        int i;
 216
 217        for (i = 0; i < COBALT_NUM_NODES; i++) {
 218                struct cobalt_stream *s = &cobalt->streams[i];
 219
 220                if (test_and_clear_bit(COBALT_STREAM_FL_ADV_IRQ, &s->flags)) {
 221                        u32 mask;
 222
 223                        v4l2_subdev_call(cobalt->streams[i].sd, core,
 224                                        interrupt_service_routine, 0, NULL);
 225                        mask = cobalt_read_bar1(cobalt, COBALT_SYS_STAT_MASK);
 226                        cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK,
 227                                mask | s->adv_irq_mask);
 228                }
 229        }
 230}
 231
 232void cobalt_irq_log_status(struct cobalt *cobalt)
 233{
 234        u32 mask;
 235        int i;
 236
 237        cobalt_info("irq: adv1=%u adv2=%u advout=%u none=%u full=%u\n",
 238                    cobalt->irq_adv1, cobalt->irq_adv2, cobalt->irq_advout,
 239                    cobalt->irq_none, cobalt->irq_full_fifo);
 240        cobalt_info("irq: dma_tot=%u (", cobalt->irq_dma_tot);
 241        for (i = 0; i < COBALT_NUM_STREAMS; i++)
 242                pr_cont("%s%u", i ? "/" : "", cobalt->irq_dma[i]);
 243        pr_cont(")\n");
 244        cobalt->irq_dma_tot = cobalt->irq_adv1 = cobalt->irq_adv2 = 0;
 245        cobalt->irq_advout = cobalt->irq_none = cobalt->irq_full_fifo = 0;
 246        memset(cobalt->irq_dma, 0, sizeof(cobalt->irq_dma));
 247
 248        mask = cobalt_read_bar1(cobalt, COBALT_SYS_STAT_MASK);
 249        cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK,
 250                        mask |
 251                        COBALT_SYSSTAT_VI0_LOST_DATA_MSK |
 252                        COBALT_SYSSTAT_VI1_LOST_DATA_MSK |
 253                        COBALT_SYSSTAT_VI2_LOST_DATA_MSK |
 254                        COBALT_SYSSTAT_VI3_LOST_DATA_MSK |
 255                        COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK |
 256                        COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK |
 257                        COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK |
 258                        COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK);
 259}
 260