linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
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   1/*
   2 * Copyright (c) 2010 Broadcom Corporation
   3 *
   4 * Permission to use, copy, modify, and/or distribute this software for any
   5 * purpose with or without fee is hereby granted, provided that the above
   6 * copyright notice and this permission notice appear in all copies.
   7 *
   8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15 */
  16
  17#include <linux/types.h>
  18#include <linux/atomic.h>
  19#include <linux/kernel.h>
  20#include <linux/kthread.h>
  21#include <linux/printk.h>
  22#include <linux/pci_ids.h>
  23#include <linux/netdevice.h>
  24#include <linux/interrupt.h>
  25#include <linux/sched.h>
  26#include <linux/mmc/sdio.h>
  27#include <linux/mmc/sdio_ids.h>
  28#include <linux/mmc/sdio_func.h>
  29#include <linux/mmc/card.h>
  30#include <linux/semaphore.h>
  31#include <linux/firmware.h>
  32#include <linux/module.h>
  33#include <linux/bcma/bcma.h>
  34#include <linux/debugfs.h>
  35#include <linux/vmalloc.h>
  36#include <asm/unaligned.h>
  37#include <defs.h>
  38#include <brcmu_wifi.h>
  39#include <brcmu_utils.h>
  40#include <brcm_hw_ids.h>
  41#include <soc.h>
  42#include "sdio.h"
  43#include "chip.h"
  44#include "firmware.h"
  45#include "core.h"
  46#include "common.h"
  47
  48#define DCMD_RESP_TIMEOUT       msecs_to_jiffies(2500)
  49#define CTL_DONE_TIMEOUT        msecs_to_jiffies(2500)
  50
  51#ifdef DEBUG
  52
  53#define BRCMF_TRAP_INFO_SIZE    80
  54
  55#define CBUF_LEN        (128)
  56
  57/* Device console log buffer state */
  58#define CONSOLE_BUFFER_MAX      2024
  59
  60struct rte_log_le {
  61        __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  62        __le32 buf_size;
  63        __le32 idx;
  64        char *_buf_compat;      /* Redundant pointer for backward compat. */
  65};
  66
  67struct rte_console {
  68        /* Virtual UART
  69         * When there is no UART (e.g. Quickturn),
  70         * the host should write a complete
  71         * input line directly into cbuf and then write
  72         * the length into vcons_in.
  73         * This may also be used when there is a real UART
  74         * (at risk of conflicting with
  75         * the real UART).  vcons_out is currently unused.
  76         */
  77        uint vcons_in;
  78        uint vcons_out;
  79
  80        /* Output (logging) buffer
  81         * Console output is written to a ring buffer log_buf at index log_idx.
  82         * The host may read the output when it sees log_idx advance.
  83         * Output will be lost if the output wraps around faster than the host
  84         * polls.
  85         */
  86        struct rte_log_le log_le;
  87
  88        /* Console input line buffer
  89         * Characters are read one at a time into cbuf
  90         * until <CR> is received, then
  91         * the buffer is processed as a command line.
  92         * Also used for virtual UART.
  93         */
  94        uint cbuf_idx;
  95        char cbuf[CBUF_LEN];
  96};
  97
  98#endif                          /* DEBUG */
  99#include <chipcommon.h>
 100
 101#include "bus.h"
 102#include "debug.h"
 103#include "tracepoint.h"
 104
 105#define TXQLEN          2048    /* bulk tx queue length */
 106#define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 107#define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 108#define PRIOMASK        7
 109
 110#define TXRETRIES       2       /* # of retries for tx frames */
 111
 112#define BRCMF_RXBOUND   50      /* Default for max rx frames in
 113                                 one scheduling */
 114
 115#define BRCMF_TXBOUND   20      /* Default for max tx frames in
 116                                 one scheduling */
 117
 118#define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 119
 120#define MEMBLOCK        2048    /* Block size used for downloading
 121                                 of dongle image */
 122#define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 123                                 biggest possible glom */
 124
 125#define BRCMF_FIRSTREAD (1 << 6)
 126
 127#define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 128
 129/* SBSDIO_DEVICE_CTL */
 130
 131/* 1: device will assert busy signal when receiving CMD53 */
 132#define SBSDIO_DEVCTL_SETBUSY           0x01
 133/* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 134#define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 135/* 1: mask all interrupts to host except the chipActive (rev 8) */
 136#define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 137/* 1: isolate internal sdio signals, put external pads in tri-state; requires
 138 * sdio bus power cycle to clear (rev 9) */
 139#define SBSDIO_DEVCTL_PADS_ISO          0x08
 140/* Force SD->SB reset mapping (rev 11) */
 141#define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 142/*   Determined by CoreControl bit */
 143#define SBSDIO_DEVCTL_RST_CORECTL       0x00
 144/*   Force backplane reset */
 145#define SBSDIO_DEVCTL_RST_BPRESET       0x10
 146/*   Force no backplane reset */
 147#define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 148
 149/* direct(mapped) cis space */
 150
 151/* MAPPED common CIS address */
 152#define SBSDIO_CIS_BASE_COMMON          0x1000
 153/* maximum bytes in one CIS */
 154#define SBSDIO_CIS_SIZE_LIMIT           0x200
 155/* cis offset addr is < 17 bits */
 156#define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 157
 158/* manfid tuple length, include tuple, link bytes */
 159#define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 160
 161#define CORE_BUS_REG(base, field) \
 162                (base + offsetof(struct sdpcmd_regs, field))
 163
 164/* SDIO function 1 register CHIPCLKCSR */
 165/* Force ALP request to backplane */
 166#define SBSDIO_FORCE_ALP                0x01
 167/* Force HT request to backplane */
 168#define SBSDIO_FORCE_HT                 0x02
 169/* Force ILP request to backplane */
 170#define SBSDIO_FORCE_ILP                0x04
 171/* Make ALP ready (power up xtal) */
 172#define SBSDIO_ALP_AVAIL_REQ            0x08
 173/* Make HT ready (power up PLL) */
 174#define SBSDIO_HT_AVAIL_REQ             0x10
 175/* Squelch clock requests from HW */
 176#define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 177/* Status: ALP is ready */
 178#define SBSDIO_ALP_AVAIL                0x40
 179/* Status: HT is ready */
 180#define SBSDIO_HT_AVAIL                 0x80
 181#define SBSDIO_CSR_MASK                 0x1F
 182#define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 183#define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 184#define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 185#define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 186#define SBSDIO_CLKAV(regval, alponly) \
 187        (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 188
 189/* intstatus */
 190#define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 191#define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 192#define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 193#define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 194#define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 195#define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 196#define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 197#define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 198#define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 199#define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 200#define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 201#define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 202#define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 203#define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 204#define I_PC            (1 << 10)       /* descriptor error */
 205#define I_PD            (1 << 11)       /* data error */
 206#define I_DE            (1 << 12)       /* Descriptor protocol Error */
 207#define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 208#define I_RO            (1 << 14)       /* Receive fifo Overflow */
 209#define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 210#define I_RI            (1 << 16)       /* Receive Interrupt */
 211#define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 212#define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 213#define I_XI            (1 << 24)       /* Transmit Interrupt */
 214#define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 215#define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 216#define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 217#define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 218#define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 219#define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 220#define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 221#define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 222#define I_DMA           (I_RI | I_XI | I_ERRORS)
 223
 224/* corecontrol */
 225#define CC_CISRDY               (1 << 0)        /* CIS Ready */
 226#define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 227#define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 228#define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 229#define CC_XMTDATAAVAIL_MODE    (1 << 4)
 230#define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 231
 232/* SDA_FRAMECTRL */
 233#define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 234#define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 235#define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 236#define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 237
 238/*
 239 * Software allocation of To SB Mailbox resources
 240 */
 241
 242/* tosbmailbox bits corresponding to intstatus bits */
 243#define SMB_NAK         (1 << 0)        /* Frame NAK */
 244#define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 245#define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 246#define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 247
 248/* tosbmailboxdata */
 249#define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 250
 251/*
 252 * Software allocation of To Host Mailbox resources
 253 */
 254
 255/* intstatus bits */
 256#define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 257#define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 258#define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 259#define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 260
 261/* tohostmailboxdata */
 262#define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 263#define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 264#define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 265#define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 266
 267#define HMB_DATA_FCDATA_MASK    0xff000000
 268#define HMB_DATA_FCDATA_SHIFT   24
 269
 270#define HMB_DATA_VERSION_MASK   0x00ff0000
 271#define HMB_DATA_VERSION_SHIFT  16
 272
 273/*
 274 * Software-defined protocol header
 275 */
 276
 277/* Current protocol version */
 278#define SDPCM_PROT_VERSION      4
 279
 280/*
 281 * Shared structure between dongle and the host.
 282 * The structure contains pointers to trap or assert information.
 283 */
 284#define SDPCM_SHARED_VERSION       0x0003
 285#define SDPCM_SHARED_VERSION_MASK  0x00FF
 286#define SDPCM_SHARED_ASSERT_BUILT  0x0100
 287#define SDPCM_SHARED_ASSERT        0x0200
 288#define SDPCM_SHARED_TRAP          0x0400
 289
 290/* Space for header read, limit for data packets */
 291#define MAX_HDR_READ    (1 << 6)
 292#define MAX_RX_DATASZ   2048
 293
 294/* Bump up limit on waiting for HT to account for first startup;
 295 * if the image is doing a CRC calculation before programming the PMU
 296 * for HT availability, it could take a couple hundred ms more, so
 297 * max out at a 1 second (1000000us).
 298 */
 299#undef PMU_MAX_TRANSITION_DLY
 300#define PMU_MAX_TRANSITION_DLY 1000000
 301
 302/* Value for ChipClockCSR during initial setup */
 303#define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 304                                        SBSDIO_ALP_AVAIL_REQ)
 305
 306/* Flags for SDH calls */
 307#define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 308
 309#define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 310                                         * when idle
 311                                         */
 312#define BRCMF_IDLE_INTERVAL     1
 313
 314#define KSO_WAIT_US 50
 315#define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 316#define BRCMF_SDIO_MAX_ACCESS_ERRORS    5
 317
 318/*
 319 * Conversion of 802.1D priority to precedence level
 320 */
 321static uint prio2prec(u32 prio)
 322{
 323        return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 324               (prio^2) : prio;
 325}
 326
 327#ifdef DEBUG
 328/* Device console log buffer state */
 329struct brcmf_console {
 330        uint count;             /* Poll interval msec counter */
 331        uint log_addr;          /* Log struct address (fixed) */
 332        struct rte_log_le log_le;       /* Log struct (host copy) */
 333        uint bufsize;           /* Size of log buffer */
 334        u8 *buf;                /* Log buffer (host copy) */
 335        uint last;              /* Last buffer read index */
 336};
 337
 338struct brcmf_trap_info {
 339        __le32          type;
 340        __le32          epc;
 341        __le32          cpsr;
 342        __le32          spsr;
 343        __le32          r0;     /* a1 */
 344        __le32          r1;     /* a2 */
 345        __le32          r2;     /* a3 */
 346        __le32          r3;     /* a4 */
 347        __le32          r4;     /* v1 */
 348        __le32          r5;     /* v2 */
 349        __le32          r6;     /* v3 */
 350        __le32          r7;     /* v4 */
 351        __le32          r8;     /* v5 */
 352        __le32          r9;     /* sb/v6 */
 353        __le32          r10;    /* sl/v7 */
 354        __le32          r11;    /* fp/v8 */
 355        __le32          r12;    /* ip */
 356        __le32          r13;    /* sp */
 357        __le32          r14;    /* lr */
 358        __le32          pc;     /* r15 */
 359};
 360#endif                          /* DEBUG */
 361
 362struct sdpcm_shared {
 363        u32 flags;
 364        u32 trap_addr;
 365        u32 assert_exp_addr;
 366        u32 assert_file_addr;
 367        u32 assert_line;
 368        u32 console_addr;       /* Address of struct rte_console */
 369        u32 msgtrace_addr;
 370        u8 tag[32];
 371        u32 brpt_addr;
 372};
 373
 374struct sdpcm_shared_le {
 375        __le32 flags;
 376        __le32 trap_addr;
 377        __le32 assert_exp_addr;
 378        __le32 assert_file_addr;
 379        __le32 assert_line;
 380        __le32 console_addr;    /* Address of struct rte_console */
 381        __le32 msgtrace_addr;
 382        u8 tag[32];
 383        __le32 brpt_addr;
 384};
 385
 386/* dongle SDIO bus specific header info */
 387struct brcmf_sdio_hdrinfo {
 388        u8 seq_num;
 389        u8 channel;
 390        u16 len;
 391        u16 len_left;
 392        u16 len_nxtfrm;
 393        u8 dat_offset;
 394        bool lastfrm;
 395        u16 tail_pad;
 396};
 397
 398/*
 399 * hold counter variables
 400 */
 401struct brcmf_sdio_count {
 402        uint intrcount;         /* Count of device interrupt callbacks */
 403        uint lastintrs;         /* Count as of last watchdog timer */
 404        uint pollcnt;           /* Count of active polls */
 405        uint regfails;          /* Count of R_REG failures */
 406        uint tx_sderrs;         /* Count of tx attempts with sd errors */
 407        uint fcqueued;          /* Tx packets that got queued */
 408        uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 409        uint rx_toolong;        /* Receive frames too long to receive */
 410        uint rxc_errors;        /* SDIO errors when reading control frames */
 411        uint rx_hdrfail;        /* SDIO errors on header reads */
 412        uint rx_badhdr;         /* Bad received headers (roosync?) */
 413        uint rx_badseq;         /* Mismatched rx sequence number */
 414        uint fc_rcvd;           /* Number of flow-control events received */
 415        uint fc_xoff;           /* Number which turned on flow-control */
 416        uint fc_xon;            /* Number which turned off flow-control */
 417        uint rxglomfail;        /* Failed deglom attempts */
 418        uint rxglomframes;      /* Number of glom frames (superframes) */
 419        uint rxglompkts;        /* Number of packets from glom frames */
 420        uint f2rxhdrs;          /* Number of header reads */
 421        uint f2rxdata;          /* Number of frame data reads */
 422        uint f2txdata;          /* Number of f2 frame writes */
 423        uint f1regdata;         /* Number of f1 register accesses */
 424        uint tickcnt;           /* Number of watchdog been schedule */
 425        ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 426        ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 427        ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 428        ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 429        ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 430};
 431
 432/* misc chip info needed by some of the routines */
 433/* Private data for SDIO bus interaction */
 434struct brcmf_sdio {
 435        struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 436        struct brcmf_chip *ci;  /* Chip info struct */
 437
 438        u32 hostintmask;        /* Copy of Host Interrupt Mask */
 439        atomic_t intstatus;     /* Intstatus bits (events) pending */
 440        atomic_t fcstate;       /* State of dongle flow-control */
 441
 442        uint blocksize;         /* Block size of SDIO transfers */
 443        uint roundup;           /* Max roundup limit */
 444
 445        struct pktq txq;        /* Queue length used for flow-control */
 446        u8 flowcontrol; /* per prio flow control bitmask */
 447        u8 tx_seq;              /* Transmit sequence number (next) */
 448        u8 tx_max;              /* Maximum transmit sequence allowed */
 449
 450        u8 *hdrbuf;             /* buffer for handling rx frame */
 451        u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 452        u8 rx_seq;              /* Receive sequence number (expected) */
 453        struct brcmf_sdio_hdrinfo cur_read;
 454                                /* info of current read frame */
 455        bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 456        bool rxpending;         /* Data frame pending in dongle */
 457
 458        uint rxbound;           /* Rx frames to read before resched */
 459        uint txbound;           /* Tx frames to send before resched */
 460        uint txminmax;
 461
 462        struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 463        struct sk_buff_head glom; /* Packet list for glommed superframe */
 464
 465        u8 *rxbuf;              /* Buffer for receiving control packets */
 466        uint rxblen;            /* Allocated length of rxbuf */
 467        u8 *rxctl;              /* Aligned pointer into rxbuf */
 468        u8 *rxctl_orig;         /* pointer for freeing rxctl */
 469        uint rxlen;             /* Length of valid data in buffer */
 470        spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 471
 472        u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 473
 474        bool intr;              /* Use interrupts */
 475        bool poll;              /* Use polling */
 476        atomic_t ipend;         /* Device interrupt is pending */
 477        uint spurious;          /* Count of spurious interrupts */
 478        uint pollrate;          /* Ticks between device polls */
 479        uint polltick;          /* Tick counter */
 480
 481#ifdef DEBUG
 482        uint console_interval;
 483        struct brcmf_console console;   /* Console output polling support */
 484        uint console_addr;      /* Console address from shared struct */
 485#endif                          /* DEBUG */
 486
 487        uint clkstate;          /* State of sd and backplane clock(s) */
 488        s32 idletime;           /* Control for activity timeout */
 489        s32 idlecount;          /* Activity timeout counter */
 490        s32 idleclock;          /* How to set bus driver when idle */
 491        bool rxflow_mode;       /* Rx flow control mode */
 492        bool rxflow;            /* Is rx flow control on */
 493        bool alp_only;          /* Don't use HT clock (ALP only) */
 494
 495        u8 *ctrl_frame_buf;
 496        u16 ctrl_frame_len;
 497        bool ctrl_frame_stat;
 498        int ctrl_frame_err;
 499
 500        spinlock_t txq_lock;            /* protect bus->txq */
 501        wait_queue_head_t ctrl_wait;
 502        wait_queue_head_t dcmd_resp_wait;
 503
 504        struct timer_list timer;
 505        struct completion watchdog_wait;
 506        struct task_struct *watchdog_tsk;
 507        bool wd_active;
 508
 509        struct workqueue_struct *brcmf_wq;
 510        struct work_struct datawork;
 511        bool dpc_triggered;
 512        bool dpc_running;
 513
 514        bool txoff;             /* Transmit flow-controlled */
 515        struct brcmf_sdio_count sdcnt;
 516        bool sr_enabled; /* SaveRestore enabled */
 517        bool sleeping;
 518
 519        u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 520        bool txglom;            /* host tx glomming enable flag */
 521        u16 head_align;         /* buffer pointer alignment */
 522        u16 sgentry_align;      /* scatter-gather buffer alignment */
 523};
 524
 525/* clkstate */
 526#define CLK_NONE        0
 527#define CLK_SDONLY      1
 528#define CLK_PENDING     2
 529#define CLK_AVAIL       3
 530
 531#ifdef DEBUG
 532static int qcount[NUMPRIO];
 533#endif                          /* DEBUG */
 534
 535#define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 536
 537#define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 538
 539/* Limit on rounding up frames */
 540static const uint max_roundup = 512;
 541
 542#define ALIGNMENT  4
 543
 544enum brcmf_sdio_frmtype {
 545        BRCMF_SDIO_FT_NORMAL,
 546        BRCMF_SDIO_FT_SUPER,
 547        BRCMF_SDIO_FT_SUB,
 548};
 549
 550#define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 551
 552/* SDIO Pad drive strength to select value mappings */
 553struct sdiod_drive_str {
 554        u8 strength;    /* Pad Drive Strength in mA */
 555        u8 sel;         /* Chip-specific select value */
 556};
 557
 558/* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 559static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 560        {32, 0x6},
 561        {26, 0x7},
 562        {22, 0x4},
 563        {16, 0x5},
 564        {12, 0x2},
 565        {8, 0x3},
 566        {4, 0x0},
 567        {0, 0x1}
 568};
 569
 570/* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 571static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 572        {6, 0x7},
 573        {5, 0x6},
 574        {4, 0x5},
 575        {3, 0x4},
 576        {2, 0x2},
 577        {1, 0x1},
 578        {0, 0x0}
 579};
 580
 581/* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 582static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 583        {3, 0x3},
 584        {2, 0x2},
 585        {1, 0x1},
 586        {0, 0x0} };
 587
 588/* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 589static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 590        {16, 0x7},
 591        {12, 0x5},
 592        {8,  0x3},
 593        {4,  0x1}
 594};
 595
 596BRCMF_FW_NVRAM_DEF(43143, "brcmfmac43143-sdio.bin", "brcmfmac43143-sdio.txt");
 597BRCMF_FW_NVRAM_DEF(43241B0, "brcmfmac43241b0-sdio.bin",
 598                   "brcmfmac43241b0-sdio.txt");
 599BRCMF_FW_NVRAM_DEF(43241B4, "brcmfmac43241b4-sdio.bin",
 600                   "brcmfmac43241b4-sdio.txt");
 601BRCMF_FW_NVRAM_DEF(43241B5, "brcmfmac43241b5-sdio.bin",
 602                   "brcmfmac43241b5-sdio.txt");
 603BRCMF_FW_NVRAM_DEF(4329, "brcmfmac4329-sdio.bin", "brcmfmac4329-sdio.txt");
 604BRCMF_FW_NVRAM_DEF(4330, "brcmfmac4330-sdio.bin", "brcmfmac4330-sdio.txt");
 605BRCMF_FW_NVRAM_DEF(4334, "brcmfmac4334-sdio.bin", "brcmfmac4334-sdio.txt");
 606BRCMF_FW_NVRAM_DEF(43340, "brcmfmac43340-sdio.bin", "brcmfmac43340-sdio.txt");
 607BRCMF_FW_NVRAM_DEF(4335, "brcmfmac4335-sdio.bin", "brcmfmac4335-sdio.txt");
 608BRCMF_FW_NVRAM_DEF(43362, "brcmfmac43362-sdio.bin", "brcmfmac43362-sdio.txt");
 609BRCMF_FW_NVRAM_DEF(4339, "brcmfmac4339-sdio.bin", "brcmfmac4339-sdio.txt");
 610BRCMF_FW_NVRAM_DEF(43430, "brcmfmac43430-sdio.bin", "brcmfmac43430-sdio.txt");
 611BRCMF_FW_NVRAM_DEF(43455, "brcmfmac43455-sdio.bin", "brcmfmac43455-sdio.txt");
 612BRCMF_FW_NVRAM_DEF(4354, "brcmfmac4354-sdio.bin", "brcmfmac4354-sdio.txt");
 613BRCMF_FW_NVRAM_DEF(4356, "brcmfmac4356-sdio.bin", "brcmfmac4356-sdio.txt");
 614
 615static struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 616        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 617        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 618        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 619        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 620        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
 621        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
 622        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 623        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 624        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
 625        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
 626        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
 627        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFF, 43430),
 628        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFFC0, 43455),
 629        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
 630        BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356)
 631};
 632
 633static void pkt_align(struct sk_buff *p, int len, int align)
 634{
 635        uint datalign;
 636        datalign = (unsigned long)(p->data);
 637        datalign = roundup(datalign, (align)) - datalign;
 638        if (datalign)
 639                skb_pull(p, datalign);
 640        __skb_trim(p, len);
 641}
 642
 643/* To check if there's window offered */
 644static bool data_ok(struct brcmf_sdio *bus)
 645{
 646        return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 647               ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 648}
 649
 650/*
 651 * Reads a register in the SDIO hardware block. This block occupies a series of
 652 * adresses on the 32 bit backplane bus.
 653 */
 654static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 655{
 656        struct brcmf_core *core;
 657        int ret;
 658
 659        core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 660        *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 661
 662        return ret;
 663}
 664
 665static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 666{
 667        struct brcmf_core *core;
 668        int ret;
 669
 670        core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 671        brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 672
 673        return ret;
 674}
 675
 676static int
 677brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 678{
 679        u8 wr_val = 0, rd_val, cmp_val, bmask;
 680        int err = 0;
 681        int err_cnt = 0;
 682        int try_cnt = 0;
 683
 684        brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 685
 686        wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 687        /* 1st KSO write goes to AOS wake up core if device is asleep  */
 688        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 689                          wr_val, &err);
 690
 691        if (on) {
 692                /* device WAKEUP through KSO:
 693                 * write bit 0 & read back until
 694                 * both bits 0 (kso bit) & 1 (dev on status) are set
 695                 */
 696                cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 697                          SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 698                bmask = cmp_val;
 699                usleep_range(2000, 3000);
 700        } else {
 701                /* Put device to sleep, turn off KSO */
 702                cmp_val = 0;
 703                /* only check for bit0, bit1(dev on status) may not
 704                 * get cleared right away
 705                 */
 706                bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 707        }
 708
 709        do {
 710                /* reliable KSO bit set/clr:
 711                 * the sdiod sleep write access is synced to PMU 32khz clk
 712                 * just one write attempt may fail,
 713                 * read it back until it matches written value
 714                 */
 715                rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 716                                           &err);
 717                if (!err) {
 718                        if ((rd_val & bmask) == cmp_val)
 719                                break;
 720                        err_cnt = 0;
 721                }
 722                /* bail out upon subsequent access errors */
 723                if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
 724                        break;
 725                udelay(KSO_WAIT_US);
 726                brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 727                                  wr_val, &err);
 728        } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 729
 730        if (try_cnt > 2)
 731                brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 732                          rd_val, err);
 733
 734        if (try_cnt > MAX_KSO_ATTEMPTS)
 735                brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 736
 737        return err;
 738}
 739
 740#define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 741
 742/* Turn backplane clock on or off */
 743static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 744{
 745        int err;
 746        u8 clkctl, clkreq, devctl;
 747        unsigned long timeout;
 748
 749        brcmf_dbg(SDIO, "Enter\n");
 750
 751        clkctl = 0;
 752
 753        if (bus->sr_enabled) {
 754                bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 755                return 0;
 756        }
 757
 758        if (on) {
 759                /* Request HT Avail */
 760                clkreq =
 761                    bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 762
 763                brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 764                                  clkreq, &err);
 765                if (err) {
 766                        brcmf_err("HT Avail request error: %d\n", err);
 767                        return -EBADE;
 768                }
 769
 770                /* Check current status */
 771                clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 772                                           SBSDIO_FUNC1_CHIPCLKCSR, &err);
 773                if (err) {
 774                        brcmf_err("HT Avail read error: %d\n", err);
 775                        return -EBADE;
 776                }
 777
 778                /* Go to pending and await interrupt if appropriate */
 779                if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 780                        /* Allow only clock-available interrupt */
 781                        devctl = brcmf_sdiod_regrb(bus->sdiodev,
 782                                                   SBSDIO_DEVICE_CTL, &err);
 783                        if (err) {
 784                                brcmf_err("Devctl error setting CA: %d\n",
 785                                          err);
 786                                return -EBADE;
 787                        }
 788
 789                        devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 790                        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 791                                          devctl, &err);
 792                        brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 793                        bus->clkstate = CLK_PENDING;
 794
 795                        return 0;
 796                } else if (bus->clkstate == CLK_PENDING) {
 797                        /* Cancel CA-only interrupt filter */
 798                        devctl = brcmf_sdiod_regrb(bus->sdiodev,
 799                                                   SBSDIO_DEVICE_CTL, &err);
 800                        devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 801                        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 802                                          devctl, &err);
 803                }
 804
 805                /* Otherwise, wait here (polling) for HT Avail */
 806                timeout = jiffies +
 807                          msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 808                while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 809                        clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 810                                                   SBSDIO_FUNC1_CHIPCLKCSR,
 811                                                   &err);
 812                        if (time_after(jiffies, timeout))
 813                                break;
 814                        else
 815                                usleep_range(5000, 10000);
 816                }
 817                if (err) {
 818                        brcmf_err("HT Avail request error: %d\n", err);
 819                        return -EBADE;
 820                }
 821                if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 822                        brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 823                                  PMU_MAX_TRANSITION_DLY, clkctl);
 824                        return -EBADE;
 825                }
 826
 827                /* Mark clock available */
 828                bus->clkstate = CLK_AVAIL;
 829                brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 830
 831#if defined(DEBUG)
 832                if (!bus->alp_only) {
 833                        if (SBSDIO_ALPONLY(clkctl))
 834                                brcmf_err("HT Clock should be on\n");
 835                }
 836#endif                          /* defined (DEBUG) */
 837
 838        } else {
 839                clkreq = 0;
 840
 841                if (bus->clkstate == CLK_PENDING) {
 842                        /* Cancel CA-only interrupt filter */
 843                        devctl = brcmf_sdiod_regrb(bus->sdiodev,
 844                                                   SBSDIO_DEVICE_CTL, &err);
 845                        devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 846                        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 847                                          devctl, &err);
 848                }
 849
 850                bus->clkstate = CLK_SDONLY;
 851                brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 852                                  clkreq, &err);
 853                brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 854                if (err) {
 855                        brcmf_err("Failed access turning clock off: %d\n",
 856                                  err);
 857                        return -EBADE;
 858                }
 859        }
 860        return 0;
 861}
 862
 863/* Change idle/active SD state */
 864static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 865{
 866        brcmf_dbg(SDIO, "Enter\n");
 867
 868        if (on)
 869                bus->clkstate = CLK_SDONLY;
 870        else
 871                bus->clkstate = CLK_NONE;
 872
 873        return 0;
 874}
 875
 876/* Transition SD and backplane clock readiness */
 877static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 878{
 879#ifdef DEBUG
 880        uint oldstate = bus->clkstate;
 881#endif                          /* DEBUG */
 882
 883        brcmf_dbg(SDIO, "Enter\n");
 884
 885        /* Early exit if we're already there */
 886        if (bus->clkstate == target)
 887                return 0;
 888
 889        switch (target) {
 890        case CLK_AVAIL:
 891                /* Make sure SD clock is available */
 892                if (bus->clkstate == CLK_NONE)
 893                        brcmf_sdio_sdclk(bus, true);
 894                /* Now request HT Avail on the backplane */
 895                brcmf_sdio_htclk(bus, true, pendok);
 896                break;
 897
 898        case CLK_SDONLY:
 899                /* Remove HT request, or bring up SD clock */
 900                if (bus->clkstate == CLK_NONE)
 901                        brcmf_sdio_sdclk(bus, true);
 902                else if (bus->clkstate == CLK_AVAIL)
 903                        brcmf_sdio_htclk(bus, false, false);
 904                else
 905                        brcmf_err("request for %d -> %d\n",
 906                                  bus->clkstate, target);
 907                break;
 908
 909        case CLK_NONE:
 910                /* Make sure to remove HT request */
 911                if (bus->clkstate == CLK_AVAIL)
 912                        brcmf_sdio_htclk(bus, false, false);
 913                /* Now remove the SD clock */
 914                brcmf_sdio_sdclk(bus, false);
 915                break;
 916        }
 917#ifdef DEBUG
 918        brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 919#endif                          /* DEBUG */
 920
 921        return 0;
 922}
 923
 924static int
 925brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 926{
 927        int err = 0;
 928        u8 clkcsr;
 929
 930        brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 931                  (sleep ? "SLEEP" : "WAKE"),
 932                  (bus->sleeping ? "SLEEP" : "WAKE"));
 933
 934        /* If SR is enabled control bus state with KSO */
 935        if (bus->sr_enabled) {
 936                /* Done if we're already in the requested state */
 937                if (sleep == bus->sleeping)
 938                        goto end;
 939
 940                /* Going to sleep */
 941                if (sleep) {
 942                        clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
 943                                                   SBSDIO_FUNC1_CHIPCLKCSR,
 944                                                   &err);
 945                        if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
 946                                brcmf_dbg(SDIO, "no clock, set ALP\n");
 947                                brcmf_sdiod_regwb(bus->sdiodev,
 948                                                  SBSDIO_FUNC1_CHIPCLKCSR,
 949                                                  SBSDIO_ALP_AVAIL_REQ, &err);
 950                        }
 951                        err = brcmf_sdio_kso_control(bus, false);
 952                } else {
 953                        err = brcmf_sdio_kso_control(bus, true);
 954                }
 955                if (err) {
 956                        brcmf_err("error while changing bus sleep state %d\n",
 957                                  err);
 958                        goto done;
 959                }
 960        }
 961
 962end:
 963        /* control clocks */
 964        if (sleep) {
 965                if (!bus->sr_enabled)
 966                        brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 967        } else {
 968                brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 969                brcmf_sdio_wd_timer(bus, true);
 970        }
 971        bus->sleeping = sleep;
 972        brcmf_dbg(SDIO, "new state %s\n",
 973                  (sleep ? "SLEEP" : "WAKE"));
 974done:
 975        brcmf_dbg(SDIO, "Exit: err=%d\n", err);
 976        return err;
 977
 978}
 979
 980#ifdef DEBUG
 981static inline bool brcmf_sdio_valid_shared_address(u32 addr)
 982{
 983        return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
 984}
 985
 986static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
 987                                 struct sdpcm_shared *sh)
 988{
 989        u32 addr = 0;
 990        int rv;
 991        u32 shaddr = 0;
 992        struct sdpcm_shared_le sh_le;
 993        __le32 addr_le;
 994
 995        sdio_claim_host(bus->sdiodev->func[1]);
 996        brcmf_sdio_bus_sleep(bus, false, false);
 997
 998        /*
 999         * Read last word in socram to determine
1000         * address of sdpcm_shared structure
1001         */
1002        shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1003        if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1004                shaddr -= bus->ci->srsize;
1005        rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1006                               (u8 *)&addr_le, 4);
1007        if (rv < 0)
1008                goto fail;
1009
1010        /*
1011         * Check if addr is valid.
1012         * NVRAM length at the end of memory should have been overwritten.
1013         */
1014        addr = le32_to_cpu(addr_le);
1015        if (!brcmf_sdio_valid_shared_address(addr)) {
1016                brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1017                rv = -EINVAL;
1018                goto fail;
1019        }
1020
1021        brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1022
1023        /* Read hndrte_shared structure */
1024        rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1025                               sizeof(struct sdpcm_shared_le));
1026        if (rv < 0)
1027                goto fail;
1028
1029        sdio_release_host(bus->sdiodev->func[1]);
1030
1031        /* Endianness */
1032        sh->flags = le32_to_cpu(sh_le.flags);
1033        sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1034        sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1035        sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1036        sh->assert_line = le32_to_cpu(sh_le.assert_line);
1037        sh->console_addr = le32_to_cpu(sh_le.console_addr);
1038        sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1039
1040        if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1041                brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1042                          SDPCM_SHARED_VERSION,
1043                          sh->flags & SDPCM_SHARED_VERSION_MASK);
1044                return -EPROTO;
1045        }
1046        return 0;
1047
1048fail:
1049        brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1050                  rv, addr);
1051        sdio_release_host(bus->sdiodev->func[1]);
1052        return rv;
1053}
1054
1055static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1056{
1057        struct sdpcm_shared sh;
1058
1059        if (brcmf_sdio_readshared(bus, &sh) == 0)
1060                bus->console_addr = sh.console_addr;
1061}
1062#else
1063static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1064{
1065}
1066#endif /* DEBUG */
1067
1068static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1069{
1070        u32 intstatus = 0;
1071        u32 hmb_data;
1072        u8 fcbits;
1073        int ret;
1074
1075        brcmf_dbg(SDIO, "Enter\n");
1076
1077        /* Read mailbox data and ack that we did so */
1078        ret = r_sdreg32(bus, &hmb_data,
1079                        offsetof(struct sdpcmd_regs, tohostmailboxdata));
1080
1081        if (ret == 0)
1082                w_sdreg32(bus, SMB_INT_ACK,
1083                          offsetof(struct sdpcmd_regs, tosbmailbox));
1084        bus->sdcnt.f1regdata += 2;
1085
1086        /* Dongle recomposed rx frames, accept them again */
1087        if (hmb_data & HMB_DATA_NAKHANDLED) {
1088                brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1089                          bus->rx_seq);
1090                if (!bus->rxskip)
1091                        brcmf_err("unexpected NAKHANDLED!\n");
1092
1093                bus->rxskip = false;
1094                intstatus |= I_HMB_FRAME_IND;
1095        }
1096
1097        /*
1098         * DEVREADY does not occur with gSPI.
1099         */
1100        if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1101                bus->sdpcm_ver =
1102                    (hmb_data & HMB_DATA_VERSION_MASK) >>
1103                    HMB_DATA_VERSION_SHIFT;
1104                if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1105                        brcmf_err("Version mismatch, dongle reports %d, "
1106                                  "expecting %d\n",
1107                                  bus->sdpcm_ver, SDPCM_PROT_VERSION);
1108                else
1109                        brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1110                                  bus->sdpcm_ver);
1111
1112                /*
1113                 * Retrieve console state address now that firmware should have
1114                 * updated it.
1115                 */
1116                brcmf_sdio_get_console_addr(bus);
1117        }
1118
1119        /*
1120         * Flow Control has been moved into the RX headers and this out of band
1121         * method isn't used any more.
1122         * remaining backward compatible with older dongles.
1123         */
1124        if (hmb_data & HMB_DATA_FC) {
1125                fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1126                                                        HMB_DATA_FCDATA_SHIFT;
1127
1128                if (fcbits & ~bus->flowcontrol)
1129                        bus->sdcnt.fc_xoff++;
1130
1131                if (bus->flowcontrol & ~fcbits)
1132                        bus->sdcnt.fc_xon++;
1133
1134                bus->sdcnt.fc_rcvd++;
1135                bus->flowcontrol = fcbits;
1136        }
1137
1138        /* Shouldn't be any others */
1139        if (hmb_data & ~(HMB_DATA_DEVREADY |
1140                         HMB_DATA_NAKHANDLED |
1141                         HMB_DATA_FC |
1142                         HMB_DATA_FWREADY |
1143                         HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1144                brcmf_err("Unknown mailbox data content: 0x%02x\n",
1145                          hmb_data);
1146
1147        return intstatus;
1148}
1149
1150static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1151{
1152        uint retries = 0;
1153        u16 lastrbc;
1154        u8 hi, lo;
1155        int err;
1156
1157        brcmf_err("%sterminate frame%s\n",
1158                  abort ? "abort command, " : "",
1159                  rtx ? ", send NAK" : "");
1160
1161        if (abort)
1162                brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1163
1164        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1165                          SFC_RF_TERM, &err);
1166        bus->sdcnt.f1regdata++;
1167
1168        /* Wait until the packet has been flushed (device/FIFO stable) */
1169        for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1170                hi = brcmf_sdiod_regrb(bus->sdiodev,
1171                                       SBSDIO_FUNC1_RFRAMEBCHI, &err);
1172                lo = brcmf_sdiod_regrb(bus->sdiodev,
1173                                       SBSDIO_FUNC1_RFRAMEBCLO, &err);
1174                bus->sdcnt.f1regdata += 2;
1175
1176                if ((hi == 0) && (lo == 0))
1177                        break;
1178
1179                if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1180                        brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1181                                  lastrbc, (hi << 8) + lo);
1182                }
1183                lastrbc = (hi << 8) + lo;
1184        }
1185
1186        if (!retries)
1187                brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1188        else
1189                brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1190
1191        if (rtx) {
1192                bus->sdcnt.rxrtx++;
1193                err = w_sdreg32(bus, SMB_NAK,
1194                                offsetof(struct sdpcmd_regs, tosbmailbox));
1195
1196                bus->sdcnt.f1regdata++;
1197                if (err == 0)
1198                        bus->rxskip = true;
1199        }
1200
1201        /* Clear partial in any case */
1202        bus->cur_read.len = 0;
1203}
1204
1205static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1206{
1207        struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1208        u8 i, hi, lo;
1209
1210        /* On failure, abort the command and terminate the frame */
1211        brcmf_err("sdio error, abort command and terminate frame\n");
1212        bus->sdcnt.tx_sderrs++;
1213
1214        brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1215        brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1216        bus->sdcnt.f1regdata++;
1217
1218        for (i = 0; i < 3; i++) {
1219                hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1220                lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1221                bus->sdcnt.f1regdata += 2;
1222                if ((hi == 0) && (lo == 0))
1223                        break;
1224        }
1225}
1226
1227/* return total length of buffer chain */
1228static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1229{
1230        struct sk_buff *p;
1231        uint total;
1232
1233        total = 0;
1234        skb_queue_walk(&bus->glom, p)
1235                total += p->len;
1236        return total;
1237}
1238
1239static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1240{
1241        struct sk_buff *cur, *next;
1242
1243        skb_queue_walk_safe(&bus->glom, cur, next) {
1244                skb_unlink(cur, &bus->glom);
1245                brcmu_pkt_buf_free_skb(cur);
1246        }
1247}
1248
1249/**
1250 * brcmfmac sdio bus specific header
1251 * This is the lowest layer header wrapped on the packets transmitted between
1252 * host and WiFi dongle which contains information needed for SDIO core and
1253 * firmware
1254 *
1255 * It consists of 3 parts: hardware header, hardware extension header and
1256 * software header
1257 * hardware header (frame tag) - 4 bytes
1258 * Byte 0~1: Frame length
1259 * Byte 2~3: Checksum, bit-wise inverse of frame length
1260 * hardware extension header - 8 bytes
1261 * Tx glom mode only, N/A for Rx or normal Tx
1262 * Byte 0~1: Packet length excluding hw frame tag
1263 * Byte 2: Reserved
1264 * Byte 3: Frame flags, bit 0: last frame indication
1265 * Byte 4~5: Reserved
1266 * Byte 6~7: Tail padding length
1267 * software header - 8 bytes
1268 * Byte 0: Rx/Tx sequence number
1269 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1270 * Byte 2: Length of next data frame, reserved for Tx
1271 * Byte 3: Data offset
1272 * Byte 4: Flow control bits, reserved for Tx
1273 * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1274 * Byte 6~7: Reserved
1275 */
1276#define SDPCM_HWHDR_LEN                 4
1277#define SDPCM_HWEXT_LEN                 8
1278#define SDPCM_SWHDR_LEN                 8
1279#define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1280/* software header */
1281#define SDPCM_SEQ_MASK                  0x000000ff
1282#define SDPCM_SEQ_WRAP                  256
1283#define SDPCM_CHANNEL_MASK              0x00000f00
1284#define SDPCM_CHANNEL_SHIFT             8
1285#define SDPCM_CONTROL_CHANNEL           0       /* Control */
1286#define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1287#define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1288#define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1289#define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1290#define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1291#define SDPCM_NEXTLEN_MASK              0x00ff0000
1292#define SDPCM_NEXTLEN_SHIFT             16
1293#define SDPCM_DOFFSET_MASK              0xff000000
1294#define SDPCM_DOFFSET_SHIFT             24
1295#define SDPCM_FCMASK_MASK               0x000000ff
1296#define SDPCM_WINDOW_MASK               0x0000ff00
1297#define SDPCM_WINDOW_SHIFT              8
1298
1299static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1300{
1301        u32 hdrvalue;
1302        hdrvalue = *(u32 *)swheader;
1303        return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1304}
1305
1306static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1307{
1308        u32 hdrvalue;
1309        u8 ret;
1310
1311        hdrvalue = *(u32 *)swheader;
1312        ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1313
1314        return (ret == SDPCM_EVENT_CHANNEL);
1315}
1316
1317static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1318                              struct brcmf_sdio_hdrinfo *rd,
1319                              enum brcmf_sdio_frmtype type)
1320{
1321        u16 len, checksum;
1322        u8 rx_seq, fc, tx_seq_max;
1323        u32 swheader;
1324
1325        trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1326
1327        /* hw header */
1328        len = get_unaligned_le16(header);
1329        checksum = get_unaligned_le16(header + sizeof(u16));
1330        /* All zero means no more to read */
1331        if (!(len | checksum)) {
1332                bus->rxpending = false;
1333                return -ENODATA;
1334        }
1335        if ((u16)(~(len ^ checksum))) {
1336                brcmf_err("HW header checksum error\n");
1337                bus->sdcnt.rx_badhdr++;
1338                brcmf_sdio_rxfail(bus, false, false);
1339                return -EIO;
1340        }
1341        if (len < SDPCM_HDRLEN) {
1342                brcmf_err("HW header length error\n");
1343                return -EPROTO;
1344        }
1345        if (type == BRCMF_SDIO_FT_SUPER &&
1346            (roundup(len, bus->blocksize) != rd->len)) {
1347                brcmf_err("HW superframe header length error\n");
1348                return -EPROTO;
1349        }
1350        if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1351                brcmf_err("HW subframe header length error\n");
1352                return -EPROTO;
1353        }
1354        rd->len = len;
1355
1356        /* software header */
1357        header += SDPCM_HWHDR_LEN;
1358        swheader = le32_to_cpu(*(__le32 *)header);
1359        if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1360                brcmf_err("Glom descriptor found in superframe head\n");
1361                rd->len = 0;
1362                return -EINVAL;
1363        }
1364        rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1365        rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1366        if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1367            type != BRCMF_SDIO_FT_SUPER) {
1368                brcmf_err("HW header length too long\n");
1369                bus->sdcnt.rx_toolong++;
1370                brcmf_sdio_rxfail(bus, false, false);
1371                rd->len = 0;
1372                return -EPROTO;
1373        }
1374        if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1375                brcmf_err("Wrong channel for superframe\n");
1376                rd->len = 0;
1377                return -EINVAL;
1378        }
1379        if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1380            rd->channel != SDPCM_EVENT_CHANNEL) {
1381                brcmf_err("Wrong channel for subframe\n");
1382                rd->len = 0;
1383                return -EINVAL;
1384        }
1385        rd->dat_offset = brcmf_sdio_getdatoffset(header);
1386        if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1387                brcmf_err("seq %d: bad data offset\n", rx_seq);
1388                bus->sdcnt.rx_badhdr++;
1389                brcmf_sdio_rxfail(bus, false, false);
1390                rd->len = 0;
1391                return -ENXIO;
1392        }
1393        if (rd->seq_num != rx_seq) {
1394                brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1395                bus->sdcnt.rx_badseq++;
1396                rd->seq_num = rx_seq;
1397        }
1398        /* no need to check the reset for subframe */
1399        if (type == BRCMF_SDIO_FT_SUB)
1400                return 0;
1401        rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1402        if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1403                /* only warm for NON glom packet */
1404                if (rd->channel != SDPCM_GLOM_CHANNEL)
1405                        brcmf_err("seq %d: next length error\n", rx_seq);
1406                rd->len_nxtfrm = 0;
1407        }
1408        swheader = le32_to_cpu(*(__le32 *)(header + 4));
1409        fc = swheader & SDPCM_FCMASK_MASK;
1410        if (bus->flowcontrol != fc) {
1411                if (~bus->flowcontrol & fc)
1412                        bus->sdcnt.fc_xoff++;
1413                if (bus->flowcontrol & ~fc)
1414                        bus->sdcnt.fc_xon++;
1415                bus->sdcnt.fc_rcvd++;
1416                bus->flowcontrol = fc;
1417        }
1418        tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1419        if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1420                brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1421                tx_seq_max = bus->tx_seq + 2;
1422        }
1423        bus->tx_max = tx_seq_max;
1424
1425        return 0;
1426}
1427
1428static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1429{
1430        *(__le16 *)header = cpu_to_le16(frm_length);
1431        *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1432}
1433
1434static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1435                              struct brcmf_sdio_hdrinfo *hd_info)
1436{
1437        u32 hdrval;
1438        u8 hdr_offset;
1439
1440        brcmf_sdio_update_hwhdr(header, hd_info->len);
1441        hdr_offset = SDPCM_HWHDR_LEN;
1442
1443        if (bus->txglom) {
1444                hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1445                *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1446                hdrval = (u16)hd_info->tail_pad << 16;
1447                *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1448                hdr_offset += SDPCM_HWEXT_LEN;
1449        }
1450
1451        hdrval = hd_info->seq_num;
1452        hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1453                  SDPCM_CHANNEL_MASK;
1454        hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1455                  SDPCM_DOFFSET_MASK;
1456        *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1457        *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1458        trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1459}
1460
1461static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1462{
1463        u16 dlen, totlen;
1464        u8 *dptr, num = 0;
1465        u16 sublen;
1466        struct sk_buff *pfirst, *pnext;
1467
1468        int errcode;
1469        u8 doff, sfdoff;
1470
1471        struct brcmf_sdio_hdrinfo rd_new;
1472
1473        /* If packets, issue read(s) and send up packet chain */
1474        /* Return sequence numbers consumed? */
1475
1476        brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1477                  bus->glomd, skb_peek(&bus->glom));
1478
1479        /* If there's a descriptor, generate the packet chain */
1480        if (bus->glomd) {
1481                pfirst = pnext = NULL;
1482                dlen = (u16) (bus->glomd->len);
1483                dptr = bus->glomd->data;
1484                if (!dlen || (dlen & 1)) {
1485                        brcmf_err("bad glomd len(%d), ignore descriptor\n",
1486                                  dlen);
1487                        dlen = 0;
1488                }
1489
1490                for (totlen = num = 0; dlen; num++) {
1491                        /* Get (and move past) next length */
1492                        sublen = get_unaligned_le16(dptr);
1493                        dlen -= sizeof(u16);
1494                        dptr += sizeof(u16);
1495                        if ((sublen < SDPCM_HDRLEN) ||
1496                            ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1497                                brcmf_err("descriptor len %d bad: %d\n",
1498                                          num, sublen);
1499                                pnext = NULL;
1500                                break;
1501                        }
1502                        if (sublen % bus->sgentry_align) {
1503                                brcmf_err("sublen %d not multiple of %d\n",
1504                                          sublen, bus->sgentry_align);
1505                        }
1506                        totlen += sublen;
1507
1508                        /* For last frame, adjust read len so total
1509                                 is a block multiple */
1510                        if (!dlen) {
1511                                sublen +=
1512                                    (roundup(totlen, bus->blocksize) - totlen);
1513                                totlen = roundup(totlen, bus->blocksize);
1514                        }
1515
1516                        /* Allocate/chain packet for next subframe */
1517                        pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1518                        if (pnext == NULL) {
1519                                brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1520                                          num, sublen);
1521                                break;
1522                        }
1523                        skb_queue_tail(&bus->glom, pnext);
1524
1525                        /* Adhere to start alignment requirements */
1526                        pkt_align(pnext, sublen, bus->sgentry_align);
1527                }
1528
1529                /* If all allocations succeeded, save packet chain
1530                         in bus structure */
1531                if (pnext) {
1532                        brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1533                                  totlen, num);
1534                        if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1535                            totlen != bus->cur_read.len) {
1536                                brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1537                                          bus->cur_read.len, totlen, rxseq);
1538                        }
1539                        pfirst = pnext = NULL;
1540                } else {
1541                        brcmf_sdio_free_glom(bus);
1542                        num = 0;
1543                }
1544
1545                /* Done with descriptor packet */
1546                brcmu_pkt_buf_free_skb(bus->glomd);
1547                bus->glomd = NULL;
1548                bus->cur_read.len = 0;
1549        }
1550
1551        /* Ok -- either we just generated a packet chain,
1552                 or had one from before */
1553        if (!skb_queue_empty(&bus->glom)) {
1554                if (BRCMF_GLOM_ON()) {
1555                        brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1556                        skb_queue_walk(&bus->glom, pnext) {
1557                                brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1558                                          pnext, (u8 *) (pnext->data),
1559                                          pnext->len, pnext->len);
1560                        }
1561                }
1562
1563                pfirst = skb_peek(&bus->glom);
1564                dlen = (u16) brcmf_sdio_glom_len(bus);
1565
1566                /* Do an SDIO read for the superframe.  Configurable iovar to
1567                 * read directly into the chained packet, or allocate a large
1568                 * packet and and copy into the chain.
1569                 */
1570                sdio_claim_host(bus->sdiodev->func[1]);
1571                errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1572                                                 &bus->glom, dlen);
1573                sdio_release_host(bus->sdiodev->func[1]);
1574                bus->sdcnt.f2rxdata++;
1575
1576                /* On failure, kill the superframe */
1577                if (errcode < 0) {
1578                        brcmf_err("glom read of %d bytes failed: %d\n",
1579                                  dlen, errcode);
1580
1581                        sdio_claim_host(bus->sdiodev->func[1]);
1582                        brcmf_sdio_rxfail(bus, true, false);
1583                        bus->sdcnt.rxglomfail++;
1584                        brcmf_sdio_free_glom(bus);
1585                        sdio_release_host(bus->sdiodev->func[1]);
1586                        return 0;
1587                }
1588
1589                brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1590                                   pfirst->data, min_t(int, pfirst->len, 48),
1591                                   "SUPERFRAME:\n");
1592
1593                rd_new.seq_num = rxseq;
1594                rd_new.len = dlen;
1595                sdio_claim_host(bus->sdiodev->func[1]);
1596                errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1597                                             BRCMF_SDIO_FT_SUPER);
1598                sdio_release_host(bus->sdiodev->func[1]);
1599                bus->cur_read.len = rd_new.len_nxtfrm << 4;
1600
1601                /* Remove superframe header, remember offset */
1602                skb_pull(pfirst, rd_new.dat_offset);
1603                sfdoff = rd_new.dat_offset;
1604                num = 0;
1605
1606                /* Validate all the subframe headers */
1607                skb_queue_walk(&bus->glom, pnext) {
1608                        /* leave when invalid subframe is found */
1609                        if (errcode)
1610                                break;
1611
1612                        rd_new.len = pnext->len;
1613                        rd_new.seq_num = rxseq++;
1614                        sdio_claim_host(bus->sdiodev->func[1]);
1615                        errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1616                                                     BRCMF_SDIO_FT_SUB);
1617                        sdio_release_host(bus->sdiodev->func[1]);
1618                        brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1619                                           pnext->data, 32, "subframe:\n");
1620
1621                        num++;
1622                }
1623
1624                if (errcode) {
1625                        /* Terminate frame on error */
1626                        sdio_claim_host(bus->sdiodev->func[1]);
1627                        brcmf_sdio_rxfail(bus, true, false);
1628                        bus->sdcnt.rxglomfail++;
1629                        brcmf_sdio_free_glom(bus);
1630                        sdio_release_host(bus->sdiodev->func[1]);
1631                        bus->cur_read.len = 0;
1632                        return 0;
1633                }
1634
1635                /* Basic SD framing looks ok - process each packet (header) */
1636
1637                skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1638                        dptr = (u8 *) (pfirst->data);
1639                        sublen = get_unaligned_le16(dptr);
1640                        doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1641
1642                        brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1643                                           dptr, pfirst->len,
1644                                           "Rx Subframe Data:\n");
1645
1646                        __skb_trim(pfirst, sublen);
1647                        skb_pull(pfirst, doff);
1648
1649                        if (pfirst->len == 0) {
1650                                skb_unlink(pfirst, &bus->glom);
1651                                brcmu_pkt_buf_free_skb(pfirst);
1652                                continue;
1653                        }
1654
1655                        brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1656                                           pfirst->data,
1657                                           min_t(int, pfirst->len, 32),
1658                                           "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1659                                           bus->glom.qlen, pfirst, pfirst->data,
1660                                           pfirst->len, pfirst->next,
1661                                           pfirst->prev);
1662                        skb_unlink(pfirst, &bus->glom);
1663                        if (brcmf_sdio_fromevntchan(pfirst->data))
1664                                brcmf_rx_event(bus->sdiodev->dev, pfirst);
1665                        else
1666                                brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1667                                               false);
1668                        bus->sdcnt.rxglompkts++;
1669                }
1670
1671                bus->sdcnt.rxglomframes++;
1672        }
1673        return num;
1674}
1675
1676static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1677                                     bool *pending)
1678{
1679        DECLARE_WAITQUEUE(wait, current);
1680        int timeout = DCMD_RESP_TIMEOUT;
1681
1682        /* Wait until control frame is available */
1683        add_wait_queue(&bus->dcmd_resp_wait, &wait);
1684        set_current_state(TASK_INTERRUPTIBLE);
1685
1686        while (!(*condition) && (!signal_pending(current) && timeout))
1687                timeout = schedule_timeout(timeout);
1688
1689        if (signal_pending(current))
1690                *pending = true;
1691
1692        set_current_state(TASK_RUNNING);
1693        remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1694
1695        return timeout;
1696}
1697
1698static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1699{
1700        wake_up_interruptible(&bus->dcmd_resp_wait);
1701
1702        return 0;
1703}
1704static void
1705brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1706{
1707        uint rdlen, pad;
1708        u8 *buf = NULL, *rbuf;
1709        int sdret;
1710
1711        brcmf_dbg(TRACE, "Enter\n");
1712
1713        if (bus->rxblen)
1714                buf = vzalloc(bus->rxblen);
1715        if (!buf)
1716                goto done;
1717
1718        rbuf = bus->rxbuf;
1719        pad = ((unsigned long)rbuf % bus->head_align);
1720        if (pad)
1721                rbuf += (bus->head_align - pad);
1722
1723        /* Copy the already-read portion over */
1724        memcpy(buf, hdr, BRCMF_FIRSTREAD);
1725        if (len <= BRCMF_FIRSTREAD)
1726                goto gotpkt;
1727
1728        /* Raise rdlen to next SDIO block to avoid tail command */
1729        rdlen = len - BRCMF_FIRSTREAD;
1730        if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1731                pad = bus->blocksize - (rdlen % bus->blocksize);
1732                if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1733                    ((len + pad) < bus->sdiodev->bus_if->maxctl))
1734                        rdlen += pad;
1735        } else if (rdlen % bus->head_align) {
1736                rdlen += bus->head_align - (rdlen % bus->head_align);
1737        }
1738
1739        /* Drop if the read is too big or it exceeds our maximum */
1740        if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1741                brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1742                          rdlen, bus->sdiodev->bus_if->maxctl);
1743                brcmf_sdio_rxfail(bus, false, false);
1744                goto done;
1745        }
1746
1747        if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1748                brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1749                          len, len - doff, bus->sdiodev->bus_if->maxctl);
1750                bus->sdcnt.rx_toolong++;
1751                brcmf_sdio_rxfail(bus, false, false);
1752                goto done;
1753        }
1754
1755        /* Read remain of frame body */
1756        sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1757        bus->sdcnt.f2rxdata++;
1758
1759        /* Control frame failures need retransmission */
1760        if (sdret < 0) {
1761                brcmf_err("read %d control bytes failed: %d\n",
1762                          rdlen, sdret);
1763                bus->sdcnt.rxc_errors++;
1764                brcmf_sdio_rxfail(bus, true, true);
1765                goto done;
1766        } else
1767                memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1768
1769gotpkt:
1770
1771        brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1772                           buf, len, "RxCtrl:\n");
1773
1774        /* Point to valid data and indicate its length */
1775        spin_lock_bh(&bus->rxctl_lock);
1776        if (bus->rxctl) {
1777                brcmf_err("last control frame is being processed.\n");
1778                spin_unlock_bh(&bus->rxctl_lock);
1779                vfree(buf);
1780                goto done;
1781        }
1782        bus->rxctl = buf + doff;
1783        bus->rxctl_orig = buf;
1784        bus->rxlen = len - doff;
1785        spin_unlock_bh(&bus->rxctl_lock);
1786
1787done:
1788        /* Awake any waiters */
1789        brcmf_sdio_dcmd_resp_wake(bus);
1790}
1791
1792/* Pad read to blocksize for efficiency */
1793static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1794{
1795        if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1796                *pad = bus->blocksize - (*rdlen % bus->blocksize);
1797                if (*pad <= bus->roundup && *pad < bus->blocksize &&
1798                    *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1799                        *rdlen += *pad;
1800        } else if (*rdlen % bus->head_align) {
1801                *rdlen += bus->head_align - (*rdlen % bus->head_align);
1802        }
1803}
1804
1805static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1806{
1807        struct sk_buff *pkt;            /* Packet for event or data frames */
1808        u16 pad;                /* Number of pad bytes to read */
1809        uint rxleft = 0;        /* Remaining number of frames allowed */
1810        int ret;                /* Return code from calls */
1811        uint rxcount = 0;       /* Total frames read */
1812        struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1813        u8 head_read = 0;
1814
1815        brcmf_dbg(TRACE, "Enter\n");
1816
1817        /* Not finished unless we encounter no more frames indication */
1818        bus->rxpending = true;
1819
1820        for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1821             !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1822             rd->seq_num++, rxleft--) {
1823
1824                /* Handle glomming separately */
1825                if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1826                        u8 cnt;
1827                        brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1828                                  bus->glomd, skb_peek(&bus->glom));
1829                        cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1830                        brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1831                        rd->seq_num += cnt - 1;
1832                        rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1833                        continue;
1834                }
1835
1836                rd->len_left = rd->len;
1837                /* read header first for unknow frame length */
1838                sdio_claim_host(bus->sdiodev->func[1]);
1839                if (!rd->len) {
1840                        ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1841                                                   bus->rxhdr, BRCMF_FIRSTREAD);
1842                        bus->sdcnt.f2rxhdrs++;
1843                        if (ret < 0) {
1844                                brcmf_err("RXHEADER FAILED: %d\n",
1845                                          ret);
1846                                bus->sdcnt.rx_hdrfail++;
1847                                brcmf_sdio_rxfail(bus, true, true);
1848                                sdio_release_host(bus->sdiodev->func[1]);
1849                                continue;
1850                        }
1851
1852                        brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1853                                           bus->rxhdr, SDPCM_HDRLEN,
1854                                           "RxHdr:\n");
1855
1856                        if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1857                                               BRCMF_SDIO_FT_NORMAL)) {
1858                                sdio_release_host(bus->sdiodev->func[1]);
1859                                if (!bus->rxpending)
1860                                        break;
1861                                else
1862                                        continue;
1863                        }
1864
1865                        if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1866                                brcmf_sdio_read_control(bus, bus->rxhdr,
1867                                                        rd->len,
1868                                                        rd->dat_offset);
1869                                /* prepare the descriptor for the next read */
1870                                rd->len = rd->len_nxtfrm << 4;
1871                                rd->len_nxtfrm = 0;
1872                                /* treat all packet as event if we don't know */
1873                                rd->channel = SDPCM_EVENT_CHANNEL;
1874                                sdio_release_host(bus->sdiodev->func[1]);
1875                                continue;
1876                        }
1877                        rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1878                                       rd->len - BRCMF_FIRSTREAD : 0;
1879                        head_read = BRCMF_FIRSTREAD;
1880                }
1881
1882                brcmf_sdio_pad(bus, &pad, &rd->len_left);
1883
1884                pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1885                                            bus->head_align);
1886                if (!pkt) {
1887                        /* Give up on data, request rtx of events */
1888                        brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1889                        brcmf_sdio_rxfail(bus, false,
1890                                            RETRYCHAN(rd->channel));
1891                        sdio_release_host(bus->sdiodev->func[1]);
1892                        continue;
1893                }
1894                skb_pull(pkt, head_read);
1895                pkt_align(pkt, rd->len_left, bus->head_align);
1896
1897                ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1898                bus->sdcnt.f2rxdata++;
1899                sdio_release_host(bus->sdiodev->func[1]);
1900
1901                if (ret < 0) {
1902                        brcmf_err("read %d bytes from channel %d failed: %d\n",
1903                                  rd->len, rd->channel, ret);
1904                        brcmu_pkt_buf_free_skb(pkt);
1905                        sdio_claim_host(bus->sdiodev->func[1]);
1906                        brcmf_sdio_rxfail(bus, true,
1907                                            RETRYCHAN(rd->channel));
1908                        sdio_release_host(bus->sdiodev->func[1]);
1909                        continue;
1910                }
1911
1912                if (head_read) {
1913                        skb_push(pkt, head_read);
1914                        memcpy(pkt->data, bus->rxhdr, head_read);
1915                        head_read = 0;
1916                } else {
1917                        memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1918                        rd_new.seq_num = rd->seq_num;
1919                        sdio_claim_host(bus->sdiodev->func[1]);
1920                        if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1921                                               BRCMF_SDIO_FT_NORMAL)) {
1922                                rd->len = 0;
1923                                brcmu_pkt_buf_free_skb(pkt);
1924                        }
1925                        bus->sdcnt.rx_readahead_cnt++;
1926                        if (rd->len != roundup(rd_new.len, 16)) {
1927                                brcmf_err("frame length mismatch:read %d, should be %d\n",
1928                                          rd->len,
1929                                          roundup(rd_new.len, 16) >> 4);
1930                                rd->len = 0;
1931                                brcmf_sdio_rxfail(bus, true, true);
1932                                sdio_release_host(bus->sdiodev->func[1]);
1933                                brcmu_pkt_buf_free_skb(pkt);
1934                                continue;
1935                        }
1936                        sdio_release_host(bus->sdiodev->func[1]);
1937                        rd->len_nxtfrm = rd_new.len_nxtfrm;
1938                        rd->channel = rd_new.channel;
1939                        rd->dat_offset = rd_new.dat_offset;
1940
1941                        brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1942                                             BRCMF_DATA_ON()) &&
1943                                           BRCMF_HDRS_ON(),
1944                                           bus->rxhdr, SDPCM_HDRLEN,
1945                                           "RxHdr:\n");
1946
1947                        if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1948                                brcmf_err("readahead on control packet %d?\n",
1949                                          rd_new.seq_num);
1950                                /* Force retry w/normal header read */
1951                                rd->len = 0;
1952                                sdio_claim_host(bus->sdiodev->func[1]);
1953                                brcmf_sdio_rxfail(bus, false, true);
1954                                sdio_release_host(bus->sdiodev->func[1]);
1955                                brcmu_pkt_buf_free_skb(pkt);
1956                                continue;
1957                        }
1958                }
1959
1960                brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1961                                   pkt->data, rd->len, "Rx Data:\n");
1962
1963                /* Save superframe descriptor and allocate packet frame */
1964                if (rd->channel == SDPCM_GLOM_CHANNEL) {
1965                        if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1966                                brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1967                                          rd->len);
1968                                brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1969                                                   pkt->data, rd->len,
1970                                                   "Glom Data:\n");
1971                                __skb_trim(pkt, rd->len);
1972                                skb_pull(pkt, SDPCM_HDRLEN);
1973                                bus->glomd = pkt;
1974                        } else {
1975                                brcmf_err("%s: glom superframe w/o "
1976                                          "descriptor!\n", __func__);
1977                                sdio_claim_host(bus->sdiodev->func[1]);
1978                                brcmf_sdio_rxfail(bus, false, false);
1979                                sdio_release_host(bus->sdiodev->func[1]);
1980                        }
1981                        /* prepare the descriptor for the next read */
1982                        rd->len = rd->len_nxtfrm << 4;
1983                        rd->len_nxtfrm = 0;
1984                        /* treat all packet as event if we don't know */
1985                        rd->channel = SDPCM_EVENT_CHANNEL;
1986                        continue;
1987                }
1988
1989                /* Fill in packet len and prio, deliver upward */
1990                __skb_trim(pkt, rd->len);
1991                skb_pull(pkt, rd->dat_offset);
1992
1993                if (pkt->len == 0)
1994                        brcmu_pkt_buf_free_skb(pkt);
1995                else if (rd->channel == SDPCM_EVENT_CHANNEL)
1996                        brcmf_rx_event(bus->sdiodev->dev, pkt);
1997                else
1998                        brcmf_rx_frame(bus->sdiodev->dev, pkt,
1999                                       false);
2000
2001                /* prepare the descriptor for the next read */
2002                rd->len = rd->len_nxtfrm << 4;
2003                rd->len_nxtfrm = 0;
2004                /* treat all packet as event if we don't know */
2005                rd->channel = SDPCM_EVENT_CHANNEL;
2006        }
2007
2008        rxcount = maxframes - rxleft;
2009        /* Message if we hit the limit */
2010        if (!rxleft)
2011                brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2012        else
2013                brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2014        /* Back off rxseq if awaiting rtx, update rx_seq */
2015        if (bus->rxskip)
2016                rd->seq_num--;
2017        bus->rx_seq = rd->seq_num;
2018
2019        return rxcount;
2020}
2021
2022static void
2023brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2024{
2025        wake_up_interruptible(&bus->ctrl_wait);
2026        return;
2027}
2028
2029static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2030{
2031        u16 head_pad;
2032        u8 *dat_buf;
2033
2034        dat_buf = (u8 *)(pkt->data);
2035
2036        /* Check head padding */
2037        head_pad = ((unsigned long)dat_buf % bus->head_align);
2038        if (head_pad) {
2039                if (skb_headroom(pkt) < head_pad) {
2040                        bus->sdiodev->bus_if->tx_realloc++;
2041                        head_pad = 0;
2042                        if (skb_cow(pkt, head_pad))
2043                                return -ENOMEM;
2044                }
2045                skb_push(pkt, head_pad);
2046                dat_buf = (u8 *)(pkt->data);
2047                memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2048        }
2049        return head_pad;
2050}
2051
2052/**
2053 * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2054 * bus layer usage.
2055 */
2056/* flag marking a dummy skb added for DMA alignment requirement */
2057#define ALIGN_SKB_FLAG          0x8000
2058/* bit mask of data length chopped from the previous packet */
2059#define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2060
2061static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2062                                    struct sk_buff_head *pktq,
2063                                    struct sk_buff *pkt, u16 total_len)
2064{
2065        struct brcmf_sdio_dev *sdiodev;
2066        struct sk_buff *pkt_pad;
2067        u16 tail_pad, tail_chop, chain_pad;
2068        unsigned int blksize;
2069        bool lastfrm;
2070        int ntail, ret;
2071
2072        sdiodev = bus->sdiodev;
2073        blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2074        /* sg entry alignment should be a divisor of block size */
2075        WARN_ON(blksize % bus->sgentry_align);
2076
2077        /* Check tail padding */
2078        lastfrm = skb_queue_is_last(pktq, pkt);
2079        tail_pad = 0;
2080        tail_chop = pkt->len % bus->sgentry_align;
2081        if (tail_chop)
2082                tail_pad = bus->sgentry_align - tail_chop;
2083        chain_pad = (total_len + tail_pad) % blksize;
2084        if (lastfrm && chain_pad)
2085                tail_pad += blksize - chain_pad;
2086        if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2087                pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2088                                                bus->head_align);
2089                if (pkt_pad == NULL)
2090                        return -ENOMEM;
2091                ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2092                if (unlikely(ret < 0)) {
2093                        kfree_skb(pkt_pad);
2094                        return ret;
2095                }
2096                memcpy(pkt_pad->data,
2097                       pkt->data + pkt->len - tail_chop,
2098                       tail_chop);
2099                *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2100                skb_trim(pkt, pkt->len - tail_chop);
2101                skb_trim(pkt_pad, tail_pad + tail_chop);
2102                __skb_queue_after(pktq, pkt, pkt_pad);
2103        } else {
2104                ntail = pkt->data_len + tail_pad -
2105                        (pkt->end - pkt->tail);
2106                if (skb_cloned(pkt) || ntail > 0)
2107                        if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2108                                return -ENOMEM;
2109                if (skb_linearize(pkt))
2110                        return -ENOMEM;
2111                __skb_put(pkt, tail_pad);
2112        }
2113
2114        return tail_pad;
2115}
2116
2117/**
2118 * brcmf_sdio_txpkt_prep - packet preparation for transmit
2119 * @bus: brcmf_sdio structure pointer
2120 * @pktq: packet list pointer
2121 * @chan: virtual channel to transmit the packet
2122 *
2123 * Processes to be applied to the packet
2124 *      - Align data buffer pointer
2125 *      - Align data buffer length
2126 *      - Prepare header
2127 * Return: negative value if there is error
2128 */
2129static int
2130brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2131                      uint chan)
2132{
2133        u16 head_pad, total_len;
2134        struct sk_buff *pkt_next;
2135        u8 txseq;
2136        int ret;
2137        struct brcmf_sdio_hdrinfo hd_info = {0};
2138
2139        txseq = bus->tx_seq;
2140        total_len = 0;
2141        skb_queue_walk(pktq, pkt_next) {
2142                /* alignment packet inserted in previous
2143                 * loop cycle can be skipped as it is
2144                 * already properly aligned and does not
2145                 * need an sdpcm header.
2146                 */
2147                if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2148                        continue;
2149
2150                /* align packet data pointer */
2151                ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2152                if (ret < 0)
2153                        return ret;
2154                head_pad = (u16)ret;
2155                if (head_pad)
2156                        memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2157
2158                total_len += pkt_next->len;
2159
2160                hd_info.len = pkt_next->len;
2161                hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2162                if (bus->txglom && pktq->qlen > 1) {
2163                        ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2164                                                       pkt_next, total_len);
2165                        if (ret < 0)
2166                                return ret;
2167                        hd_info.tail_pad = (u16)ret;
2168                        total_len += (u16)ret;
2169                }
2170
2171                hd_info.channel = chan;
2172                hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2173                hd_info.seq_num = txseq++;
2174
2175                /* Now fill the header */
2176                brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2177
2178                if (BRCMF_BYTES_ON() &&
2179                    ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2180                     (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2181                        brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2182                                           "Tx Frame:\n");
2183                else if (BRCMF_HDRS_ON())
2184                        brcmf_dbg_hex_dump(true, pkt_next->data,
2185                                           head_pad + bus->tx_hdrlen,
2186                                           "Tx Header:\n");
2187        }
2188        /* Hardware length tag of the first packet should be total
2189         * length of the chain (including padding)
2190         */
2191        if (bus->txglom)
2192                brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2193        return 0;
2194}
2195
2196/**
2197 * brcmf_sdio_txpkt_postp - packet post processing for transmit
2198 * @bus: brcmf_sdio structure pointer
2199 * @pktq: packet list pointer
2200 *
2201 * Processes to be applied to the packet
2202 *      - Remove head padding
2203 *      - Remove tail padding
2204 */
2205static void
2206brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2207{
2208        u8 *hdr;
2209        u32 dat_offset;
2210        u16 tail_pad;
2211        u16 dummy_flags, chop_len;
2212        struct sk_buff *pkt_next, *tmp, *pkt_prev;
2213
2214        skb_queue_walk_safe(pktq, pkt_next, tmp) {
2215                dummy_flags = *(u16 *)(pkt_next->cb);
2216                if (dummy_flags & ALIGN_SKB_FLAG) {
2217                        chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2218                        if (chop_len) {
2219                                pkt_prev = pkt_next->prev;
2220                                skb_put(pkt_prev, chop_len);
2221                        }
2222                        __skb_unlink(pkt_next, pktq);
2223                        brcmu_pkt_buf_free_skb(pkt_next);
2224                } else {
2225                        hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2226                        dat_offset = le32_to_cpu(*(__le32 *)hdr);
2227                        dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2228                                     SDPCM_DOFFSET_SHIFT;
2229                        skb_pull(pkt_next, dat_offset);
2230                        if (bus->txglom) {
2231                                tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2232                                skb_trim(pkt_next, pkt_next->len - tail_pad);
2233                        }
2234                }
2235        }
2236}
2237
2238/* Writes a HW/SW header into the packet and sends it. */
2239/* Assumes: (a) header space already there, (b) caller holds lock */
2240static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2241                            uint chan)
2242{
2243        int ret;
2244        struct sk_buff *pkt_next, *tmp;
2245
2246        brcmf_dbg(TRACE, "Enter\n");
2247
2248        ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2249        if (ret)
2250                goto done;
2251
2252        sdio_claim_host(bus->sdiodev->func[1]);
2253        ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2254        bus->sdcnt.f2txdata++;
2255
2256        if (ret < 0)
2257                brcmf_sdio_txfail(bus);
2258
2259        sdio_release_host(bus->sdiodev->func[1]);
2260
2261done:
2262        brcmf_sdio_txpkt_postp(bus, pktq);
2263        if (ret == 0)
2264                bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2265        skb_queue_walk_safe(pktq, pkt_next, tmp) {
2266                __skb_unlink(pkt_next, pktq);
2267                brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2268        }
2269        return ret;
2270}
2271
2272static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2273{
2274        struct sk_buff *pkt;
2275        struct sk_buff_head pktq;
2276        u32 intstatus = 0;
2277        int ret = 0, prec_out, i;
2278        uint cnt = 0;
2279        u8 tx_prec_map, pkt_num;
2280
2281        brcmf_dbg(TRACE, "Enter\n");
2282
2283        tx_prec_map = ~bus->flowcontrol;
2284
2285        /* Send frames until the limit or some other event */
2286        for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2287                pkt_num = 1;
2288                if (bus->txglom)
2289                        pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2290                                        bus->sdiodev->txglomsz);
2291                pkt_num = min_t(u32, pkt_num,
2292                                brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2293                __skb_queue_head_init(&pktq);
2294                spin_lock_bh(&bus->txq_lock);
2295                for (i = 0; i < pkt_num; i++) {
2296                        pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2297                                              &prec_out);
2298                        if (pkt == NULL)
2299                                break;
2300                        __skb_queue_tail(&pktq, pkt);
2301                }
2302                spin_unlock_bh(&bus->txq_lock);
2303                if (i == 0)
2304                        break;
2305
2306                ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2307
2308                cnt += i;
2309
2310                /* In poll mode, need to check for other events */
2311                if (!bus->intr) {
2312                        /* Check device status, signal pending interrupt */
2313                        sdio_claim_host(bus->sdiodev->func[1]);
2314                        ret = r_sdreg32(bus, &intstatus,
2315                                        offsetof(struct sdpcmd_regs,
2316                                                 intstatus));
2317                        sdio_release_host(bus->sdiodev->func[1]);
2318                        bus->sdcnt.f2txdata++;
2319                        if (ret != 0)
2320                                break;
2321                        if (intstatus & bus->hostintmask)
2322                                atomic_set(&bus->ipend, 1);
2323                }
2324        }
2325
2326        /* Deflow-control stack if needed */
2327        if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2328            bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2329                bus->txoff = false;
2330                brcmf_txflowblock(bus->sdiodev->dev, false);
2331        }
2332
2333        return cnt;
2334}
2335
2336static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2337{
2338        u8 doff;
2339        u16 pad;
2340        uint retries = 0;
2341        struct brcmf_sdio_hdrinfo hd_info = {0};
2342        int ret;
2343
2344        brcmf_dbg(TRACE, "Enter\n");
2345
2346        /* Back the pointer to make room for bus header */
2347        frame -= bus->tx_hdrlen;
2348        len += bus->tx_hdrlen;
2349
2350        /* Add alignment padding (optional for ctl frames) */
2351        doff = ((unsigned long)frame % bus->head_align);
2352        if (doff) {
2353                frame -= doff;
2354                len += doff;
2355                memset(frame + bus->tx_hdrlen, 0, doff);
2356        }
2357
2358        /* Round send length to next SDIO block */
2359        pad = 0;
2360        if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2361                pad = bus->blocksize - (len % bus->blocksize);
2362                if ((pad > bus->roundup) || (pad >= bus->blocksize))
2363                        pad = 0;
2364        } else if (len % bus->head_align) {
2365                pad = bus->head_align - (len % bus->head_align);
2366        }
2367        len += pad;
2368
2369        hd_info.len = len - pad;
2370        hd_info.channel = SDPCM_CONTROL_CHANNEL;
2371        hd_info.dat_offset = doff + bus->tx_hdrlen;
2372        hd_info.seq_num = bus->tx_seq;
2373        hd_info.lastfrm = true;
2374        hd_info.tail_pad = pad;
2375        brcmf_sdio_hdpack(bus, frame, &hd_info);
2376
2377        if (bus->txglom)
2378                brcmf_sdio_update_hwhdr(frame, len);
2379
2380        brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2381                           frame, len, "Tx Frame:\n");
2382        brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2383                           BRCMF_HDRS_ON(),
2384                           frame, min_t(u16, len, 16), "TxHdr:\n");
2385
2386        do {
2387                ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2388
2389                if (ret < 0)
2390                        brcmf_sdio_txfail(bus);
2391                else
2392                        bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2393        } while (ret < 0 && retries++ < TXRETRIES);
2394
2395        return ret;
2396}
2397
2398static void brcmf_sdio_bus_stop(struct device *dev)
2399{
2400        u32 local_hostintmask;
2401        u8 saveclk;
2402        int err;
2403        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2404        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2405        struct brcmf_sdio *bus = sdiodev->bus;
2406
2407        brcmf_dbg(TRACE, "Enter\n");
2408
2409        if (bus->watchdog_tsk) {
2410                send_sig(SIGTERM, bus->watchdog_tsk, 1);
2411                kthread_stop(bus->watchdog_tsk);
2412                bus->watchdog_tsk = NULL;
2413        }
2414
2415        if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2416                sdio_claim_host(sdiodev->func[1]);
2417
2418                /* Enable clock for device interrupts */
2419                brcmf_sdio_bus_sleep(bus, false, false);
2420
2421                /* Disable and clear interrupts at the chip level also */
2422                w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2423                local_hostintmask = bus->hostintmask;
2424                bus->hostintmask = 0;
2425
2426                /* Force backplane clocks to assure F2 interrupt propagates */
2427                saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2428                                            &err);
2429                if (!err)
2430                        brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2431                                          (saveclk | SBSDIO_FORCE_HT), &err);
2432                if (err)
2433                        brcmf_err("Failed to force clock for F2: err %d\n",
2434                                  err);
2435
2436                /* Turn off the bus (F2), free any pending packets */
2437                brcmf_dbg(INTR, "disable SDIO interrupts\n");
2438                sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2439
2440                /* Clear any pending interrupts now that F2 is disabled */
2441                w_sdreg32(bus, local_hostintmask,
2442                          offsetof(struct sdpcmd_regs, intstatus));
2443
2444                sdio_release_host(sdiodev->func[1]);
2445        }
2446        /* Clear the data packet queues */
2447        brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2448
2449        /* Clear any held glomming stuff */
2450        brcmu_pkt_buf_free_skb(bus->glomd);
2451        brcmf_sdio_free_glom(bus);
2452
2453        /* Clear rx control and wake any waiters */
2454        spin_lock_bh(&bus->rxctl_lock);
2455        bus->rxlen = 0;
2456        spin_unlock_bh(&bus->rxctl_lock);
2457        brcmf_sdio_dcmd_resp_wake(bus);
2458
2459        /* Reset some F2 state stuff */
2460        bus->rxskip = false;
2461        bus->tx_seq = bus->rx_seq = 0;
2462}
2463
2464static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2465{
2466        struct brcmf_sdio_dev *sdiodev;
2467        unsigned long flags;
2468
2469        sdiodev = bus->sdiodev;
2470        if (sdiodev->oob_irq_requested) {
2471                spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2472                if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2473                        enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2474                        sdiodev->irq_en = true;
2475                }
2476                spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2477        }
2478}
2479
2480static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2481{
2482        struct brcmf_core *buscore;
2483        u32 addr;
2484        unsigned long val;
2485        int ret;
2486
2487        buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2488        addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2489
2490        val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2491        bus->sdcnt.f1regdata++;
2492        if (ret != 0)
2493                return ret;
2494
2495        val &= bus->hostintmask;
2496        atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2497
2498        /* Clear interrupts */
2499        if (val) {
2500                brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2501                bus->sdcnt.f1regdata++;
2502                atomic_or(val, &bus->intstatus);
2503        }
2504
2505        return ret;
2506}
2507
2508static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2509{
2510        u32 newstatus = 0;
2511        unsigned long intstatus;
2512        uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2513        uint framecnt;                  /* Temporary counter of tx/rx frames */
2514        int err = 0;
2515
2516        brcmf_dbg(TRACE, "Enter\n");
2517
2518        sdio_claim_host(bus->sdiodev->func[1]);
2519
2520        /* If waiting for HTAVAIL, check status */
2521        if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2522                u8 clkctl, devctl = 0;
2523
2524#ifdef DEBUG
2525                /* Check for inconsistent device control */
2526                devctl = brcmf_sdiod_regrb(bus->sdiodev,
2527                                           SBSDIO_DEVICE_CTL, &err);
2528#endif                          /* DEBUG */
2529
2530                /* Read CSR, if clock on switch to AVAIL, else ignore */
2531                clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2532                                           SBSDIO_FUNC1_CHIPCLKCSR, &err);
2533
2534                brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2535                          devctl, clkctl);
2536
2537                if (SBSDIO_HTAV(clkctl)) {
2538                        devctl = brcmf_sdiod_regrb(bus->sdiodev,
2539                                                   SBSDIO_DEVICE_CTL, &err);
2540                        devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2541                        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2542                                          devctl, &err);
2543                        bus->clkstate = CLK_AVAIL;
2544                }
2545        }
2546
2547        /* Make sure backplane clock is on */
2548        brcmf_sdio_bus_sleep(bus, false, true);
2549
2550        /* Pending interrupt indicates new device status */
2551        if (atomic_read(&bus->ipend) > 0) {
2552                atomic_set(&bus->ipend, 0);
2553                err = brcmf_sdio_intr_rstatus(bus);
2554        }
2555
2556        /* Start with leftover status bits */
2557        intstatus = atomic_xchg(&bus->intstatus, 0);
2558
2559        /* Handle flow-control change: read new state in case our ack
2560         * crossed another change interrupt.  If change still set, assume
2561         * FC ON for safety, let next loop through do the debounce.
2562         */
2563        if (intstatus & I_HMB_FC_CHANGE) {
2564                intstatus &= ~I_HMB_FC_CHANGE;
2565                err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2566                                offsetof(struct sdpcmd_regs, intstatus));
2567
2568                err = r_sdreg32(bus, &newstatus,
2569                                offsetof(struct sdpcmd_regs, intstatus));
2570                bus->sdcnt.f1regdata += 2;
2571                atomic_set(&bus->fcstate,
2572                           !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2573                intstatus |= (newstatus & bus->hostintmask);
2574        }
2575
2576        /* Handle host mailbox indication */
2577        if (intstatus & I_HMB_HOST_INT) {
2578                intstatus &= ~I_HMB_HOST_INT;
2579                intstatus |= brcmf_sdio_hostmail(bus);
2580        }
2581
2582        sdio_release_host(bus->sdiodev->func[1]);
2583
2584        /* Generally don't ask for these, can get CRC errors... */
2585        if (intstatus & I_WR_OOSYNC) {
2586                brcmf_err("Dongle reports WR_OOSYNC\n");
2587                intstatus &= ~I_WR_OOSYNC;
2588        }
2589
2590        if (intstatus & I_RD_OOSYNC) {
2591                brcmf_err("Dongle reports RD_OOSYNC\n");
2592                intstatus &= ~I_RD_OOSYNC;
2593        }
2594
2595        if (intstatus & I_SBINT) {
2596                brcmf_err("Dongle reports SBINT\n");
2597                intstatus &= ~I_SBINT;
2598        }
2599
2600        /* Would be active due to wake-wlan in gSPI */
2601        if (intstatus & I_CHIPACTIVE) {
2602                brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2603                intstatus &= ~I_CHIPACTIVE;
2604        }
2605
2606        /* Ignore frame indications if rxskip is set */
2607        if (bus->rxskip)
2608                intstatus &= ~I_HMB_FRAME_IND;
2609
2610        /* On frame indication, read available frames */
2611        if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2612                brcmf_sdio_readframes(bus, bus->rxbound);
2613                if (!bus->rxpending)
2614                        intstatus &= ~I_HMB_FRAME_IND;
2615        }
2616
2617        /* Keep still-pending events for next scheduling */
2618        if (intstatus)
2619                atomic_or(intstatus, &bus->intstatus);
2620
2621        brcmf_sdio_clrintr(bus);
2622
2623        if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2624            data_ok(bus)) {
2625                sdio_claim_host(bus->sdiodev->func[1]);
2626                if (bus->ctrl_frame_stat) {
2627                        err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2628                                                      bus->ctrl_frame_len);
2629                        bus->ctrl_frame_err = err;
2630                        wmb();
2631                        bus->ctrl_frame_stat = false;
2632                }
2633                sdio_release_host(bus->sdiodev->func[1]);
2634                brcmf_sdio_wait_event_wakeup(bus);
2635        }
2636        /* Send queued frames (limit 1 if rx may still be pending) */
2637        if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2638            brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2639            data_ok(bus)) {
2640                framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2641                                            txlimit;
2642                brcmf_sdio_sendfromq(bus, framecnt);
2643        }
2644
2645        if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2646                brcmf_err("failed backplane access over SDIO, halting operation\n");
2647                atomic_set(&bus->intstatus, 0);
2648                if (bus->ctrl_frame_stat) {
2649                        sdio_claim_host(bus->sdiodev->func[1]);
2650                        if (bus->ctrl_frame_stat) {
2651                                bus->ctrl_frame_err = -ENODEV;
2652                                wmb();
2653                                bus->ctrl_frame_stat = false;
2654                                brcmf_sdio_wait_event_wakeup(bus);
2655                        }
2656                        sdio_release_host(bus->sdiodev->func[1]);
2657                }
2658        } else if (atomic_read(&bus->intstatus) ||
2659                   atomic_read(&bus->ipend) > 0 ||
2660                   (!atomic_read(&bus->fcstate) &&
2661                    brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2662                    data_ok(bus))) {
2663                bus->dpc_triggered = true;
2664        }
2665}
2666
2667static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2668{
2669        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2670        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2671        struct brcmf_sdio *bus = sdiodev->bus;
2672
2673        return &bus->txq;
2674}
2675
2676static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2677{
2678        struct sk_buff *p;
2679        int eprec = -1;         /* precedence to evict from */
2680
2681        /* Fast case, precedence queue is not full and we are also not
2682         * exceeding total queue length
2683         */
2684        if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2685                brcmu_pktq_penq(q, prec, pkt);
2686                return true;
2687        }
2688
2689        /* Determine precedence from which to evict packet, if any */
2690        if (pktq_pfull(q, prec)) {
2691                eprec = prec;
2692        } else if (pktq_full(q)) {
2693                p = brcmu_pktq_peek_tail(q, &eprec);
2694                if (eprec > prec)
2695                        return false;
2696        }
2697
2698        /* Evict if needed */
2699        if (eprec >= 0) {
2700                /* Detect queueing to unconfigured precedence */
2701                if (eprec == prec)
2702                        return false;   /* refuse newer (incoming) packet */
2703                /* Evict packet according to discard policy */
2704                p = brcmu_pktq_pdeq_tail(q, eprec);
2705                if (p == NULL)
2706                        brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2707                brcmu_pkt_buf_free_skb(p);
2708        }
2709
2710        /* Enqueue */
2711        p = brcmu_pktq_penq(q, prec, pkt);
2712        if (p == NULL)
2713                brcmf_err("brcmu_pktq_penq() failed\n");
2714
2715        return p != NULL;
2716}
2717
2718static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2719{
2720        int ret = -EBADE;
2721        uint prec;
2722        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2723        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2724        struct brcmf_sdio *bus = sdiodev->bus;
2725
2726        brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2727        if (sdiodev->state != BRCMF_SDIOD_DATA)
2728                return -EIO;
2729
2730        /* Add space for the header */
2731        skb_push(pkt, bus->tx_hdrlen);
2732        /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2733
2734        prec = prio2prec((pkt->priority & PRIOMASK));
2735
2736        /* Check for existing queue, current flow-control,
2737                         pending event, or pending clock */
2738        brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2739        bus->sdcnt.fcqueued++;
2740
2741        /* Priority based enq */
2742        spin_lock_bh(&bus->txq_lock);
2743        /* reset bus_flags in packet cb */
2744        *(u16 *)(pkt->cb) = 0;
2745        if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2746                skb_pull(pkt, bus->tx_hdrlen);
2747                brcmf_err("out of bus->txq !!!\n");
2748                ret = -ENOSR;
2749        } else {
2750                ret = 0;
2751        }
2752
2753        if (pktq_len(&bus->txq) >= TXHI) {
2754                bus->txoff = true;
2755                brcmf_txflowblock(dev, true);
2756        }
2757        spin_unlock_bh(&bus->txq_lock);
2758
2759#ifdef DEBUG
2760        if (pktq_plen(&bus->txq, prec) > qcount[prec])
2761                qcount[prec] = pktq_plen(&bus->txq, prec);
2762#endif
2763
2764        brcmf_sdio_trigger_dpc(bus);
2765        return ret;
2766}
2767
2768#ifdef DEBUG
2769#define CONSOLE_LINE_MAX        192
2770
2771static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2772{
2773        struct brcmf_console *c = &bus->console;
2774        u8 line[CONSOLE_LINE_MAX], ch;
2775        u32 n, idx, addr;
2776        int rv;
2777
2778        /* Don't do anything until FWREADY updates console address */
2779        if (bus->console_addr == 0)
2780                return 0;
2781
2782        /* Read console log struct */
2783        addr = bus->console_addr + offsetof(struct rte_console, log_le);
2784        rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2785                               sizeof(c->log_le));
2786        if (rv < 0)
2787                return rv;
2788
2789        /* Allocate console buffer (one time only) */
2790        if (c->buf == NULL) {
2791                c->bufsize = le32_to_cpu(c->log_le.buf_size);
2792                c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2793                if (c->buf == NULL)
2794                        return -ENOMEM;
2795        }
2796
2797        idx = le32_to_cpu(c->log_le.idx);
2798
2799        /* Protect against corrupt value */
2800        if (idx > c->bufsize)
2801                return -EBADE;
2802
2803        /* Skip reading the console buffer if the index pointer
2804         has not moved */
2805        if (idx == c->last)
2806                return 0;
2807
2808        /* Read the console buffer */
2809        addr = le32_to_cpu(c->log_le.buf);
2810        rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2811        if (rv < 0)
2812                return rv;
2813
2814        while (c->last != idx) {
2815                for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2816                        if (c->last == idx) {
2817                                /* This would output a partial line.
2818                                 * Instead, back up
2819                                 * the buffer pointer and output this
2820                                 * line next time around.
2821                                 */
2822                                if (c->last >= n)
2823                                        c->last -= n;
2824                                else
2825                                        c->last = c->bufsize - n;
2826                                goto break2;
2827                        }
2828                        ch = c->buf[c->last];
2829                        c->last = (c->last + 1) % c->bufsize;
2830                        if (ch == '\n')
2831                                break;
2832                        line[n] = ch;
2833                }
2834
2835                if (n > 0) {
2836                        if (line[n - 1] == '\r')
2837                                n--;
2838                        line[n] = 0;
2839                        pr_debug("CONSOLE: %s\n", line);
2840                }
2841        }
2842break2:
2843
2844        return 0;
2845}
2846#endif                          /* DEBUG */
2847
2848static int
2849brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2850{
2851        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2852        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2853        struct brcmf_sdio *bus = sdiodev->bus;
2854        int ret;
2855
2856        brcmf_dbg(TRACE, "Enter\n");
2857        if (sdiodev->state != BRCMF_SDIOD_DATA)
2858                return -EIO;
2859
2860        /* Send from dpc */
2861        bus->ctrl_frame_buf = msg;
2862        bus->ctrl_frame_len = msglen;
2863        wmb();
2864        bus->ctrl_frame_stat = true;
2865
2866        brcmf_sdio_trigger_dpc(bus);
2867        wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2868                                         CTL_DONE_TIMEOUT);
2869        ret = 0;
2870        if (bus->ctrl_frame_stat) {
2871                sdio_claim_host(bus->sdiodev->func[1]);
2872                if (bus->ctrl_frame_stat) {
2873                        brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2874                        bus->ctrl_frame_stat = false;
2875                        ret = -ETIMEDOUT;
2876                }
2877                sdio_release_host(bus->sdiodev->func[1]);
2878        }
2879        if (!ret) {
2880                brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2881                          bus->ctrl_frame_err);
2882                rmb();
2883                ret = bus->ctrl_frame_err;
2884        }
2885
2886        if (ret)
2887                bus->sdcnt.tx_ctlerrs++;
2888        else
2889                bus->sdcnt.tx_ctlpkts++;
2890
2891        return ret;
2892}
2893
2894#ifdef DEBUG
2895static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2896                                   struct sdpcm_shared *sh)
2897{
2898        u32 addr, console_ptr, console_size, console_index;
2899        char *conbuf = NULL;
2900        __le32 sh_val;
2901        int rv;
2902
2903        /* obtain console information from device memory */
2904        addr = sh->console_addr + offsetof(struct rte_console, log_le);
2905        rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2906                               (u8 *)&sh_val, sizeof(u32));
2907        if (rv < 0)
2908                return rv;
2909        console_ptr = le32_to_cpu(sh_val);
2910
2911        addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2912        rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2913                               (u8 *)&sh_val, sizeof(u32));
2914        if (rv < 0)
2915                return rv;
2916        console_size = le32_to_cpu(sh_val);
2917
2918        addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2919        rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2920                               (u8 *)&sh_val, sizeof(u32));
2921        if (rv < 0)
2922                return rv;
2923        console_index = le32_to_cpu(sh_val);
2924
2925        /* allocate buffer for console data */
2926        if (console_size <= CONSOLE_BUFFER_MAX)
2927                conbuf = vzalloc(console_size+1);
2928
2929        if (!conbuf)
2930                return -ENOMEM;
2931
2932        /* obtain the console data from device */
2933        conbuf[console_size] = '\0';
2934        rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2935                               console_size);
2936        if (rv < 0)
2937                goto done;
2938
2939        rv = seq_write(seq, conbuf + console_index,
2940                       console_size - console_index);
2941        if (rv < 0)
2942                goto done;
2943
2944        if (console_index > 0)
2945                rv = seq_write(seq, conbuf, console_index - 1);
2946
2947done:
2948        vfree(conbuf);
2949        return rv;
2950}
2951
2952static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2953                                struct sdpcm_shared *sh)
2954{
2955        int error;
2956        struct brcmf_trap_info tr;
2957
2958        if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2959                brcmf_dbg(INFO, "no trap in firmware\n");
2960                return 0;
2961        }
2962
2963        error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2964                                  sizeof(struct brcmf_trap_info));
2965        if (error < 0)
2966                return error;
2967
2968        seq_printf(seq,
2969                   "dongle trap info: type 0x%x @ epc 0x%08x\n"
2970                   "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2971                   "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2972                   "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2973                   "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2974                   le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2975                   le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2976                   le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2977                   le32_to_cpu(tr.pc), sh->trap_addr,
2978                   le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2979                   le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2980                   le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2981                   le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2982
2983        return 0;
2984}
2985
2986static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
2987                                  struct sdpcm_shared *sh)
2988{
2989        int error = 0;
2990        char file[80] = "?";
2991        char expr[80] = "<???>";
2992
2993        if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2994                brcmf_dbg(INFO, "firmware not built with -assert\n");
2995                return 0;
2996        } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2997                brcmf_dbg(INFO, "no assert in dongle\n");
2998                return 0;
2999        }
3000
3001        sdio_claim_host(bus->sdiodev->func[1]);
3002        if (sh->assert_file_addr != 0) {
3003                error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3004                                          sh->assert_file_addr, (u8 *)file, 80);
3005                if (error < 0)
3006                        return error;
3007        }
3008        if (sh->assert_exp_addr != 0) {
3009                error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3010                                          sh->assert_exp_addr, (u8 *)expr, 80);
3011                if (error < 0)
3012                        return error;
3013        }
3014        sdio_release_host(bus->sdiodev->func[1]);
3015
3016        seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3017                   file, sh->assert_line, expr);
3018        return 0;
3019}
3020
3021static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3022{
3023        int error;
3024        struct sdpcm_shared sh;
3025
3026        error = brcmf_sdio_readshared(bus, &sh);
3027
3028        if (error < 0)
3029                return error;
3030
3031        if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3032                brcmf_dbg(INFO, "firmware not built with -assert\n");
3033        else if (sh.flags & SDPCM_SHARED_ASSERT)
3034                brcmf_err("assertion in dongle\n");
3035
3036        if (sh.flags & SDPCM_SHARED_TRAP)
3037                brcmf_err("firmware trap in dongle\n");
3038
3039        return 0;
3040}
3041
3042static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3043{
3044        int error = 0;
3045        struct sdpcm_shared sh;
3046
3047        error = brcmf_sdio_readshared(bus, &sh);
3048        if (error < 0)
3049                goto done;
3050
3051        error = brcmf_sdio_assert_info(seq, bus, &sh);
3052        if (error < 0)
3053                goto done;
3054
3055        error = brcmf_sdio_trap_info(seq, bus, &sh);
3056        if (error < 0)
3057                goto done;
3058
3059        error = brcmf_sdio_dump_console(seq, bus, &sh);
3060
3061done:
3062        return error;
3063}
3064
3065static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3066{
3067        struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3068        struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3069
3070        return brcmf_sdio_died_dump(seq, bus);
3071}
3072
3073static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3074{
3075        struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3076        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3077        struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3078
3079        seq_printf(seq,
3080                   "intrcount:    %u\nlastintrs:    %u\n"
3081                   "pollcnt:      %u\nregfails:     %u\n"
3082                   "tx_sderrs:    %u\nfcqueued:     %u\n"
3083                   "rxrtx:        %u\nrx_toolong:   %u\n"
3084                   "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3085                   "rx_badhdr:    %u\nrx_badseq:    %u\n"
3086                   "fc_rcvd:      %u\nfc_xoff:      %u\n"
3087                   "fc_xon:       %u\nrxglomfail:   %u\n"
3088                   "rxglomframes: %u\nrxglompkts:   %u\n"
3089                   "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3090                   "f2txdata:     %u\nf1regdata:    %u\n"
3091                   "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3092                   "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3093                   "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3094                   sdcnt->intrcount, sdcnt->lastintrs,
3095                   sdcnt->pollcnt, sdcnt->regfails,
3096                   sdcnt->tx_sderrs, sdcnt->fcqueued,
3097                   sdcnt->rxrtx, sdcnt->rx_toolong,
3098                   sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3099                   sdcnt->rx_badhdr, sdcnt->rx_badseq,
3100                   sdcnt->fc_rcvd, sdcnt->fc_xoff,
3101                   sdcnt->fc_xon, sdcnt->rxglomfail,
3102                   sdcnt->rxglomframes, sdcnt->rxglompkts,
3103                   sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3104                   sdcnt->f2txdata, sdcnt->f1regdata,
3105                   sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3106                   sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3107                   sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3108
3109        return 0;
3110}
3111
3112static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3113{
3114        struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3115        struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3116
3117        if (IS_ERR_OR_NULL(dentry))
3118                return;
3119
3120        bus->console_interval = BRCMF_CONSOLE;
3121
3122        brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3123        brcmf_debugfs_add_entry(drvr, "counters",
3124                                brcmf_debugfs_sdio_count_read);
3125        debugfs_create_u32("console_interval", 0644, dentry,
3126                           &bus->console_interval);
3127}
3128#else
3129static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3130{
3131        return 0;
3132}
3133
3134static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3135{
3136}
3137#endif /* DEBUG */
3138
3139static int
3140brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3141{
3142        int timeleft;
3143        uint rxlen = 0;
3144        bool pending;
3145        u8 *buf;
3146        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3147        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3148        struct brcmf_sdio *bus = sdiodev->bus;
3149
3150        brcmf_dbg(TRACE, "Enter\n");
3151        if (sdiodev->state != BRCMF_SDIOD_DATA)
3152                return -EIO;
3153
3154        /* Wait until control frame is available */
3155        timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3156
3157        spin_lock_bh(&bus->rxctl_lock);
3158        rxlen = bus->rxlen;
3159        memcpy(msg, bus->rxctl, min(msglen, rxlen));
3160        bus->rxctl = NULL;
3161        buf = bus->rxctl_orig;
3162        bus->rxctl_orig = NULL;
3163        bus->rxlen = 0;
3164        spin_unlock_bh(&bus->rxctl_lock);
3165        vfree(buf);
3166
3167        if (rxlen) {
3168                brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3169                          rxlen, msglen);
3170        } else if (timeleft == 0) {
3171                brcmf_err("resumed on timeout\n");
3172                brcmf_sdio_checkdied(bus);
3173        } else if (pending) {
3174                brcmf_dbg(CTL, "cancelled\n");
3175                return -ERESTARTSYS;
3176        } else {
3177                brcmf_dbg(CTL, "resumed for unknown reason?\n");
3178                brcmf_sdio_checkdied(bus);
3179        }
3180
3181        if (rxlen)
3182                bus->sdcnt.rx_ctlpkts++;
3183        else
3184                bus->sdcnt.rx_ctlerrs++;
3185
3186        return rxlen ? (int)rxlen : -ETIMEDOUT;
3187}
3188
3189#ifdef DEBUG
3190static bool
3191brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3192                        u8 *ram_data, uint ram_sz)
3193{
3194        char *ram_cmp;
3195        int err;
3196        bool ret = true;
3197        int address;
3198        int offset;
3199        int len;
3200
3201        /* read back and verify */
3202        brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3203                  ram_sz);
3204        ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3205        /* do not proceed while no memory but  */
3206        if (!ram_cmp)
3207                return true;
3208
3209        address = ram_addr;
3210        offset = 0;
3211        while (offset < ram_sz) {
3212                len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3213                      ram_sz - offset;
3214                err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3215                if (err) {
3216                        brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3217                                  err, len, address);
3218                        ret = false;
3219                        break;
3220                } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3221                        brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3222                                  offset, len);
3223                        ret = false;
3224                        break;
3225                }
3226                offset += len;
3227                address += len;
3228        }
3229
3230        kfree(ram_cmp);
3231
3232        return ret;
3233}
3234#else   /* DEBUG */
3235static bool
3236brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3237                        u8 *ram_data, uint ram_sz)
3238{
3239        return true;
3240}
3241#endif  /* DEBUG */
3242
3243static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3244                                         const struct firmware *fw)
3245{
3246        int err;
3247
3248        brcmf_dbg(TRACE, "Enter\n");
3249
3250        err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3251                                (u8 *)fw->data, fw->size);
3252        if (err)
3253                brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3254                          err, (int)fw->size, bus->ci->rambase);
3255        else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3256                                          (u8 *)fw->data, fw->size))
3257                err = -EIO;
3258
3259        return err;
3260}
3261
3262static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3263                                     void *vars, u32 varsz)
3264{
3265        int address;
3266        int err;
3267
3268        brcmf_dbg(TRACE, "Enter\n");
3269
3270        address = bus->ci->ramsize - varsz + bus->ci->rambase;
3271        err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3272        if (err)
3273                brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3274                          err, varsz, address);
3275        else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3276                err = -EIO;
3277
3278        return err;
3279}
3280
3281static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3282                                        const struct firmware *fw,
3283                                        void *nvram, u32 nvlen)
3284{
3285        int bcmerror;
3286        u32 rstvec;
3287
3288        sdio_claim_host(bus->sdiodev->func[1]);
3289        brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3290
3291        rstvec = get_unaligned_le32(fw->data);
3292        brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3293
3294        bcmerror = brcmf_sdio_download_code_file(bus, fw);
3295        release_firmware(fw);
3296        if (bcmerror) {
3297                brcmf_err("dongle image file download failed\n");
3298                brcmf_fw_nvram_free(nvram);
3299                goto err;
3300        }
3301
3302        bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3303        brcmf_fw_nvram_free(nvram);
3304        if (bcmerror) {
3305                brcmf_err("dongle nvram file download failed\n");
3306                goto err;
3307        }
3308
3309        /* Take arm out of reset */
3310        if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3311                brcmf_err("error getting out of ARM core reset\n");
3312                goto err;
3313        }
3314
3315err:
3316        brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3317        sdio_release_host(bus->sdiodev->func[1]);
3318        return bcmerror;
3319}
3320
3321static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3322{
3323        int err = 0;
3324        u8 val;
3325
3326        brcmf_dbg(TRACE, "Enter\n");
3327
3328        val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3329        if (err) {
3330                brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3331                return;
3332        }
3333
3334        val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3335        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3336        if (err) {
3337                brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3338                return;
3339        }
3340
3341        /* Add CMD14 Support */
3342        brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3343                          (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3344                           SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3345                          &err);
3346        if (err) {
3347                brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3348                return;
3349        }
3350
3351        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3352                          SBSDIO_FORCE_HT, &err);
3353        if (err) {
3354                brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3355                return;
3356        }
3357
3358        /* set flag */
3359        bus->sr_enabled = true;
3360        brcmf_dbg(INFO, "SR enabled\n");
3361}
3362
3363/* enable KSO bit */
3364static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3365{
3366        u8 val;
3367        int err = 0;
3368
3369        brcmf_dbg(TRACE, "Enter\n");
3370
3371        /* KSO bit added in SDIO core rev 12 */
3372        if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3373                return 0;
3374
3375        val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3376        if (err) {
3377                brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3378                return err;
3379        }
3380
3381        if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3382                val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3383                        SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3384                brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3385                                  val, &err);
3386                if (err) {
3387                        brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3388                        return err;
3389                }
3390        }
3391
3392        return 0;
3393}
3394
3395
3396static int brcmf_sdio_bus_preinit(struct device *dev)
3397{
3398        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3399        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3400        struct brcmf_sdio *bus = sdiodev->bus;
3401        uint pad_size;
3402        u32 value;
3403        int err;
3404
3405        /* the commands below use the terms tx and rx from
3406         * a device perspective, ie. bus:txglom affects the
3407         * bus transfers from device to host.
3408         */
3409        if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3410                /* for sdio core rev < 12, disable txgloming */
3411                value = 0;
3412                err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3413                                           sizeof(u32));
3414        } else {
3415                /* otherwise, set txglomalign */
3416                value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3417                /* SDIO ADMA requires at least 32 bit alignment */
3418                value = max_t(u32, value, 4);
3419                err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3420                                           sizeof(u32));
3421        }
3422
3423        if (err < 0)
3424                goto done;
3425
3426        bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3427        if (sdiodev->sg_support) {
3428                bus->txglom = false;
3429                value = 1;
3430                pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3431                err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3432                                           &value, sizeof(u32));
3433                if (err < 0) {
3434                        /* bus:rxglom is allowed to fail */
3435                        err = 0;
3436                } else {
3437                        bus->txglom = true;
3438                        bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3439                }
3440        }
3441        brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3442
3443done:
3444        return err;
3445}
3446
3447static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3448{
3449        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3450        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3451        struct brcmf_sdio *bus = sdiodev->bus;
3452
3453        return bus->ci->ramsize - bus->ci->srsize;
3454}
3455
3456static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3457                                      size_t mem_size)
3458{
3459        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3460        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3461        struct brcmf_sdio *bus = sdiodev->bus;
3462        int err;
3463        int address;
3464        int offset;
3465        int len;
3466
3467        brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3468                  mem_size);
3469
3470        address = bus->ci->rambase;
3471        offset = err = 0;
3472        sdio_claim_host(sdiodev->func[1]);
3473        while (offset < mem_size) {
3474                len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3475                      mem_size - offset;
3476                err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3477                if (err) {
3478                        brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3479                                  err, len, address);
3480                        goto done;
3481                }
3482                data += len;
3483                offset += len;
3484                address += len;
3485        }
3486
3487done:
3488        sdio_release_host(sdiodev->func[1]);
3489        return err;
3490}
3491
3492void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3493{
3494        if (!bus->dpc_triggered) {
3495                bus->dpc_triggered = true;
3496                queue_work(bus->brcmf_wq, &bus->datawork);
3497        }
3498}
3499
3500void brcmf_sdio_isr(struct brcmf_sdio *bus)
3501{
3502        brcmf_dbg(TRACE, "Enter\n");
3503
3504        if (!bus) {
3505                brcmf_err("bus is null pointer, exiting\n");
3506                return;
3507        }
3508
3509        /* Count the interrupt call */
3510        bus->sdcnt.intrcount++;
3511        if (in_interrupt())
3512                atomic_set(&bus->ipend, 1);
3513        else
3514                if (brcmf_sdio_intr_rstatus(bus)) {
3515                        brcmf_err("failed backplane access\n");
3516                }
3517
3518        /* Disable additional interrupts (is this needed now)? */
3519        if (!bus->intr)
3520                brcmf_err("isr w/o interrupt configured!\n");
3521
3522        bus->dpc_triggered = true;
3523        queue_work(bus->brcmf_wq, &bus->datawork);
3524}
3525
3526static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3527{
3528        brcmf_dbg(TIMER, "Enter\n");
3529
3530        /* Poll period: check device if appropriate. */
3531        if (!bus->sr_enabled &&
3532            bus->poll && (++bus->polltick >= bus->pollrate)) {
3533                u32 intstatus = 0;
3534
3535                /* Reset poll tick */
3536                bus->polltick = 0;
3537
3538                /* Check device if no interrupts */
3539                if (!bus->intr ||
3540                    (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3541
3542                        if (!bus->dpc_triggered) {
3543                                u8 devpend;
3544
3545                                sdio_claim_host(bus->sdiodev->func[1]);
3546                                devpend = brcmf_sdiod_regrb(bus->sdiodev,
3547                                                            SDIO_CCCR_INTx,
3548                                                            NULL);
3549                                sdio_release_host(bus->sdiodev->func[1]);
3550                                intstatus = devpend & (INTR_STATUS_FUNC1 |
3551                                                       INTR_STATUS_FUNC2);
3552                        }
3553
3554                        /* If there is something, make like the ISR and
3555                                 schedule the DPC */
3556                        if (intstatus) {
3557                                bus->sdcnt.pollcnt++;
3558                                atomic_set(&bus->ipend, 1);
3559
3560                                bus->dpc_triggered = true;
3561                                queue_work(bus->brcmf_wq, &bus->datawork);
3562                        }
3563                }
3564
3565                /* Update interrupt tracking */
3566                bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3567        }
3568#ifdef DEBUG
3569        /* Poll for console output periodically */
3570        if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3571            bus->console_interval != 0) {
3572                bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3573                if (bus->console.count >= bus->console_interval) {
3574                        bus->console.count -= bus->console_interval;
3575                        sdio_claim_host(bus->sdiodev->func[1]);
3576                        /* Make sure backplane clock is on */
3577                        brcmf_sdio_bus_sleep(bus, false, false);
3578                        if (brcmf_sdio_readconsole(bus) < 0)
3579                                /* stop on error */
3580                                bus->console_interval = 0;
3581                        sdio_release_host(bus->sdiodev->func[1]);
3582                }
3583        }
3584#endif                          /* DEBUG */
3585
3586        /* On idle timeout clear activity flag and/or turn off clock */
3587        if (!bus->dpc_triggered) {
3588                rmb();
3589                if ((!bus->dpc_running) && (bus->idletime > 0) &&
3590                    (bus->clkstate == CLK_AVAIL)) {
3591                        bus->idlecount++;
3592                        if (bus->idlecount > bus->idletime) {
3593                                brcmf_dbg(SDIO, "idle\n");
3594                                sdio_claim_host(bus->sdiodev->func[1]);
3595                                brcmf_sdio_wd_timer(bus, false);
3596                                bus->idlecount = 0;
3597                                brcmf_sdio_bus_sleep(bus, true, false);
3598                                sdio_release_host(bus->sdiodev->func[1]);
3599                        }
3600                } else {
3601                        bus->idlecount = 0;
3602                }
3603        } else {
3604                bus->idlecount = 0;
3605        }
3606}
3607
3608static void brcmf_sdio_dataworker(struct work_struct *work)
3609{
3610        struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3611                                              datawork);
3612
3613        bus->dpc_running = true;
3614        wmb();
3615        while (ACCESS_ONCE(bus->dpc_triggered)) {
3616                bus->dpc_triggered = false;
3617                brcmf_sdio_dpc(bus);
3618                bus->idlecount = 0;
3619        }
3620        bus->dpc_running = false;
3621        if (brcmf_sdiod_freezing(bus->sdiodev)) {
3622                brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3623                brcmf_sdiod_try_freeze(bus->sdiodev);
3624                brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3625        }
3626}
3627
3628static void
3629brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3630                             struct brcmf_chip *ci, u32 drivestrength)
3631{
3632        const struct sdiod_drive_str *str_tab = NULL;
3633        u32 str_mask;
3634        u32 str_shift;
3635        u32 i;
3636        u32 drivestrength_sel = 0;
3637        u32 cc_data_temp;
3638        u32 addr;
3639
3640        if (!(ci->cc_caps & CC_CAP_PMU))
3641                return;
3642
3643        switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3644        case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3645                str_tab = sdiod_drvstr_tab1_1v8;
3646                str_mask = 0x00003800;
3647                str_shift = 11;
3648                break;
3649        case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3650                str_tab = sdiod_drvstr_tab6_1v8;
3651                str_mask = 0x00001800;
3652                str_shift = 11;
3653                break;
3654        case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3655                /* note: 43143 does not support tristate */
3656                i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3657                if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3658                        str_tab = sdiod_drvstr_tab2_3v3;
3659                        str_mask = 0x00000007;
3660                        str_shift = 0;
3661                } else
3662                        brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3663                                  ci->name, drivestrength);
3664                break;
3665        case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3666                str_tab = sdiod_drive_strength_tab5_1v8;
3667                str_mask = 0x00003800;
3668                str_shift = 11;
3669                break;
3670        default:
3671                brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3672                          ci->name, ci->chiprev, ci->pmurev);
3673                break;
3674        }
3675
3676        if (str_tab != NULL) {
3677                struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3678
3679                for (i = 0; str_tab[i].strength != 0; i++) {
3680                        if (drivestrength >= str_tab[i].strength) {
3681                                drivestrength_sel = str_tab[i].sel;
3682                                break;
3683                        }
3684                }
3685                addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3686                brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3687                cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3688                cc_data_temp &= ~str_mask;
3689                drivestrength_sel <<= str_shift;
3690                cc_data_temp |= drivestrength_sel;
3691                brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3692
3693                brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3694                          str_tab[i].strength, drivestrength, cc_data_temp);
3695        }
3696}
3697
3698static int brcmf_sdio_buscoreprep(void *ctx)
3699{
3700        struct brcmf_sdio_dev *sdiodev = ctx;
3701        int err = 0;
3702        u8 clkval, clkset;
3703
3704        /* Try forcing SDIO core to do ALPAvail request only */
3705        clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3706        brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3707        if (err) {
3708                brcmf_err("error writing for HT off\n");
3709                return err;
3710        }
3711
3712        /* If register supported, wait for ALPAvail and then force ALP */
3713        /* This may take up to 15 milliseconds */
3714        clkval = brcmf_sdiod_regrb(sdiodev,
3715                                   SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3716
3717        if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3718                brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3719                          clkset, clkval);
3720                return -EACCES;
3721        }
3722
3723        SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3724                                              SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3725                        !SBSDIO_ALPAV(clkval)),
3726                        PMU_MAX_TRANSITION_DLY);
3727        if (!SBSDIO_ALPAV(clkval)) {
3728                brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3729                          clkval);
3730                return -EBUSY;
3731        }
3732
3733        clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3734        brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3735        udelay(65);
3736
3737        /* Also, disable the extra SDIO pull-ups */
3738        brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3739
3740        return 0;
3741}
3742
3743static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3744                                        u32 rstvec)
3745{
3746        struct brcmf_sdio_dev *sdiodev = ctx;
3747        struct brcmf_core *core;
3748        u32 reg_addr;
3749
3750        /* clear all interrupts */
3751        core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3752        reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3753        brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3754
3755        if (rstvec)
3756                /* Write reset vector to address 0 */
3757                brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3758                                  sizeof(rstvec));
3759}
3760
3761static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3762{
3763        struct brcmf_sdio_dev *sdiodev = ctx;
3764        u32 val, rev;
3765
3766        val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3767        if ((sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 ||
3768             sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4339) &&
3769            addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3770                rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3771                if (rev >= 2) {
3772                        val &= ~CID_ID_MASK;
3773                        val |= BRCM_CC_4339_CHIP_ID;
3774                }
3775        }
3776        return val;
3777}
3778
3779static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3780{
3781        struct brcmf_sdio_dev *sdiodev = ctx;
3782
3783        brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3784}
3785
3786static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3787        .prepare = brcmf_sdio_buscoreprep,
3788        .activate = brcmf_sdio_buscore_activate,
3789        .read32 = brcmf_sdio_buscore_read32,
3790        .write32 = brcmf_sdio_buscore_write32,
3791};
3792
3793static bool
3794brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3795{
3796        struct brcmf_sdio_dev *sdiodev;
3797        u8 clkctl = 0;
3798        int err = 0;
3799        int reg_addr;
3800        u32 reg_val;
3801        u32 drivestrength;
3802
3803        sdiodev = bus->sdiodev;
3804        sdio_claim_host(sdiodev->func[1]);
3805
3806        pr_debug("F1 signature read @0x18000000=0x%4x\n",
3807                 brcmf_sdiod_regrl(sdiodev, SI_ENUM_BASE, NULL));
3808
3809        /*
3810         * Force PLL off until brcmf_chip_attach()
3811         * programs PLL control regs
3812         */
3813
3814        brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3815                          BRCMF_INIT_CLKCTL1, &err);
3816        if (!err)
3817                clkctl = brcmf_sdiod_regrb(sdiodev,
3818                                           SBSDIO_FUNC1_CHIPCLKCSR, &err);
3819
3820        if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3821                brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3822                          err, BRCMF_INIT_CLKCTL1, clkctl);
3823                goto fail;
3824        }
3825
3826        bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3827        if (IS_ERR(bus->ci)) {
3828                brcmf_err("brcmf_chip_attach failed!\n");
3829                bus->ci = NULL;
3830                goto fail;
3831        }
3832        sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3833                                                   BRCMF_BUSTYPE_SDIO,
3834                                                   bus->ci->chip,
3835                                                   bus->ci->chiprev);
3836        if (!sdiodev->settings) {
3837                brcmf_err("Failed to get device parameters\n");
3838                goto fail;
3839        }
3840        /* platform specific configuration:
3841         *   alignments must be at least 4 bytes for ADMA
3842         */
3843        bus->head_align = ALIGNMENT;
3844        bus->sgentry_align = ALIGNMENT;
3845        if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3846                bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3847        if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3848                bus->sgentry_align =
3849                                sdiodev->settings->bus.sdio.sd_sgentry_align;
3850
3851        /* allocate scatter-gather table. sg support
3852         * will be disabled upon allocation failure.
3853         */
3854        brcmf_sdiod_sgtable_alloc(sdiodev);
3855
3856#ifdef CONFIG_PM_SLEEP
3857        /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3858         * is true or when platform data OOB irq is true).
3859         */
3860        if ((sdio_get_host_pm_caps(sdiodev->func[1]) & MMC_PM_KEEP_POWER) &&
3861            ((sdio_get_host_pm_caps(sdiodev->func[1]) & MMC_PM_WAKE_SDIO_IRQ) ||
3862             (sdiodev->settings->bus.sdio.oob_irq_supported)))
3863                sdiodev->bus_if->wowl_supported = true;
3864#endif
3865
3866        if (brcmf_sdio_kso_init(bus)) {
3867                brcmf_err("error enabling KSO\n");
3868                goto fail;
3869        }
3870
3871        if (sdiodev->settings->bus.sdio.drive_strength)
3872                drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3873        else
3874                drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3875        brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3876
3877        /* Set card control so an SDIO card reset does a WLAN backplane reset */
3878        reg_val = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3879        if (err)
3880                goto fail;
3881
3882        reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3883
3884        brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3885        if (err)
3886                goto fail;
3887
3888        /* set PMUControl so a backplane reset does PMU state reload */
3889        reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
3890        reg_val = brcmf_sdiod_regrl(sdiodev, reg_addr, &err);
3891        if (err)
3892                goto fail;
3893
3894        reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3895
3896        brcmf_sdiod_regwl(sdiodev, reg_addr, reg_val, &err);
3897        if (err)
3898                goto fail;
3899
3900        sdio_release_host(sdiodev->func[1]);
3901
3902        brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3903
3904        /* allocate header buffer */
3905        bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3906        if (!bus->hdrbuf)
3907                return false;
3908        /* Locate an appropriately-aligned portion of hdrbuf */
3909        bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3910                                    bus->head_align);
3911
3912        /* Set the poll and/or interrupt flags */
3913        bus->intr = true;
3914        bus->poll = false;
3915        if (bus->poll)
3916                bus->pollrate = 1;
3917
3918        return true;
3919
3920fail:
3921        sdio_release_host(sdiodev->func[1]);
3922        return false;
3923}
3924
3925static int
3926brcmf_sdio_watchdog_thread(void *data)
3927{
3928        struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3929        int wait;
3930
3931        allow_signal(SIGTERM);
3932        /* Run until signal received */
3933        brcmf_sdiod_freezer_count(bus->sdiodev);
3934        while (1) {
3935                if (kthread_should_stop())
3936                        break;
3937                brcmf_sdiod_freezer_uncount(bus->sdiodev);
3938                wait = wait_for_completion_interruptible(&bus->watchdog_wait);
3939                brcmf_sdiod_freezer_count(bus->sdiodev);
3940                brcmf_sdiod_try_freeze(bus->sdiodev);
3941                if (!wait) {
3942                        brcmf_sdio_bus_watchdog(bus);
3943                        /* Count the tick for reference */
3944                        bus->sdcnt.tickcnt++;
3945                        reinit_completion(&bus->watchdog_wait);
3946                } else
3947                        break;
3948        }
3949        return 0;
3950}
3951
3952static void
3953brcmf_sdio_watchdog(unsigned long data)
3954{
3955        struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3956
3957        if (bus->watchdog_tsk) {
3958                complete(&bus->watchdog_wait);
3959                /* Reschedule the watchdog */
3960                if (bus->wd_active)
3961                        mod_timer(&bus->timer,
3962                                  jiffies + BRCMF_WD_POLL);
3963        }
3964}
3965
3966static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3967        .stop = brcmf_sdio_bus_stop,
3968        .preinit = brcmf_sdio_bus_preinit,
3969        .txdata = brcmf_sdio_bus_txdata,
3970        .txctl = brcmf_sdio_bus_txctl,
3971        .rxctl = brcmf_sdio_bus_rxctl,
3972        .gettxq = brcmf_sdio_bus_gettxq,
3973        .wowl_config = brcmf_sdio_wowl_config,
3974        .get_ramsize = brcmf_sdio_bus_get_ramsize,
3975        .get_memdump = brcmf_sdio_bus_get_memdump,
3976};
3977
3978static void brcmf_sdio_firmware_callback(struct device *dev,
3979                                         const struct firmware *code,
3980                                         void *nvram, u32 nvram_len)
3981{
3982        struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3983        struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3984        struct brcmf_sdio *bus = sdiodev->bus;
3985        int err = 0;
3986        u8 saveclk;
3987
3988        brcmf_dbg(TRACE, "Enter: dev=%s\n", dev_name(dev));
3989
3990        if (!bus_if->drvr)
3991                return;
3992
3993        /* try to download image and nvram to the dongle */
3994        bus->alp_only = true;
3995        err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
3996        if (err)
3997                goto fail;
3998        bus->alp_only = false;
3999
4000        /* Start the watchdog timer */
4001        bus->sdcnt.tickcnt = 0;
4002        brcmf_sdio_wd_timer(bus, true);
4003
4004        sdio_claim_host(sdiodev->func[1]);
4005
4006        /* Make sure backplane clock is on, needed to generate F2 interrupt */
4007        brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4008        if (bus->clkstate != CLK_AVAIL)
4009                goto release;
4010
4011        /* Force clocks on backplane to be sure F2 interrupt propagates */
4012        saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4013        if (!err) {
4014                brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4015                                  (saveclk | SBSDIO_FORCE_HT), &err);
4016        }
4017        if (err) {
4018                brcmf_err("Failed to force clock for F2: err %d\n", err);
4019                goto release;
4020        }
4021
4022        /* Enable function 2 (frame transfers) */
4023        w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
4024                  offsetof(struct sdpcmd_regs, tosbmailboxdata));
4025        err = sdio_enable_func(sdiodev->func[SDIO_FUNC_2]);
4026
4027
4028        brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4029
4030        /* If F2 successfully enabled, set core and enable interrupts */
4031        if (!err) {
4032                /* Set up the interrupt mask and enable interrupts */
4033                bus->hostintmask = HOSTINTMASK;
4034                w_sdreg32(bus, bus->hostintmask,
4035                          offsetof(struct sdpcmd_regs, hostintmask));
4036
4037                brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
4038        } else {
4039                /* Disable F2 again */
4040                sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
4041                goto release;
4042        }
4043
4044        if (brcmf_chip_sr_capable(bus->ci)) {
4045                brcmf_sdio_sr_init(bus);
4046        } else {
4047                /* Restore previous clock setting */
4048                brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4049                                  saveclk, &err);
4050        }
4051
4052        if (err == 0) {
4053                /* Allow full data communication using DPC from now on. */
4054                brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4055
4056                err = brcmf_sdiod_intr_register(sdiodev);
4057                if (err != 0)
4058                        brcmf_err("intr register failed:%d\n", err);
4059        }
4060
4061        /* If we didn't come up, turn off backplane clock */
4062        if (err != 0)
4063                brcmf_sdio_clkctl(bus, CLK_NONE, false);
4064
4065        sdio_release_host(sdiodev->func[1]);
4066
4067        err = brcmf_bus_start(dev);
4068        if (err != 0) {
4069                brcmf_err("dongle is not responding\n");
4070                goto fail;
4071        }
4072        return;
4073
4074release:
4075        sdio_release_host(sdiodev->func[1]);
4076fail:
4077        brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4078        device_release_driver(dev);
4079}
4080
4081struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4082{
4083        int ret;
4084        struct brcmf_sdio *bus;
4085        struct workqueue_struct *wq;
4086
4087        brcmf_dbg(TRACE, "Enter\n");
4088
4089        /* Allocate private bus interface state */
4090        bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4091        if (!bus)
4092                goto fail;
4093
4094        bus->sdiodev = sdiodev;
4095        sdiodev->bus = bus;
4096        skb_queue_head_init(&bus->glom);
4097        bus->txbound = BRCMF_TXBOUND;
4098        bus->rxbound = BRCMF_RXBOUND;
4099        bus->txminmax = BRCMF_TXMINMAX;
4100        bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4101
4102        /* single-threaded workqueue */
4103        wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4104                                     dev_name(&sdiodev->func[1]->dev));
4105        if (!wq) {
4106                brcmf_err("insufficient memory to create txworkqueue\n");
4107                goto fail;
4108        }
4109        brcmf_sdiod_freezer_count(sdiodev);
4110        INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4111        bus->brcmf_wq = wq;
4112
4113        /* attempt to attach to the dongle */
4114        if (!(brcmf_sdio_probe_attach(bus))) {
4115                brcmf_err("brcmf_sdio_probe_attach failed\n");
4116                goto fail;
4117        }
4118
4119        spin_lock_init(&bus->rxctl_lock);
4120        spin_lock_init(&bus->txq_lock);
4121        init_waitqueue_head(&bus->ctrl_wait);
4122        init_waitqueue_head(&bus->dcmd_resp_wait);
4123
4124        /* Set up the watchdog timer */
4125        init_timer(&bus->timer);
4126        bus->timer.data = (unsigned long)bus;
4127        bus->timer.function = brcmf_sdio_watchdog;
4128
4129        /* Initialize watchdog thread */
4130        init_completion(&bus->watchdog_wait);
4131        bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4132                                        bus, "brcmf_wdog/%s",
4133                                        dev_name(&sdiodev->func[1]->dev));
4134        if (IS_ERR(bus->watchdog_tsk)) {
4135                pr_warn("brcmf_watchdog thread failed to start\n");
4136                bus->watchdog_tsk = NULL;
4137        }
4138        /* Initialize DPC thread */
4139        bus->dpc_triggered = false;
4140        bus->dpc_running = false;
4141
4142        /* Assign bus interface call back */
4143        bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4144        bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4145        bus->sdiodev->bus_if->chip = bus->ci->chip;
4146        bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4147
4148        /* default sdio bus header length for tx packet */
4149        bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4150
4151        /* Attach to the common layer, reserve hdr space */
4152        ret = brcmf_attach(bus->sdiodev->dev, bus->sdiodev->settings);
4153        if (ret != 0) {
4154                brcmf_err("brcmf_attach failed\n");
4155                goto fail;
4156        }
4157
4158        /* allocate scatter-gather table. sg support
4159         * will be disabled upon allocation failure.
4160         */
4161        brcmf_sdiod_sgtable_alloc(bus->sdiodev);
4162
4163        /* Query the F2 block size, set roundup accordingly */
4164        bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4165        bus->roundup = min(max_roundup, bus->blocksize);
4166
4167        /* Allocate buffers */
4168        if (bus->sdiodev->bus_if->maxctl) {
4169                bus->sdiodev->bus_if->maxctl += bus->roundup;
4170                bus->rxblen =
4171                    roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4172                            ALIGNMENT) + bus->head_align;
4173                bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4174                if (!(bus->rxbuf)) {
4175                        brcmf_err("rxbuf allocation failed\n");
4176                        goto fail;
4177                }
4178        }
4179
4180        sdio_claim_host(bus->sdiodev->func[1]);
4181
4182        /* Disable F2 to clear any intermediate frame state on the dongle */
4183        sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4184
4185        bus->rxflow = false;
4186
4187        /* Done with backplane-dependent accesses, can drop clock... */
4188        brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4189
4190        sdio_release_host(bus->sdiodev->func[1]);
4191
4192        /* ...and initialize clock/power states */
4193        bus->clkstate = CLK_SDONLY;
4194        bus->idletime = BRCMF_IDLE_INTERVAL;
4195        bus->idleclock = BRCMF_IDLE_ACTIVE;
4196
4197        /* SR state */
4198        bus->sr_enabled = false;
4199
4200        brcmf_sdio_debugfs_create(bus);
4201        brcmf_dbg(INFO, "completed!!\n");
4202
4203        ret = brcmf_fw_map_chip_to_name(bus->ci->chip, bus->ci->chiprev,
4204                                        brcmf_sdio_fwnames,
4205                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4206                                        sdiodev->fw_name, sdiodev->nvram_name);
4207        if (ret)
4208                goto fail;
4209
4210        ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
4211                                     sdiodev->fw_name, sdiodev->nvram_name,
4212                                     brcmf_sdio_firmware_callback);
4213        if (ret != 0) {
4214                brcmf_err("async firmware request failed: %d\n", ret);
4215                goto fail;
4216        }
4217
4218        return bus;
4219
4220fail:
4221        brcmf_sdio_remove(bus);
4222        return NULL;
4223}
4224
4225/* Detach and free everything */
4226void brcmf_sdio_remove(struct brcmf_sdio *bus)
4227{
4228        brcmf_dbg(TRACE, "Enter\n");
4229
4230        if (bus) {
4231                /* De-register interrupt handler */
4232                brcmf_sdiod_intr_unregister(bus->sdiodev);
4233
4234                brcmf_detach(bus->sdiodev->dev);
4235
4236                cancel_work_sync(&bus->datawork);
4237                if (bus->brcmf_wq)
4238                        destroy_workqueue(bus->brcmf_wq);
4239
4240                if (bus->ci) {
4241                        if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4242                                sdio_claim_host(bus->sdiodev->func[1]);
4243                                brcmf_sdio_wd_timer(bus, false);
4244                                brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4245                                /* Leave the device in state where it is
4246                                 * 'passive'. This is done by resetting all
4247                                 * necessary cores.
4248                                 */
4249                                msleep(20);
4250                                brcmf_chip_set_passive(bus->ci);
4251                                brcmf_sdio_clkctl(bus, CLK_NONE, false);
4252                                sdio_release_host(bus->sdiodev->func[1]);
4253                        }
4254                        brcmf_chip_detach(bus->ci);
4255                }
4256                if (bus->sdiodev->settings)
4257                        brcmf_release_module_param(bus->sdiodev->settings);
4258
4259                kfree(bus->rxbuf);
4260                kfree(bus->hdrbuf);
4261                kfree(bus);
4262        }
4263
4264        brcmf_dbg(TRACE, "Disconnected\n");
4265}
4266
4267void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4268{
4269        /* Totally stop the timer */
4270        if (!active && bus->wd_active) {
4271                del_timer_sync(&bus->timer);
4272                bus->wd_active = false;
4273                return;
4274        }
4275
4276        /* don't start the wd until fw is loaded */
4277        if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4278                return;
4279
4280        if (active) {
4281                if (!bus->wd_active) {
4282                        /* Create timer again when watchdog period is
4283                           dynamically changed or in the first instance
4284                         */
4285                        bus->timer.expires = jiffies + BRCMF_WD_POLL;
4286                        add_timer(&bus->timer);
4287                        bus->wd_active = true;
4288                } else {
4289                        /* Re arm the timer, at last watchdog period */
4290                        mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4291                }
4292        }
4293}
4294
4295int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4296{
4297        int ret;
4298
4299        sdio_claim_host(bus->sdiodev->func[1]);
4300        ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4301        sdio_release_host(bus->sdiodev->func[1]);
4302
4303        return ret;
4304}
4305
4306