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22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
27#include <linux/module.h>
28#include <linux/kthread.h>
29#include <linux/pci.h>
30#include <linux/spinlock.h>
31#include <linux/ctype.h>
32#include <linux/aer.h>
33#include <linux/slab.h>
34#include <linux/firmware.h>
35#include <linux/miscdevice.h>
36#include <linux/percpu.h>
37
38#include <scsi/scsi.h>
39#include <scsi/scsi_device.h>
40#include <scsi/scsi_host.h>
41#include <scsi/scsi_transport_fc.h>
42
43#include "lpfc_hw4.h"
44#include "lpfc_hw.h"
45#include "lpfc_sli.h"
46#include "lpfc_sli4.h"
47#include "lpfc_nl.h"
48#include "lpfc_disc.h"
49#include "lpfc_scsi.h"
50#include "lpfc.h"
51#include "lpfc_logmsg.h"
52#include "lpfc_crtn.h"
53#include "lpfc_vport.h"
54#include "lpfc_version.h"
55#include "lpfc_ids.h"
56
57char *_dump_buf_data;
58unsigned long _dump_buf_data_order;
59char *_dump_buf_dif;
60unsigned long _dump_buf_dif_order;
61spinlock_t _dump_buf_lock;
62
63
64uint16_t *lpfc_used_cpu;
65uint32_t lpfc_present_cpu;
66
67static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
68static int lpfc_post_rcv_buf(struct lpfc_hba *);
69static int lpfc_sli4_queue_verify(struct lpfc_hba *);
70static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
71static int lpfc_setup_endian_order(struct lpfc_hba *);
72static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
73static void lpfc_free_els_sgl_list(struct lpfc_hba *);
74static void lpfc_init_sgl_list(struct lpfc_hba *);
75static int lpfc_init_active_sgl_array(struct lpfc_hba *);
76static void lpfc_free_active_sgl(struct lpfc_hba *);
77static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
78static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
79static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
80static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
81static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
82static void lpfc_sli4_disable_intr(struct lpfc_hba *);
83static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
84static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
85
86static struct scsi_transport_template *lpfc_transport_template = NULL;
87static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
88static DEFINE_IDR(lpfc_hba_index);
89
90
91
92
93
94
95
96
97
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99
100
101
102
103
104int
105lpfc_config_port_prep(struct lpfc_hba *phba)
106{
107 lpfc_vpd_t *vp = &phba->vpd;
108 int i = 0, rc;
109 LPFC_MBOXQ_t *pmb;
110 MAILBOX_t *mb;
111 char *lpfc_vpd_data = NULL;
112 uint16_t offset = 0;
113 static char licensed[56] =
114 "key unlock for use with gnu public licensed code only\0";
115 static int init_key = 1;
116
117 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
118 if (!pmb) {
119 phba->link_state = LPFC_HBA_ERROR;
120 return -ENOMEM;
121 }
122
123 mb = &pmb->u.mb;
124 phba->link_state = LPFC_INIT_MBX_CMDS;
125
126 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
127 if (init_key) {
128 uint32_t *ptext = (uint32_t *) licensed;
129
130 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
131 *ptext = cpu_to_be32(*ptext);
132 init_key = 0;
133 }
134
135 lpfc_read_nv(phba, pmb);
136 memset((char*)mb->un.varRDnvp.rsvd3, 0,
137 sizeof (mb->un.varRDnvp.rsvd3));
138 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
139 sizeof (licensed));
140
141 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
142
143 if (rc != MBX_SUCCESS) {
144 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
145 "0324 Config Port initialization "
146 "error, mbxCmd x%x READ_NVPARM, "
147 "mbxStatus x%x\n",
148 mb->mbxCommand, mb->mbxStatus);
149 mempool_free(pmb, phba->mbox_mem_pool);
150 return -ERESTART;
151 }
152 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
153 sizeof(phba->wwnn));
154 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
155 sizeof(phba->wwpn));
156 }
157
158 phba->sli3_options = 0x0;
159
160
161 lpfc_read_rev(phba, pmb);
162 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
163 if (rc != MBX_SUCCESS) {
164 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
165 "0439 Adapter failed to init, mbxCmd x%x "
166 "READ_REV, mbxStatus x%x\n",
167 mb->mbxCommand, mb->mbxStatus);
168 mempool_free( pmb, phba->mbox_mem_pool);
169 return -ERESTART;
170 }
171
172
173
174
175
176
177 if (mb->un.varRdRev.rr == 0) {
178 vp->rev.rBit = 0;
179 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
180 "0440 Adapter failed to init, READ_REV has "
181 "missing revision information.\n");
182 mempool_free(pmb, phba->mbox_mem_pool);
183 return -ERESTART;
184 }
185
186 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
187 mempool_free(pmb, phba->mbox_mem_pool);
188 return -EINVAL;
189 }
190
191
192 vp->rev.rBit = 1;
193 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
194 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
195 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
196 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
197 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
198 vp->rev.biuRev = mb->un.varRdRev.biuRev;
199 vp->rev.smRev = mb->un.varRdRev.smRev;
200 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
201 vp->rev.endecRev = mb->un.varRdRev.endecRev;
202 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
203 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
204 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
205 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
206 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
207 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
208
209
210
211
212
213 if (vp->rev.feaLevelHigh < 9)
214 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
215
216 if (lpfc_is_LC_HBA(phba->pcidev->device))
217 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
218 sizeof (phba->RandomData));
219
220
221 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
222 if (!lpfc_vpd_data)
223 goto out_free_mbox;
224 do {
225 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
226 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
227
228 if (rc != MBX_SUCCESS) {
229 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
230 "0441 VPD not present on adapter, "
231 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
232 mb->mbxCommand, mb->mbxStatus);
233 mb->un.varDmp.word_cnt = 0;
234 }
235
236
237
238 if (mb->un.varDmp.word_cnt == 0)
239 break;
240 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
241 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
242 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
243 lpfc_vpd_data + offset,
244 mb->un.varDmp.word_cnt);
245 offset += mb->un.varDmp.word_cnt;
246 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
247 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
248
249 kfree(lpfc_vpd_data);
250out_free_mbox:
251 mempool_free(pmb, phba->mbox_mem_pool);
252 return 0;
253}
254
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262
263
264
265static void
266lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
267{
268 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
269 phba->temp_sensor_support = 1;
270 else
271 phba->temp_sensor_support = 0;
272 mempool_free(pmboxq, phba->mbox_mem_pool);
273 return;
274}
275
276
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283
284
285
286static void
287lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
288{
289 struct prog_id *prg;
290 uint32_t prog_id_word;
291 char dist = ' ';
292
293 char dist_char[] = "nabx";
294
295 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
296 mempool_free(pmboxq, phba->mbox_mem_pool);
297 return;
298 }
299
300 prg = (struct prog_id *) &prog_id_word;
301
302
303 prog_id_word = pmboxq->u.mb.un.varWords[7];
304
305
306 if (prg->dist < 4)
307 dist = dist_char[prg->dist];
308
309 if ((prg->dist == 3) && (prg->num == 0))
310 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
311 prg->ver, prg->rev, prg->lev);
312 else
313 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
314 prg->ver, prg->rev, prg->lev,
315 dist, prg->num);
316 mempool_free(pmboxq, phba->mbox_mem_pool);
317 return;
318}
319
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326
327
328
329void
330lpfc_update_vport_wwn(struct lpfc_vport *vport)
331{
332
333 if (vport->phba->cfg_soft_wwnn)
334 u64_to_wwn(vport->phba->cfg_soft_wwnn,
335 vport->fc_sparam.nodeName.u.wwn);
336 if (vport->phba->cfg_soft_wwpn)
337 u64_to_wwn(vport->phba->cfg_soft_wwpn,
338 vport->fc_sparam.portName.u.wwn);
339
340
341
342
343
344 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
345 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
346 sizeof(struct lpfc_name));
347 else
348 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
349 sizeof(struct lpfc_name));
350
351 if (vport->fc_portname.u.wwn[0] == 0 || vport->phba->cfg_soft_wwpn)
352 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
353 sizeof(struct lpfc_name));
354 else
355 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
356 sizeof(struct lpfc_name));
357}
358
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370
371
372int
373lpfc_config_port_post(struct lpfc_hba *phba)
374{
375 struct lpfc_vport *vport = phba->pport;
376 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
377 LPFC_MBOXQ_t *pmb;
378 MAILBOX_t *mb;
379 struct lpfc_dmabuf *mp;
380 struct lpfc_sli *psli = &phba->sli;
381 uint32_t status, timeout;
382 int i, j;
383 int rc;
384
385 spin_lock_irq(&phba->hbalock);
386
387
388
389
390 if (phba->over_temp_state == HBA_OVER_TEMP)
391 phba->over_temp_state = HBA_NORMAL_TEMP;
392 spin_unlock_irq(&phba->hbalock);
393
394 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
395 if (!pmb) {
396 phba->link_state = LPFC_HBA_ERROR;
397 return -ENOMEM;
398 }
399 mb = &pmb->u.mb;
400
401
402 rc = lpfc_read_sparam(phba, pmb, 0);
403 if (rc) {
404 mempool_free(pmb, phba->mbox_mem_pool);
405 return -ENOMEM;
406 }
407
408 pmb->vport = vport;
409 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
410 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
411 "0448 Adapter failed init, mbxCmd x%x "
412 "READ_SPARM mbxStatus x%x\n",
413 mb->mbxCommand, mb->mbxStatus);
414 phba->link_state = LPFC_HBA_ERROR;
415 mp = (struct lpfc_dmabuf *) pmb->context1;
416 mempool_free(pmb, phba->mbox_mem_pool);
417 lpfc_mbuf_free(phba, mp->virt, mp->phys);
418 kfree(mp);
419 return -EIO;
420 }
421
422 mp = (struct lpfc_dmabuf *) pmb->context1;
423
424 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
425 lpfc_mbuf_free(phba, mp->virt, mp->phys);
426 kfree(mp);
427 pmb->context1 = NULL;
428 lpfc_update_vport_wwn(vport);
429
430
431 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
432 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
433 fc_host_max_npiv_vports(shost) = phba->max_vpi;
434
435
436
437 if (phba->SerialNumber[0] == 0) {
438 uint8_t *outptr;
439
440 outptr = &vport->fc_nodename.u.s.IEEE[0];
441 for (i = 0; i < 12; i++) {
442 status = *outptr++;
443 j = ((status & 0xf0) >> 4);
444 if (j <= 9)
445 phba->SerialNumber[i] =
446 (char)((uint8_t) 0x30 + (uint8_t) j);
447 else
448 phba->SerialNumber[i] =
449 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
450 i++;
451 j = (status & 0xf);
452 if (j <= 9)
453 phba->SerialNumber[i] =
454 (char)((uint8_t) 0x30 + (uint8_t) j);
455 else
456 phba->SerialNumber[i] =
457 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
458 }
459 }
460
461 lpfc_read_config(phba, pmb);
462 pmb->vport = vport;
463 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
464 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
465 "0453 Adapter failed to init, mbxCmd x%x "
466 "READ_CONFIG, mbxStatus x%x\n",
467 mb->mbxCommand, mb->mbxStatus);
468 phba->link_state = LPFC_HBA_ERROR;
469 mempool_free( pmb, phba->mbox_mem_pool);
470 return -EIO;
471 }
472
473
474 lpfc_sli_read_link_ste(phba);
475
476
477 i = (mb->un.varRdConfig.max_xri + 1);
478 if (phba->cfg_hba_queue_depth > i) {
479 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
480 "3359 HBA queue depth changed from %d to %d\n",
481 phba->cfg_hba_queue_depth, i);
482 phba->cfg_hba_queue_depth = i;
483 }
484
485
486 i = (mb->un.varRdConfig.max_xri >> 3);
487 if (phba->pport->cfg_lun_queue_depth > i) {
488 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
489 "3360 LUN queue depth changed from %d to %d\n",
490 phba->pport->cfg_lun_queue_depth, i);
491 phba->pport->cfg_lun_queue_depth = i;
492 }
493
494 phba->lmt = mb->un.varRdConfig.lmt;
495
496
497 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
498
499 phba->link_state = LPFC_LINK_DOWN;
500
501
502 if (psli->ring[psli->extra_ring].sli.sli3.cmdringaddr)
503 psli->ring[psli->extra_ring].flag |= LPFC_STOP_IOCB_EVENT;
504 if (psli->ring[psli->fcp_ring].sli.sli3.cmdringaddr)
505 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
506 if (psli->ring[psli->next_ring].sli.sli3.cmdringaddr)
507 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
508
509
510 if (phba->sli_rev != 3)
511 lpfc_post_rcv_buf(phba);
512
513
514
515
516 if (phba->intr_type == MSIX) {
517 rc = lpfc_config_msi(phba, pmb);
518 if (rc) {
519 mempool_free(pmb, phba->mbox_mem_pool);
520 return -EIO;
521 }
522 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
523 if (rc != MBX_SUCCESS) {
524 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
525 "0352 Config MSI mailbox command "
526 "failed, mbxCmd x%x, mbxStatus x%x\n",
527 pmb->u.mb.mbxCommand,
528 pmb->u.mb.mbxStatus);
529 mempool_free(pmb, phba->mbox_mem_pool);
530 return -EIO;
531 }
532 }
533
534 spin_lock_irq(&phba->hbalock);
535
536 phba->hba_flag &= ~HBA_ERATT_HANDLED;
537
538
539 if (lpfc_readl(phba->HCregaddr, &status)) {
540 spin_unlock_irq(&phba->hbalock);
541 return -EIO;
542 }
543 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
544 if (psli->num_rings > 0)
545 status |= HC_R0INT_ENA;
546 if (psli->num_rings > 1)
547 status |= HC_R1INT_ENA;
548 if (psli->num_rings > 2)
549 status |= HC_R2INT_ENA;
550 if (psli->num_rings > 3)
551 status |= HC_R3INT_ENA;
552
553 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
554 (phba->cfg_poll & DISABLE_FCP_RING_INT))
555 status &= ~(HC_R0INT_ENA);
556
557 writel(status, phba->HCregaddr);
558 readl(phba->HCregaddr);
559 spin_unlock_irq(&phba->hbalock);
560
561
562 timeout = phba->fc_ratov * 2;
563 mod_timer(&vport->els_tmofunc,
564 jiffies + msecs_to_jiffies(1000 * timeout));
565
566 mod_timer(&phba->hb_tmofunc,
567 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
568 phba->hb_outstanding = 0;
569 phba->last_completion_time = jiffies;
570
571 mod_timer(&phba->eratt_poll,
572 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
573
574 if (phba->hba_flag & LINK_DISABLED) {
575 lpfc_printf_log(phba,
576 KERN_ERR, LOG_INIT,
577 "2598 Adapter Link is disabled.\n");
578 lpfc_down_link(phba, pmb);
579 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
580 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
581 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
582 lpfc_printf_log(phba,
583 KERN_ERR, LOG_INIT,
584 "2599 Adapter failed to issue DOWN_LINK"
585 " mbox command rc 0x%x\n", rc);
586
587 mempool_free(pmb, phba->mbox_mem_pool);
588 return -EIO;
589 }
590 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
591 mempool_free(pmb, phba->mbox_mem_pool);
592 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
593 if (rc)
594 return rc;
595 }
596
597 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
598 if (!pmb) {
599 phba->link_state = LPFC_HBA_ERROR;
600 return -ENOMEM;
601 }
602
603 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
604 pmb->mbox_cmpl = lpfc_config_async_cmpl;
605 pmb->vport = phba->pport;
606 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
607
608 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
609 lpfc_printf_log(phba,
610 KERN_ERR,
611 LOG_INIT,
612 "0456 Adapter failed to issue "
613 "ASYNCEVT_ENABLE mbox status x%x\n",
614 rc);
615 mempool_free(pmb, phba->mbox_mem_pool);
616 }
617
618
619 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
620 if (!pmb) {
621 phba->link_state = LPFC_HBA_ERROR;
622 return -ENOMEM;
623 }
624
625 lpfc_dump_wakeup_param(phba, pmb);
626 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
627 pmb->vport = phba->pport;
628 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
629
630 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
631 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
632 "to get Option ROM version status x%x\n", rc);
633 mempool_free(pmb, phba->mbox_mem_pool);
634 }
635
636 return 0;
637}
638
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651
652
653static int
654lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
655{
656 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
657}
658
659
660
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662
663
664
665
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669
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672
673
674int
675lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
676 uint32_t flag)
677{
678 struct lpfc_vport *vport = phba->pport;
679 LPFC_MBOXQ_t *pmb;
680 MAILBOX_t *mb;
681 int rc;
682
683 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
684 if (!pmb) {
685 phba->link_state = LPFC_HBA_ERROR;
686 return -ENOMEM;
687 }
688 mb = &pmb->u.mb;
689 pmb->vport = vport;
690
691 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
692 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
693 !(phba->lmt & LMT_1Gb)) ||
694 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
695 !(phba->lmt & LMT_2Gb)) ||
696 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
697 !(phba->lmt & LMT_4Gb)) ||
698 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
699 !(phba->lmt & LMT_8Gb)) ||
700 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
701 !(phba->lmt & LMT_10Gb)) ||
702 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
703 !(phba->lmt & LMT_16Gb)) ||
704 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
705 !(phba->lmt & LMT_32Gb))) {
706
707 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
708 "1302 Invalid speed for this board:%d "
709 "Reset link speed to auto.\n",
710 phba->cfg_link_speed);
711 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
712 }
713 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
714 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
715 if (phba->sli_rev < LPFC_SLI_REV4)
716 lpfc_set_loopback_flag(phba);
717 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
718 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
719 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
720 "0498 Adapter failed to init, mbxCmd x%x "
721 "INIT_LINK, mbxStatus x%x\n",
722 mb->mbxCommand, mb->mbxStatus);
723 if (phba->sli_rev <= LPFC_SLI_REV3) {
724
725 writel(0, phba->HCregaddr);
726 readl(phba->HCregaddr);
727
728 writel(0xffffffff, phba->HAregaddr);
729 readl(phba->HAregaddr);
730 }
731 phba->link_state = LPFC_HBA_ERROR;
732 if (rc != MBX_BUSY || flag == MBX_POLL)
733 mempool_free(pmb, phba->mbox_mem_pool);
734 return -EIO;
735 }
736 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
737 if (flag == MBX_POLL)
738 mempool_free(pmb, phba->mbox_mem_pool);
739
740 return 0;
741}
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756static int
757lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
758{
759 LPFC_MBOXQ_t *pmb;
760 int rc;
761
762 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
763 if (!pmb) {
764 phba->link_state = LPFC_HBA_ERROR;
765 return -ENOMEM;
766 }
767
768 lpfc_printf_log(phba,
769 KERN_ERR, LOG_INIT,
770 "0491 Adapter Link is disabled.\n");
771 lpfc_down_link(phba, pmb);
772 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
773 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
774 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
775 lpfc_printf_log(phba,
776 KERN_ERR, LOG_INIT,
777 "2522 Adapter failed to issue DOWN_LINK"
778 " mbox command rc 0x%x\n", rc);
779
780 mempool_free(pmb, phba->mbox_mem_pool);
781 return -EIO;
782 }
783 if (flag == MBX_POLL)
784 mempool_free(pmb, phba->mbox_mem_pool);
785
786 return 0;
787}
788
789
790
791
792
793
794
795
796
797
798
799
800int
801lpfc_hba_down_prep(struct lpfc_hba *phba)
802{
803 struct lpfc_vport **vports;
804 int i;
805
806 if (phba->sli_rev <= LPFC_SLI_REV3) {
807
808 writel(0, phba->HCregaddr);
809 readl(phba->HCregaddr);
810 }
811
812 if (phba->pport->load_flag & FC_UNLOADING)
813 lpfc_cleanup_discovery_resources(phba->pport);
814 else {
815 vports = lpfc_create_vport_work_array(phba);
816 if (vports != NULL)
817 for (i = 0; i <= phba->max_vports &&
818 vports[i] != NULL; i++)
819 lpfc_cleanup_discovery_resources(vports[i]);
820 lpfc_destroy_vport_work_array(phba, vports);
821 }
822 return 0;
823}
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838static void
839lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
840{
841 struct lpfc_iocbq *rspiocbq;
842 struct hbq_dmabuf *dmabuf;
843 struct lpfc_cq_event *cq_event;
844
845 spin_lock_irq(&phba->hbalock);
846 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
847 spin_unlock_irq(&phba->hbalock);
848
849 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
850
851 spin_lock_irq(&phba->hbalock);
852 list_remove_head(&phba->sli4_hba.sp_queue_event,
853 cq_event, struct lpfc_cq_event, list);
854 spin_unlock_irq(&phba->hbalock);
855
856 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
857 case CQE_CODE_COMPL_WQE:
858 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
859 cq_event);
860 lpfc_sli_release_iocbq(phba, rspiocbq);
861 break;
862 case CQE_CODE_RECEIVE:
863 case CQE_CODE_RECEIVE_V1:
864 dmabuf = container_of(cq_event, struct hbq_dmabuf,
865 cq_event);
866 lpfc_in_buf_free(phba, &dmabuf->dbuf);
867 }
868 }
869}
870
871
872
873
874
875
876
877
878
879
880
881
882static void
883lpfc_hba_free_post_buf(struct lpfc_hba *phba)
884{
885 struct lpfc_sli *psli = &phba->sli;
886 struct lpfc_sli_ring *pring;
887 struct lpfc_dmabuf *mp, *next_mp;
888 LIST_HEAD(buflist);
889 int count;
890
891 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
892 lpfc_sli_hbqbuf_free_all(phba);
893 else {
894
895 pring = &psli->ring[LPFC_ELS_RING];
896 spin_lock_irq(&phba->hbalock);
897 list_splice_init(&pring->postbufq, &buflist);
898 spin_unlock_irq(&phba->hbalock);
899
900 count = 0;
901 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
902 list_del(&mp->list);
903 count++;
904 lpfc_mbuf_free(phba, mp->virt, mp->phys);
905 kfree(mp);
906 }
907
908 spin_lock_irq(&phba->hbalock);
909 pring->postbufq_cnt -= count;
910 spin_unlock_irq(&phba->hbalock);
911 }
912}
913
914
915
916
917
918
919
920
921
922
923
924static void
925lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
926{
927 struct lpfc_sli *psli = &phba->sli;
928 struct lpfc_sli_ring *pring;
929 LIST_HEAD(completions);
930 int i;
931
932 for (i = 0; i < psli->num_rings; i++) {
933 pring = &psli->ring[i];
934 if (phba->sli_rev >= LPFC_SLI_REV4)
935 spin_lock_irq(&pring->ring_lock);
936 else
937 spin_lock_irq(&phba->hbalock);
938
939
940
941 list_splice_init(&pring->txcmplq, &completions);
942 pring->txcmplq_cnt = 0;
943
944 if (phba->sli_rev >= LPFC_SLI_REV4)
945 spin_unlock_irq(&pring->ring_lock);
946 else
947 spin_unlock_irq(&phba->hbalock);
948
949
950 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
951 IOERR_SLI_ABORTED);
952 lpfc_sli_abort_iocb_ring(phba, pring);
953 }
954}
955
956
957
958
959
960
961
962
963
964
965
966
967
968static int
969lpfc_hba_down_post_s3(struct lpfc_hba *phba)
970{
971 lpfc_hba_free_post_buf(phba);
972 lpfc_hba_clean_txcmplq(phba);
973 return 0;
974}
975
976
977
978
979
980
981
982
983
984
985
986
987static int
988lpfc_hba_down_post_s4(struct lpfc_hba *phba)
989{
990 struct lpfc_scsi_buf *psb, *psb_next;
991 LIST_HEAD(aborts);
992 unsigned long iflag = 0;
993 struct lpfc_sglq *sglq_entry = NULL;
994 struct lpfc_sli *psli = &phba->sli;
995 struct lpfc_sli_ring *pring;
996
997 lpfc_hba_free_post_buf(phba);
998 lpfc_hba_clean_txcmplq(phba);
999 pring = &psli->ring[LPFC_ELS_RING];
1000
1001
1002
1003
1004
1005
1006
1007 spin_lock_irq(&phba->hbalock);
1008
1009
1010
1011
1012 spin_lock(&phba->sli4_hba.abts_sgl_list_lock);
1013 list_for_each_entry(sglq_entry,
1014 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1015 sglq_entry->state = SGL_FREED;
1016
1017 spin_lock(&pring->ring_lock);
1018 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1019 &phba->sli4_hba.lpfc_sgl_list);
1020 spin_unlock(&pring->ring_lock);
1021 spin_unlock(&phba->sli4_hba.abts_sgl_list_lock);
1022
1023
1024
1025 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1026 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1027 &aborts);
1028 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1029 spin_unlock_irq(&phba->hbalock);
1030
1031 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1032 psb->pCmd = NULL;
1033 psb->status = IOSTAT_SUCCESS;
1034 }
1035 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1036 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1037 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
1038
1039 lpfc_sli4_free_sp_events(phba);
1040 return 0;
1041}
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054int
1055lpfc_hba_down_post(struct lpfc_hba *phba)
1056{
1057 return (*phba->lpfc_hba_down_post)(phba);
1058}
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072static void
1073lpfc_hb_timeout(unsigned long ptr)
1074{
1075 struct lpfc_hba *phba;
1076 uint32_t tmo_posted;
1077 unsigned long iflag;
1078
1079 phba = (struct lpfc_hba *)ptr;
1080
1081
1082 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1083 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1084 if (!tmo_posted)
1085 phba->pport->work_port_events |= WORKER_HB_TMO;
1086 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1087
1088
1089 if (!tmo_posted)
1090 lpfc_worker_wake_up(phba);
1091 return;
1092}
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106static void
1107lpfc_rrq_timeout(unsigned long ptr)
1108{
1109 struct lpfc_hba *phba;
1110 unsigned long iflag;
1111
1112 phba = (struct lpfc_hba *)ptr;
1113 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1114 if (!(phba->pport->load_flag & FC_UNLOADING))
1115 phba->hba_flag |= HBA_RRQ_ACTIVE;
1116 else
1117 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1118 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1119
1120 if (!(phba->pport->load_flag & FC_UNLOADING))
1121 lpfc_worker_wake_up(phba);
1122}
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140static void
1141lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1142{
1143 unsigned long drvr_flag;
1144
1145 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1146 phba->hb_outstanding = 0;
1147 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1148
1149
1150 mempool_free(pmboxq, phba->mbox_mem_pool);
1151 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1152 !(phba->link_state == LPFC_HBA_ERROR) &&
1153 !(phba->pport->load_flag & FC_UNLOADING))
1154 mod_timer(&phba->hb_tmofunc,
1155 jiffies +
1156 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1157 return;
1158}
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176void
1177lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1178{
1179 struct lpfc_vport **vports;
1180 LPFC_MBOXQ_t *pmboxq;
1181 struct lpfc_dmabuf *buf_ptr;
1182 int retval, i;
1183 struct lpfc_sli *psli = &phba->sli;
1184 LIST_HEAD(completions);
1185
1186 vports = lpfc_create_vport_work_array(phba);
1187 if (vports != NULL)
1188 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
1189 lpfc_rcv_seq_check_edtov(vports[i]);
1190 lpfc_fdmi_num_disc_check(vports[i]);
1191 }
1192 lpfc_destroy_vport_work_array(phba, vports);
1193
1194 if ((phba->link_state == LPFC_HBA_ERROR) ||
1195 (phba->pport->load_flag & FC_UNLOADING) ||
1196 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1197 return;
1198
1199 spin_lock_irq(&phba->pport->work_port_lock);
1200
1201 if (time_after(phba->last_completion_time +
1202 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1203 jiffies)) {
1204 spin_unlock_irq(&phba->pport->work_port_lock);
1205 if (!phba->hb_outstanding)
1206 mod_timer(&phba->hb_tmofunc,
1207 jiffies +
1208 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1209 else
1210 mod_timer(&phba->hb_tmofunc,
1211 jiffies +
1212 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
1213 return;
1214 }
1215 spin_unlock_irq(&phba->pport->work_port_lock);
1216
1217 if (phba->elsbuf_cnt &&
1218 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1219 spin_lock_irq(&phba->hbalock);
1220 list_splice_init(&phba->elsbuf, &completions);
1221 phba->elsbuf_cnt = 0;
1222 phba->elsbuf_prev_cnt = 0;
1223 spin_unlock_irq(&phba->hbalock);
1224
1225 while (!list_empty(&completions)) {
1226 list_remove_head(&completions, buf_ptr,
1227 struct lpfc_dmabuf, list);
1228 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1229 kfree(buf_ptr);
1230 }
1231 }
1232 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1233
1234
1235 if (phba->cfg_enable_hba_heartbeat) {
1236 if (!phba->hb_outstanding) {
1237 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1238 (list_empty(&psli->mboxq))) {
1239 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1240 GFP_KERNEL);
1241 if (!pmboxq) {
1242 mod_timer(&phba->hb_tmofunc,
1243 jiffies +
1244 msecs_to_jiffies(1000 *
1245 LPFC_HB_MBOX_INTERVAL));
1246 return;
1247 }
1248
1249 lpfc_heart_beat(phba, pmboxq);
1250 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1251 pmboxq->vport = phba->pport;
1252 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1253 MBX_NOWAIT);
1254
1255 if (retval != MBX_BUSY &&
1256 retval != MBX_SUCCESS) {
1257 mempool_free(pmboxq,
1258 phba->mbox_mem_pool);
1259 mod_timer(&phba->hb_tmofunc,
1260 jiffies +
1261 msecs_to_jiffies(1000 *
1262 LPFC_HB_MBOX_INTERVAL));
1263 return;
1264 }
1265 phba->skipped_hb = 0;
1266 phba->hb_outstanding = 1;
1267 } else if (time_before_eq(phba->last_completion_time,
1268 phba->skipped_hb)) {
1269 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1270 "2857 Last completion time not "
1271 " updated in %d ms\n",
1272 jiffies_to_msecs(jiffies
1273 - phba->last_completion_time));
1274 } else
1275 phba->skipped_hb = jiffies;
1276
1277 mod_timer(&phba->hb_tmofunc,
1278 jiffies +
1279 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
1280 return;
1281 } else {
1282
1283
1284
1285
1286
1287 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1288 "0459 Adapter heartbeat still out"
1289 "standing:last compl time was %d ms.\n",
1290 jiffies_to_msecs(jiffies
1291 - phba->last_completion_time));
1292 mod_timer(&phba->hb_tmofunc,
1293 jiffies +
1294 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
1295 }
1296 } else {
1297 mod_timer(&phba->hb_tmofunc,
1298 jiffies +
1299 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1300 }
1301}
1302
1303
1304
1305
1306
1307
1308
1309
1310static void
1311lpfc_offline_eratt(struct lpfc_hba *phba)
1312{
1313 struct lpfc_sli *psli = &phba->sli;
1314
1315 spin_lock_irq(&phba->hbalock);
1316 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1317 spin_unlock_irq(&phba->hbalock);
1318 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1319
1320 lpfc_offline(phba);
1321 lpfc_reset_barrier(phba);
1322 spin_lock_irq(&phba->hbalock);
1323 lpfc_sli_brdreset(phba);
1324 spin_unlock_irq(&phba->hbalock);
1325 lpfc_hba_down_post(phba);
1326 lpfc_sli_brdready(phba, HS_MBRDY);
1327 lpfc_unblock_mgmt_io(phba);
1328 phba->link_state = LPFC_HBA_ERROR;
1329 return;
1330}
1331
1332
1333
1334
1335
1336
1337
1338
1339void
1340lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1341{
1342 spin_lock_irq(&phba->hbalock);
1343 phba->link_state = LPFC_HBA_ERROR;
1344 spin_unlock_irq(&phba->hbalock);
1345
1346 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1347 lpfc_offline(phba);
1348 lpfc_hba_down_post(phba);
1349 lpfc_unblock_mgmt_io(phba);
1350}
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361static void
1362lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1363{
1364 uint32_t old_host_status = phba->work_hs;
1365 struct lpfc_sli *psli = &phba->sli;
1366
1367
1368
1369
1370 if (pci_channel_offline(phba->pcidev)) {
1371 spin_lock_irq(&phba->hbalock);
1372 phba->hba_flag &= ~DEFER_ERATT;
1373 spin_unlock_irq(&phba->hbalock);
1374 return;
1375 }
1376
1377 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1378 "0479 Deferred Adapter Hardware Error "
1379 "Data: x%x x%x x%x\n",
1380 phba->work_hs,
1381 phba->work_status[0], phba->work_status[1]);
1382
1383 spin_lock_irq(&phba->hbalock);
1384 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1385 spin_unlock_irq(&phba->hbalock);
1386
1387
1388
1389
1390
1391
1392
1393 lpfc_sli_abort_fcp_rings(phba);
1394
1395
1396
1397
1398
1399 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
1400 lpfc_offline(phba);
1401
1402
1403 while (phba->work_hs & HS_FFER1) {
1404 msleep(100);
1405 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1406 phba->work_hs = UNPLUG_ERR ;
1407 break;
1408 }
1409
1410 if (phba->pport->load_flag & FC_UNLOADING) {
1411 phba->work_hs = 0;
1412 break;
1413 }
1414 }
1415
1416
1417
1418
1419
1420
1421 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1422 phba->work_hs = old_host_status & ~HS_FFER1;
1423
1424 spin_lock_irq(&phba->hbalock);
1425 phba->hba_flag &= ~DEFER_ERATT;
1426 spin_unlock_irq(&phba->hbalock);
1427 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1428 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1429}
1430
1431static void
1432lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1433{
1434 struct lpfc_board_event_header board_event;
1435 struct Scsi_Host *shost;
1436
1437 board_event.event_type = FC_REG_BOARD_EVENT;
1438 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1439 shost = lpfc_shost_from_vport(phba->pport);
1440 fc_host_post_vendor_event(shost, fc_get_event_number(),
1441 sizeof(board_event),
1442 (char *) &board_event,
1443 LPFC_NL_VENDOR_ID);
1444}
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456static void
1457lpfc_handle_eratt_s3(struct lpfc_hba *phba)
1458{
1459 struct lpfc_vport *vport = phba->pport;
1460 struct lpfc_sli *psli = &phba->sli;
1461 uint32_t event_data;
1462 unsigned long temperature;
1463 struct temp_event temp_event_data;
1464 struct Scsi_Host *shost;
1465
1466
1467
1468
1469 if (pci_channel_offline(phba->pcidev)) {
1470 spin_lock_irq(&phba->hbalock);
1471 phba->hba_flag &= ~DEFER_ERATT;
1472 spin_unlock_irq(&phba->hbalock);
1473 return;
1474 }
1475
1476
1477 if (!phba->cfg_enable_hba_reset)
1478 return;
1479
1480
1481 lpfc_board_errevt_to_mgmt(phba);
1482
1483 if (phba->hba_flag & DEFER_ERATT)
1484 lpfc_handle_deferred_eratt(phba);
1485
1486 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1487 if (phba->work_hs & HS_FFER6)
1488
1489 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1490 "1301 Re-establishing Link "
1491 "Data: x%x x%x x%x\n",
1492 phba->work_hs, phba->work_status[0],
1493 phba->work_status[1]);
1494 if (phba->work_hs & HS_FFER8)
1495
1496 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1497 "2861 Host Authentication device "
1498 "zeroization Data:x%x x%x x%x\n",
1499 phba->work_hs, phba->work_status[0],
1500 phba->work_status[1]);
1501
1502 spin_lock_irq(&phba->hbalock);
1503 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1504 spin_unlock_irq(&phba->hbalock);
1505
1506
1507
1508
1509
1510
1511
1512 lpfc_sli_abort_fcp_rings(phba);
1513
1514
1515
1516
1517
1518 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1519 lpfc_offline(phba);
1520 lpfc_sli_brdrestart(phba);
1521 if (lpfc_online(phba) == 0) {
1522 lpfc_unblock_mgmt_io(phba);
1523 return;
1524 }
1525 lpfc_unblock_mgmt_io(phba);
1526 } else if (phba->work_hs & HS_CRIT_TEMP) {
1527 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1528 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1529 temp_event_data.event_code = LPFC_CRIT_TEMP;
1530 temp_event_data.data = (uint32_t)temperature;
1531
1532 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1533 "0406 Adapter maximum temperature exceeded "
1534 "(%ld), taking this port offline "
1535 "Data: x%x x%x x%x\n",
1536 temperature, phba->work_hs,
1537 phba->work_status[0], phba->work_status[1]);
1538
1539 shost = lpfc_shost_from_vport(phba->pport);
1540 fc_host_post_vendor_event(shost, fc_get_event_number(),
1541 sizeof(temp_event_data),
1542 (char *) &temp_event_data,
1543 SCSI_NL_VID_TYPE_PCI
1544 | PCI_VENDOR_ID_EMULEX);
1545
1546 spin_lock_irq(&phba->hbalock);
1547 phba->over_temp_state = HBA_OVER_TEMP;
1548 spin_unlock_irq(&phba->hbalock);
1549 lpfc_offline_eratt(phba);
1550
1551 } else {
1552
1553
1554
1555
1556 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1557 "0457 Adapter Hardware Error "
1558 "Data: x%x x%x x%x\n",
1559 phba->work_hs,
1560 phba->work_status[0], phba->work_status[1]);
1561
1562 event_data = FC_REG_DUMP_EVENT;
1563 shost = lpfc_shost_from_vport(vport);
1564 fc_host_post_vendor_event(shost, fc_get_event_number(),
1565 sizeof(event_data), (char *) &event_data,
1566 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1567
1568 lpfc_offline_eratt(phba);
1569 }
1570 return;
1571}
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584static int
1585lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1586 bool en_rn_msg)
1587{
1588 int rc;
1589 uint32_t intr_mode;
1590
1591 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1592 LPFC_SLI_INTF_IF_TYPE_2) {
1593
1594
1595
1596
1597 rc = lpfc_sli4_pdev_status_reg_wait(phba);
1598 if (rc)
1599 return rc;
1600 }
1601
1602
1603 if (en_rn_msg)
1604 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1605 "2887 Reset Needed: Attempting Port "
1606 "Recovery...\n");
1607 lpfc_offline_prep(phba, mbx_action);
1608 lpfc_offline(phba);
1609
1610 lpfc_sli4_disable_intr(phba);
1611 lpfc_sli_brdrestart(phba);
1612
1613 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1614 if (intr_mode == LPFC_INTR_ERROR) {
1615 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1616 "3175 Failed to enable interrupt\n");
1617 return -EIO;
1618 }
1619 phba->intr_mode = intr_mode;
1620 rc = lpfc_online(phba);
1621 if (rc == 0)
1622 lpfc_unblock_mgmt_io(phba);
1623
1624 return rc;
1625}
1626
1627
1628
1629
1630
1631
1632
1633
1634static void
1635lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1636{
1637 struct lpfc_vport *vport = phba->pport;
1638 uint32_t event_data;
1639 struct Scsi_Host *shost;
1640 uint32_t if_type;
1641 struct lpfc_register portstat_reg = {0};
1642 uint32_t reg_err1, reg_err2;
1643 uint32_t uerrlo_reg, uemasklo_reg;
1644 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
1645 bool en_rn_msg = true;
1646 struct temp_event temp_event_data;
1647 struct lpfc_register portsmphr_reg;
1648 int rc, i;
1649
1650
1651
1652
1653 if (pci_channel_offline(phba->pcidev))
1654 return;
1655
1656 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
1657 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1658 switch (if_type) {
1659 case LPFC_SLI_INTF_IF_TYPE_0:
1660 pci_rd_rc1 = lpfc_readl(
1661 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1662 &uerrlo_reg);
1663 pci_rd_rc2 = lpfc_readl(
1664 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1665 &uemasklo_reg);
1666
1667 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1668 return;
1669 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1670 lpfc_sli4_offline_eratt(phba);
1671 return;
1672 }
1673 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1674 "7623 Checking UE recoverable");
1675
1676 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1677 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1678 &portsmphr_reg.word0))
1679 continue;
1680
1681 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1682 &portsmphr_reg);
1683 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1684 LPFC_PORT_SEM_UE_RECOVERABLE)
1685 break;
1686
1687 msleep(1000);
1688 }
1689
1690 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1691 "4827 smphr_port_status x%x : Waited %dSec",
1692 smphr_port_status, i);
1693
1694
1695 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1696 LPFC_PORT_SEM_UE_RECOVERABLE) {
1697 for (i = 0; i < 20; i++) {
1698 msleep(1000);
1699 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1700 &portsmphr_reg.word0) &&
1701 (LPFC_POST_STAGE_PORT_READY ==
1702 bf_get(lpfc_port_smphr_port_status,
1703 &portsmphr_reg))) {
1704 rc = lpfc_sli4_port_sta_fn_reset(phba,
1705 LPFC_MBX_NO_WAIT, en_rn_msg);
1706 if (rc == 0)
1707 return;
1708 lpfc_printf_log(phba,
1709 KERN_ERR, LOG_INIT,
1710 "4215 Failed to recover UE");
1711 break;
1712 }
1713 }
1714 }
1715 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1716 "7624 Firmware not ready: Failing UE recovery,"
1717 " waited %dSec", i);
1718 lpfc_sli4_offline_eratt(phba);
1719 break;
1720
1721 case LPFC_SLI_INTF_IF_TYPE_2:
1722 pci_rd_rc1 = lpfc_readl(
1723 phba->sli4_hba.u.if_type2.STATUSregaddr,
1724 &portstat_reg.word0);
1725
1726 if (pci_rd_rc1 == -EIO) {
1727 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1728 "3151 PCI bus read access failure: x%x\n",
1729 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
1730 return;
1731 }
1732 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1733 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
1734 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
1735 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1736 "2889 Port Overtemperature event, "
1737 "taking port offline Data: x%x x%x\n",
1738 reg_err1, reg_err2);
1739
1740 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
1741 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1742 temp_event_data.event_code = LPFC_CRIT_TEMP;
1743 temp_event_data.data = 0xFFFFFFFF;
1744
1745 shost = lpfc_shost_from_vport(phba->pport);
1746 fc_host_post_vendor_event(shost, fc_get_event_number(),
1747 sizeof(temp_event_data),
1748 (char *)&temp_event_data,
1749 SCSI_NL_VID_TYPE_PCI
1750 | PCI_VENDOR_ID_EMULEX);
1751
1752 spin_lock_irq(&phba->hbalock);
1753 phba->over_temp_state = HBA_OVER_TEMP;
1754 spin_unlock_irq(&phba->hbalock);
1755 lpfc_sli4_offline_eratt(phba);
1756 return;
1757 }
1758 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1759 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
1760 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1761 "3143 Port Down: Firmware Update "
1762 "Detected\n");
1763 en_rn_msg = false;
1764 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1765 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1766 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1767 "3144 Port Down: Debug Dump\n");
1768 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1769 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1770 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1771 "3145 Port Down: Provisioning\n");
1772
1773
1774 if (!phba->cfg_enable_hba_reset)
1775 return;
1776
1777
1778 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1779 en_rn_msg);
1780 if (rc == 0) {
1781
1782 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1783 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1784 return;
1785 else
1786 break;
1787 }
1788
1789 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1790 "3152 Unrecoverable error, bring the port "
1791 "offline\n");
1792 lpfc_sli4_offline_eratt(phba);
1793 break;
1794 case LPFC_SLI_INTF_IF_TYPE_1:
1795 default:
1796 break;
1797 }
1798 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1799 "3123 Report dump event to upper layer\n");
1800
1801 lpfc_board_errevt_to_mgmt(phba);
1802
1803 event_data = FC_REG_DUMP_EVENT;
1804 shost = lpfc_shost_from_vport(vport);
1805 fc_host_post_vendor_event(shost, fc_get_event_number(),
1806 sizeof(event_data), (char *) &event_data,
1807 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1808}
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821void
1822lpfc_handle_eratt(struct lpfc_hba *phba)
1823{
1824 (*phba->lpfc_handle_eratt)(phba);
1825}
1826
1827
1828
1829
1830
1831
1832
1833
1834void
1835lpfc_handle_latt(struct lpfc_hba *phba)
1836{
1837 struct lpfc_vport *vport = phba->pport;
1838 struct lpfc_sli *psli = &phba->sli;
1839 LPFC_MBOXQ_t *pmb;
1840 volatile uint32_t control;
1841 struct lpfc_dmabuf *mp;
1842 int rc = 0;
1843
1844 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1845 if (!pmb) {
1846 rc = 1;
1847 goto lpfc_handle_latt_err_exit;
1848 }
1849
1850 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
1851 if (!mp) {
1852 rc = 2;
1853 goto lpfc_handle_latt_free_pmb;
1854 }
1855
1856 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
1857 if (!mp->virt) {
1858 rc = 3;
1859 goto lpfc_handle_latt_free_mp;
1860 }
1861
1862
1863 lpfc_els_flush_all_cmd(phba);
1864
1865 psli->slistat.link_event++;
1866 lpfc_read_topology(phba, pmb, mp);
1867 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
1868 pmb->vport = vport;
1869
1870 phba->sli.ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
1871 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
1872 if (rc == MBX_NOT_FINISHED) {
1873 rc = 4;
1874 goto lpfc_handle_latt_free_mbuf;
1875 }
1876
1877
1878 spin_lock_irq(&phba->hbalock);
1879 writel(HA_LATT, phba->HAregaddr);
1880 readl(phba->HAregaddr);
1881 spin_unlock_irq(&phba->hbalock);
1882
1883 return;
1884
1885lpfc_handle_latt_free_mbuf:
1886 phba->sli.ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
1887 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1888lpfc_handle_latt_free_mp:
1889 kfree(mp);
1890lpfc_handle_latt_free_pmb:
1891 mempool_free(pmb, phba->mbox_mem_pool);
1892lpfc_handle_latt_err_exit:
1893
1894 spin_lock_irq(&phba->hbalock);
1895 psli->sli_flag |= LPFC_PROCESS_LA;
1896 control = readl(phba->HCregaddr);
1897 control |= HC_LAINT_ENA;
1898 writel(control, phba->HCregaddr);
1899 readl(phba->HCregaddr);
1900
1901
1902 writel(HA_LATT, phba->HAregaddr);
1903 readl(phba->HAregaddr);
1904 spin_unlock_irq(&phba->hbalock);
1905 lpfc_linkdown(phba);
1906 phba->link_state = LPFC_HBA_ERROR;
1907
1908 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
1909 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
1910
1911 return;
1912}
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928int
1929lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
1930{
1931 uint8_t lenlo, lenhi;
1932 int Length;
1933 int i, j;
1934 int finished = 0;
1935 int index = 0;
1936
1937 if (!vpd)
1938 return 0;
1939
1940
1941 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1942 "0455 Vital Product Data: x%x x%x x%x x%x\n",
1943 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
1944 (uint32_t) vpd[3]);
1945 while (!finished && (index < (len - 4))) {
1946 switch (vpd[index]) {
1947 case 0x82:
1948 case 0x91:
1949 index += 1;
1950 lenlo = vpd[index];
1951 index += 1;
1952 lenhi = vpd[index];
1953 index += 1;
1954 i = ((((unsigned short)lenhi) << 8) + lenlo);
1955 index += i;
1956 break;
1957 case 0x90:
1958 index += 1;
1959 lenlo = vpd[index];
1960 index += 1;
1961 lenhi = vpd[index];
1962 index += 1;
1963 Length = ((((unsigned short)lenhi) << 8) + lenlo);
1964 if (Length > len - index)
1965 Length = len - index;
1966 while (Length > 0) {
1967
1968 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
1969 index += 2;
1970 i = vpd[index];
1971 index += 1;
1972 j = 0;
1973 Length -= (3+i);
1974 while(i--) {
1975 phba->SerialNumber[j++] = vpd[index++];
1976 if (j == 31)
1977 break;
1978 }
1979 phba->SerialNumber[j] = 0;
1980 continue;
1981 }
1982 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
1983 phba->vpd_flag |= VPD_MODEL_DESC;
1984 index += 2;
1985 i = vpd[index];
1986 index += 1;
1987 j = 0;
1988 Length -= (3+i);
1989 while(i--) {
1990 phba->ModelDesc[j++] = vpd[index++];
1991 if (j == 255)
1992 break;
1993 }
1994 phba->ModelDesc[j] = 0;
1995 continue;
1996 }
1997 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
1998 phba->vpd_flag |= VPD_MODEL_NAME;
1999 index += 2;
2000 i = vpd[index];
2001 index += 1;
2002 j = 0;
2003 Length -= (3+i);
2004 while(i--) {
2005 phba->ModelName[j++] = vpd[index++];
2006 if (j == 79)
2007 break;
2008 }
2009 phba->ModelName[j] = 0;
2010 continue;
2011 }
2012 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2013 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2014 index += 2;
2015 i = vpd[index];
2016 index += 1;
2017 j = 0;
2018 Length -= (3+i);
2019 while(i--) {
2020 phba->ProgramType[j++] = vpd[index++];
2021 if (j == 255)
2022 break;
2023 }
2024 phba->ProgramType[j] = 0;
2025 continue;
2026 }
2027 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2028 phba->vpd_flag |= VPD_PORT;
2029 index += 2;
2030 i = vpd[index];
2031 index += 1;
2032 j = 0;
2033 Length -= (3+i);
2034 while(i--) {
2035 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2036 (phba->sli4_hba.pport_name_sta ==
2037 LPFC_SLI4_PPNAME_GET)) {
2038 j++;
2039 index++;
2040 } else
2041 phba->Port[j++] = vpd[index++];
2042 if (j == 19)
2043 break;
2044 }
2045 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2046 (phba->sli4_hba.pport_name_sta ==
2047 LPFC_SLI4_PPNAME_NON))
2048 phba->Port[j] = 0;
2049 continue;
2050 }
2051 else {
2052 index += 2;
2053 i = vpd[index];
2054 index += 1;
2055 index += i;
2056 Length -= (3 + i);
2057 }
2058 }
2059 finished = 0;
2060 break;
2061 case 0x78:
2062 finished = 1;
2063 break;
2064 default:
2065 index ++;
2066 break;
2067 }
2068 }
2069
2070 return(1);
2071}
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085static void
2086lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2087{
2088 lpfc_vpd_t *vp;
2089 uint16_t dev_id = phba->pcidev->device;
2090 int max_speed;
2091 int GE = 0;
2092 int oneConnect = 0;
2093 struct {
2094 char *name;
2095 char *bus;
2096 char *function;
2097 } m = {"<Unknown>", "", ""};
2098
2099 if (mdp && mdp[0] != '\0'
2100 && descp && descp[0] != '\0')
2101 return;
2102
2103 if (phba->lmt & LMT_32Gb)
2104 max_speed = 32;
2105 else if (phba->lmt & LMT_16Gb)
2106 max_speed = 16;
2107 else if (phba->lmt & LMT_10Gb)
2108 max_speed = 10;
2109 else if (phba->lmt & LMT_8Gb)
2110 max_speed = 8;
2111 else if (phba->lmt & LMT_4Gb)
2112 max_speed = 4;
2113 else if (phba->lmt & LMT_2Gb)
2114 max_speed = 2;
2115 else if (phba->lmt & LMT_1Gb)
2116 max_speed = 1;
2117 else
2118 max_speed = 0;
2119
2120 vp = &phba->vpd;
2121
2122 switch (dev_id) {
2123 case PCI_DEVICE_ID_FIREFLY:
2124 m = (typeof(m)){"LP6000", "PCI",
2125 "Obsolete, Unsupported Fibre Channel Adapter"};
2126 break;
2127 case PCI_DEVICE_ID_SUPERFLY:
2128 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
2129 m = (typeof(m)){"LP7000", "PCI", ""};
2130 else
2131 m = (typeof(m)){"LP7000E", "PCI", ""};
2132 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2133 break;
2134 case PCI_DEVICE_ID_DRAGONFLY:
2135 m = (typeof(m)){"LP8000", "PCI",
2136 "Obsolete, Unsupported Fibre Channel Adapter"};
2137 break;
2138 case PCI_DEVICE_ID_CENTAUR:
2139 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
2140 m = (typeof(m)){"LP9002", "PCI", ""};
2141 else
2142 m = (typeof(m)){"LP9000", "PCI", ""};
2143 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2144 break;
2145 case PCI_DEVICE_ID_RFLY:
2146 m = (typeof(m)){"LP952", "PCI",
2147 "Obsolete, Unsupported Fibre Channel Adapter"};
2148 break;
2149 case PCI_DEVICE_ID_PEGASUS:
2150 m = (typeof(m)){"LP9802", "PCI-X",
2151 "Obsolete, Unsupported Fibre Channel Adapter"};
2152 break;
2153 case PCI_DEVICE_ID_THOR:
2154 m = (typeof(m)){"LP10000", "PCI-X",
2155 "Obsolete, Unsupported Fibre Channel Adapter"};
2156 break;
2157 case PCI_DEVICE_ID_VIPER:
2158 m = (typeof(m)){"LPX1000", "PCI-X",
2159 "Obsolete, Unsupported Fibre Channel Adapter"};
2160 break;
2161 case PCI_DEVICE_ID_PFLY:
2162 m = (typeof(m)){"LP982", "PCI-X",
2163 "Obsolete, Unsupported Fibre Channel Adapter"};
2164 break;
2165 case PCI_DEVICE_ID_TFLY:
2166 m = (typeof(m)){"LP1050", "PCI-X",
2167 "Obsolete, Unsupported Fibre Channel Adapter"};
2168 break;
2169 case PCI_DEVICE_ID_HELIOS:
2170 m = (typeof(m)){"LP11000", "PCI-X2",
2171 "Obsolete, Unsupported Fibre Channel Adapter"};
2172 break;
2173 case PCI_DEVICE_ID_HELIOS_SCSP:
2174 m = (typeof(m)){"LP11000-SP", "PCI-X2",
2175 "Obsolete, Unsupported Fibre Channel Adapter"};
2176 break;
2177 case PCI_DEVICE_ID_HELIOS_DCSP:
2178 m = (typeof(m)){"LP11002-SP", "PCI-X2",
2179 "Obsolete, Unsupported Fibre Channel Adapter"};
2180 break;
2181 case PCI_DEVICE_ID_NEPTUNE:
2182 m = (typeof(m)){"LPe1000", "PCIe",
2183 "Obsolete, Unsupported Fibre Channel Adapter"};
2184 break;
2185 case PCI_DEVICE_ID_NEPTUNE_SCSP:
2186 m = (typeof(m)){"LPe1000-SP", "PCIe",
2187 "Obsolete, Unsupported Fibre Channel Adapter"};
2188 break;
2189 case PCI_DEVICE_ID_NEPTUNE_DCSP:
2190 m = (typeof(m)){"LPe1002-SP", "PCIe",
2191 "Obsolete, Unsupported Fibre Channel Adapter"};
2192 break;
2193 case PCI_DEVICE_ID_BMID:
2194 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
2195 break;
2196 case PCI_DEVICE_ID_BSMB:
2197 m = (typeof(m)){"LP111", "PCI-X2",
2198 "Obsolete, Unsupported Fibre Channel Adapter"};
2199 break;
2200 case PCI_DEVICE_ID_ZEPHYR:
2201 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2202 break;
2203 case PCI_DEVICE_ID_ZEPHYR_SCSP:
2204 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2205 break;
2206 case PCI_DEVICE_ID_ZEPHYR_DCSP:
2207 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
2208 GE = 1;
2209 break;
2210 case PCI_DEVICE_ID_ZMID:
2211 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
2212 break;
2213 case PCI_DEVICE_ID_ZSMB:
2214 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
2215 break;
2216 case PCI_DEVICE_ID_LP101:
2217 m = (typeof(m)){"LP101", "PCI-X",
2218 "Obsolete, Unsupported Fibre Channel Adapter"};
2219 break;
2220 case PCI_DEVICE_ID_LP10000S:
2221 m = (typeof(m)){"LP10000-S", "PCI",
2222 "Obsolete, Unsupported Fibre Channel Adapter"};
2223 break;
2224 case PCI_DEVICE_ID_LP11000S:
2225 m = (typeof(m)){"LP11000-S", "PCI-X2",
2226 "Obsolete, Unsupported Fibre Channel Adapter"};
2227 break;
2228 case PCI_DEVICE_ID_LPE11000S:
2229 m = (typeof(m)){"LPe11000-S", "PCIe",
2230 "Obsolete, Unsupported Fibre Channel Adapter"};
2231 break;
2232 case PCI_DEVICE_ID_SAT:
2233 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
2234 break;
2235 case PCI_DEVICE_ID_SAT_MID:
2236 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
2237 break;
2238 case PCI_DEVICE_ID_SAT_SMB:
2239 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
2240 break;
2241 case PCI_DEVICE_ID_SAT_DCSP:
2242 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
2243 break;
2244 case PCI_DEVICE_ID_SAT_SCSP:
2245 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
2246 break;
2247 case PCI_DEVICE_ID_SAT_S:
2248 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
2249 break;
2250 case PCI_DEVICE_ID_HORNET:
2251 m = (typeof(m)){"LP21000", "PCIe",
2252 "Obsolete, Unsupported FCoE Adapter"};
2253 GE = 1;
2254 break;
2255 case PCI_DEVICE_ID_PROTEUS_VF:
2256 m = (typeof(m)){"LPev12000", "PCIe IOV",
2257 "Obsolete, Unsupported Fibre Channel Adapter"};
2258 break;
2259 case PCI_DEVICE_ID_PROTEUS_PF:
2260 m = (typeof(m)){"LPev12000", "PCIe IOV",
2261 "Obsolete, Unsupported Fibre Channel Adapter"};
2262 break;
2263 case PCI_DEVICE_ID_PROTEUS_S:
2264 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
2265 "Obsolete, Unsupported Fibre Channel Adapter"};
2266 break;
2267 case PCI_DEVICE_ID_TIGERSHARK:
2268 oneConnect = 1;
2269 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
2270 break;
2271 case PCI_DEVICE_ID_TOMCAT:
2272 oneConnect = 1;
2273 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2274 break;
2275 case PCI_DEVICE_ID_FALCON:
2276 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2277 "EmulexSecure Fibre"};
2278 break;
2279 case PCI_DEVICE_ID_BALIUS:
2280 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
2281 "Obsolete, Unsupported Fibre Channel Adapter"};
2282 break;
2283 case PCI_DEVICE_ID_LANCER_FC:
2284 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
2285 break;
2286 case PCI_DEVICE_ID_LANCER_FC_VF:
2287 m = (typeof(m)){"LPe16000", "PCIe",
2288 "Obsolete, Unsupported Fibre Channel Adapter"};
2289 break;
2290 case PCI_DEVICE_ID_LANCER_FCOE:
2291 oneConnect = 1;
2292 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
2293 break;
2294 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2295 oneConnect = 1;
2296 m = (typeof(m)){"OCe15100", "PCIe",
2297 "Obsolete, Unsupported FCoE"};
2298 break;
2299 case PCI_DEVICE_ID_LANCER_G6_FC:
2300 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2301 break;
2302 case PCI_DEVICE_ID_SKYHAWK:
2303 case PCI_DEVICE_ID_SKYHAWK_VF:
2304 oneConnect = 1;
2305 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2306 break;
2307 default:
2308 m = (typeof(m)){"Unknown", "", ""};
2309 break;
2310 }
2311
2312 if (mdp && mdp[0] == '\0')
2313 snprintf(mdp, 79,"%s", m.name);
2314
2315
2316
2317
2318 if (descp && descp[0] == '\0') {
2319 if (oneConnect)
2320 snprintf(descp, 255,
2321 "Emulex OneConnect %s, %s Initiator %s",
2322 m.name, m.function,
2323 phba->Port);
2324 else if (max_speed == 0)
2325 snprintf(descp, 255,
2326 "Emulex %s %s %s",
2327 m.name, m.bus, m.function);
2328 else
2329 snprintf(descp, 255,
2330 "Emulex %s %d%s %s %s",
2331 m.name, max_speed, (GE) ? "GE" : "Gb",
2332 m.bus, m.function);
2333 }
2334}
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348int
2349lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
2350{
2351 IOCB_t *icmd;
2352 struct lpfc_iocbq *iocb;
2353 struct lpfc_dmabuf *mp1, *mp2;
2354
2355 cnt += pring->missbufcnt;
2356
2357
2358 while (cnt > 0) {
2359
2360 iocb = lpfc_sli_get_iocbq(phba);
2361 if (iocb == NULL) {
2362 pring->missbufcnt = cnt;
2363 return cnt;
2364 }
2365 icmd = &iocb->iocb;
2366
2367
2368
2369 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2370 if (mp1)
2371 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2372 if (!mp1 || !mp1->virt) {
2373 kfree(mp1);
2374 lpfc_sli_release_iocbq(phba, iocb);
2375 pring->missbufcnt = cnt;
2376 return cnt;
2377 }
2378
2379 INIT_LIST_HEAD(&mp1->list);
2380
2381 if (cnt > 1) {
2382 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2383 if (mp2)
2384 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2385 &mp2->phys);
2386 if (!mp2 || !mp2->virt) {
2387 kfree(mp2);
2388 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2389 kfree(mp1);
2390 lpfc_sli_release_iocbq(phba, iocb);
2391 pring->missbufcnt = cnt;
2392 return cnt;
2393 }
2394
2395 INIT_LIST_HEAD(&mp2->list);
2396 } else {
2397 mp2 = NULL;
2398 }
2399
2400 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2401 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2402 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2403 icmd->ulpBdeCount = 1;
2404 cnt--;
2405 if (mp2) {
2406 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2407 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2408 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2409 cnt--;
2410 icmd->ulpBdeCount = 2;
2411 }
2412
2413 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2414 icmd->ulpLe = 1;
2415
2416 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2417 IOCB_ERROR) {
2418 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2419 kfree(mp1);
2420 cnt++;
2421 if (mp2) {
2422 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2423 kfree(mp2);
2424 cnt++;
2425 }
2426 lpfc_sli_release_iocbq(phba, iocb);
2427 pring->missbufcnt = cnt;
2428 return cnt;
2429 }
2430 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
2431 if (mp2)
2432 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
2433 }
2434 pring->missbufcnt = 0;
2435 return 0;
2436}
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449static int
2450lpfc_post_rcv_buf(struct lpfc_hba *phba)
2451{
2452 struct lpfc_sli *psli = &phba->sli;
2453
2454
2455 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0);
2456
2457
2458 return 0;
2459}
2460
2461#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2462
2463
2464
2465
2466
2467
2468
2469
2470static void
2471lpfc_sha_init(uint32_t * HashResultPointer)
2472{
2473 HashResultPointer[0] = 0x67452301;
2474 HashResultPointer[1] = 0xEFCDAB89;
2475 HashResultPointer[2] = 0x98BADCFE;
2476 HashResultPointer[3] = 0x10325476;
2477 HashResultPointer[4] = 0xC3D2E1F0;
2478}
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490static void
2491lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2492{
2493 int t;
2494 uint32_t TEMP;
2495 uint32_t A, B, C, D, E;
2496 t = 16;
2497 do {
2498 HashWorkingPointer[t] =
2499 S(1,
2500 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2501 8] ^
2502 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2503 } while (++t <= 79);
2504 t = 0;
2505 A = HashResultPointer[0];
2506 B = HashResultPointer[1];
2507 C = HashResultPointer[2];
2508 D = HashResultPointer[3];
2509 E = HashResultPointer[4];
2510
2511 do {
2512 if (t < 20) {
2513 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2514 } else if (t < 40) {
2515 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2516 } else if (t < 60) {
2517 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2518 } else {
2519 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2520 }
2521 TEMP += S(5, A) + E + HashWorkingPointer[t];
2522 E = D;
2523 D = C;
2524 C = S(30, B);
2525 B = A;
2526 A = TEMP;
2527 } while (++t <= 79);
2528
2529 HashResultPointer[0] += A;
2530 HashResultPointer[1] += B;
2531 HashResultPointer[2] += C;
2532 HashResultPointer[3] += D;
2533 HashResultPointer[4] += E;
2534
2535}
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547static void
2548lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2549{
2550 *HashWorking = (*RandomChallenge ^ *HashWorking);
2551}
2552
2553
2554
2555
2556
2557
2558
2559
2560void
2561lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2562{
2563 int t;
2564 uint32_t *HashWorking;
2565 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
2566
2567 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
2568 if (!HashWorking)
2569 return;
2570
2571 HashWorking[0] = HashWorking[78] = *pwwnn++;
2572 HashWorking[1] = HashWorking[79] = *pwwnn;
2573
2574 for (t = 0; t < 7; t++)
2575 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2576
2577 lpfc_sha_init(hbainit);
2578 lpfc_sha_iterate(hbainit, HashWorking);
2579 kfree(HashWorking);
2580}
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591void
2592lpfc_cleanup(struct lpfc_vport *vport)
2593{
2594 struct lpfc_hba *phba = vport->phba;
2595 struct lpfc_nodelist *ndlp, *next_ndlp;
2596 int i = 0;
2597
2598 if (phba->link_state > LPFC_LINK_DOWN)
2599 lpfc_port_link_failure(vport);
2600
2601 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
2602 if (!NLP_CHK_NODE_ACT(ndlp)) {
2603 ndlp = lpfc_enable_node(vport, ndlp,
2604 NLP_STE_UNUSED_NODE);
2605 if (!ndlp)
2606 continue;
2607 spin_lock_irq(&phba->ndlp_lock);
2608 NLP_SET_FREE_REQ(ndlp);
2609 spin_unlock_irq(&phba->ndlp_lock);
2610
2611 lpfc_nlp_put(ndlp);
2612 continue;
2613 }
2614 spin_lock_irq(&phba->ndlp_lock);
2615 if (NLP_CHK_FREE_REQ(ndlp)) {
2616
2617 spin_unlock_irq(&phba->ndlp_lock);
2618 continue;
2619 } else
2620
2621 NLP_SET_FREE_REQ(ndlp);
2622 spin_unlock_irq(&phba->ndlp_lock);
2623
2624 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2625 ndlp->nlp_DID == Fabric_DID) {
2626
2627 lpfc_nlp_put(ndlp);
2628 continue;
2629 }
2630
2631
2632
2633
2634 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2635 lpfc_nlp_put(ndlp);
2636 continue;
2637 }
2638
2639 if (ndlp->nlp_type & NLP_FABRIC)
2640 lpfc_disc_state_machine(vport, ndlp, NULL,
2641 NLP_EVT_DEVICE_RECOVERY);
2642
2643 lpfc_disc_state_machine(vport, ndlp, NULL,
2644 NLP_EVT_DEVICE_RM);
2645 }
2646
2647
2648
2649
2650
2651 while (!list_empty(&vport->fc_nodes)) {
2652 if (i++ > 3000) {
2653 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
2654 "0233 Nodelist not empty\n");
2655 list_for_each_entry_safe(ndlp, next_ndlp,
2656 &vport->fc_nodes, nlp_listp) {
2657 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2658 LOG_NODE,
2659 "0282 did:x%x ndlp:x%p "
2660 "usgmap:x%x refcnt:%d\n",
2661 ndlp->nlp_DID, (void *)ndlp,
2662 ndlp->nlp_usg_map,
2663 atomic_read(
2664 &ndlp->kref.refcount));
2665 }
2666 break;
2667 }
2668
2669
2670 msleep(10);
2671 }
2672 lpfc_cleanup_vports_rrqs(vport, NULL);
2673}
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683void
2684lpfc_stop_vport_timers(struct lpfc_vport *vport)
2685{
2686 del_timer_sync(&vport->els_tmofunc);
2687 del_timer_sync(&vport->delayed_disc_tmo);
2688 lpfc_can_disctmo(vport);
2689 return;
2690}
2691
2692
2693
2694
2695
2696
2697
2698
2699void
2700__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2701{
2702
2703 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2704
2705
2706 del_timer(&phba->fcf.redisc_wait);
2707}
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718void
2719lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2720{
2721 spin_lock_irq(&phba->hbalock);
2722 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2723
2724 spin_unlock_irq(&phba->hbalock);
2725 return;
2726 }
2727 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
2728
2729 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
2730 spin_unlock_irq(&phba->hbalock);
2731}
2732
2733
2734
2735
2736
2737
2738
2739
2740void
2741lpfc_stop_hba_timers(struct lpfc_hba *phba)
2742{
2743 lpfc_stop_vport_timers(phba->pport);
2744 del_timer_sync(&phba->sli.mbox_tmo);
2745 del_timer_sync(&phba->fabric_block_timer);
2746 del_timer_sync(&phba->eratt_poll);
2747 del_timer_sync(&phba->hb_tmofunc);
2748 if (phba->sli_rev == LPFC_SLI_REV4) {
2749 del_timer_sync(&phba->rrq_tmr);
2750 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2751 }
2752 phba->hb_outstanding = 0;
2753
2754 switch (phba->pci_dev_grp) {
2755 case LPFC_PCI_DEV_LP:
2756
2757 del_timer_sync(&phba->fcp_poll_timer);
2758 break;
2759 case LPFC_PCI_DEV_OC:
2760
2761 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
2762 break;
2763 default:
2764 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2765 "0297 Invalid device group (x%x)\n",
2766 phba->pci_dev_grp);
2767 break;
2768 }
2769 return;
2770}
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782static void
2783lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
2784{
2785 unsigned long iflag;
2786 uint8_t actcmd = MBX_HEARTBEAT;
2787 unsigned long timeout;
2788
2789 spin_lock_irqsave(&phba->hbalock, iflag);
2790 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
2791 spin_unlock_irqrestore(&phba->hbalock, iflag);
2792 if (mbx_action == LPFC_MBX_NO_WAIT)
2793 return;
2794 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2795 spin_lock_irqsave(&phba->hbalock, iflag);
2796 if (phba->sli.mbox_active) {
2797 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
2798
2799
2800
2801 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2802 phba->sli.mbox_active) * 1000) + jiffies;
2803 }
2804 spin_unlock_irqrestore(&phba->hbalock, iflag);
2805
2806
2807 while (phba->sli.mbox_active) {
2808
2809 msleep(2);
2810 if (time_after(jiffies, timeout)) {
2811 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2812 "2813 Mgmt IO is Blocked %x "
2813 "- mbox cmd %x still active\n",
2814 phba->sli.sli_flag, actcmd);
2815 break;
2816 }
2817 }
2818}
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828void
2829lpfc_sli4_node_prep(struct lpfc_hba *phba)
2830{
2831 struct lpfc_nodelist *ndlp, *next_ndlp;
2832 struct lpfc_vport **vports;
2833 int i;
2834
2835 if (phba->sli_rev != LPFC_SLI_REV4)
2836 return;
2837
2838 vports = lpfc_create_vport_work_array(phba);
2839 if (vports != NULL) {
2840 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2841 if (vports[i]->load_flag & FC_UNLOADING)
2842 continue;
2843
2844 list_for_each_entry_safe(ndlp, next_ndlp,
2845 &vports[i]->fc_nodes,
2846 nlp_listp) {
2847 if (NLP_CHK_NODE_ACT(ndlp)) {
2848 ndlp->nlp_rpi =
2849 lpfc_sli4_alloc_rpi(phba);
2850 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
2851 LOG_NODE,
2852 "0009 rpi:%x DID:%x "
2853 "flg:%x map:%x %p\n",
2854 ndlp->nlp_rpi,
2855 ndlp->nlp_DID,
2856 ndlp->nlp_flag,
2857 ndlp->nlp_usg_map,
2858 ndlp);
2859 }
2860 }
2861 }
2862 }
2863 lpfc_destroy_vport_work_array(phba, vports);
2864}
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878int
2879lpfc_online(struct lpfc_hba *phba)
2880{
2881 struct lpfc_vport *vport;
2882 struct lpfc_vport **vports;
2883 int i;
2884 bool vpis_cleared = false;
2885
2886 if (!phba)
2887 return 0;
2888 vport = phba->pport;
2889
2890 if (!(vport->fc_flag & FC_OFFLINE_MODE))
2891 return 0;
2892
2893 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
2894 "0458 Bring Adapter online\n");
2895
2896 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
2897
2898 if (!lpfc_sli_queue_setup(phba)) {
2899 lpfc_unblock_mgmt_io(phba);
2900 return 1;
2901 }
2902
2903 if (phba->sli_rev == LPFC_SLI_REV4) {
2904 if (lpfc_sli4_hba_setup(phba)) {
2905 lpfc_unblock_mgmt_io(phba);
2906 return 1;
2907 }
2908 spin_lock_irq(&phba->hbalock);
2909 if (!phba->sli4_hba.max_cfg_param.vpi_used)
2910 vpis_cleared = true;
2911 spin_unlock_irq(&phba->hbalock);
2912 } else {
2913 if (lpfc_sli_hba_setup(phba)) {
2914 lpfc_unblock_mgmt_io(phba);
2915 return 1;
2916 }
2917 }
2918
2919 vports = lpfc_create_vport_work_array(phba);
2920 if (vports != NULL) {
2921 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2922 struct Scsi_Host *shost;
2923 shost = lpfc_shost_from_vport(vports[i]);
2924 spin_lock_irq(shost->host_lock);
2925 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
2926 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
2927 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
2928 if (phba->sli_rev == LPFC_SLI_REV4) {
2929 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
2930 if ((vpis_cleared) &&
2931 (vports[i]->port_type !=
2932 LPFC_PHYSICAL_PORT))
2933 vports[i]->vpi = 0;
2934 }
2935 spin_unlock_irq(shost->host_lock);
2936 }
2937 }
2938 lpfc_destroy_vport_work_array(phba, vports);
2939
2940 lpfc_unblock_mgmt_io(phba);
2941 return 0;
2942}
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955void
2956lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
2957{
2958 unsigned long iflag;
2959
2960 spin_lock_irqsave(&phba->hbalock, iflag);
2961 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
2962 spin_unlock_irqrestore(&phba->hbalock, iflag);
2963}
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973void
2974lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
2975{
2976 struct lpfc_vport *vport = phba->pport;
2977 struct lpfc_nodelist *ndlp, *next_ndlp;
2978 struct lpfc_vport **vports;
2979 struct Scsi_Host *shost;
2980 int i;
2981
2982 if (vport->fc_flag & FC_OFFLINE_MODE)
2983 return;
2984
2985 lpfc_block_mgmt_io(phba, mbx_action);
2986
2987 lpfc_linkdown(phba);
2988
2989
2990 vports = lpfc_create_vport_work_array(phba);
2991 if (vports != NULL) {
2992 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2993 if (vports[i]->load_flag & FC_UNLOADING)
2994 continue;
2995 shost = lpfc_shost_from_vport(vports[i]);
2996 spin_lock_irq(shost->host_lock);
2997 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
2998 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
2999 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
3000 spin_unlock_irq(shost->host_lock);
3001
3002 shost = lpfc_shost_from_vport(vports[i]);
3003 list_for_each_entry_safe(ndlp, next_ndlp,
3004 &vports[i]->fc_nodes,
3005 nlp_listp) {
3006 if (!NLP_CHK_NODE_ACT(ndlp))
3007 continue;
3008 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3009 continue;
3010 if (ndlp->nlp_type & NLP_FABRIC) {
3011 lpfc_disc_state_machine(vports[i], ndlp,
3012 NULL, NLP_EVT_DEVICE_RECOVERY);
3013 lpfc_disc_state_machine(vports[i], ndlp,
3014 NULL, NLP_EVT_DEVICE_RM);
3015 }
3016 spin_lock_irq(shost->host_lock);
3017 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
3018 spin_unlock_irq(shost->host_lock);
3019
3020
3021
3022
3023
3024 if (phba->sli_rev == LPFC_SLI_REV4) {
3025 lpfc_printf_vlog(ndlp->vport,
3026 KERN_INFO, LOG_NODE,
3027 "0011 lpfc_offline: "
3028 "ndlp:x%p did %x "
3029 "usgmap:x%x rpi:%x\n",
3030 ndlp, ndlp->nlp_DID,
3031 ndlp->nlp_usg_map,
3032 ndlp->nlp_rpi);
3033
3034 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
3035 }
3036 lpfc_unreg_rpi(vports[i], ndlp);
3037 }
3038 }
3039 }
3040 lpfc_destroy_vport_work_array(phba, vports);
3041
3042 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
3043}
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053void
3054lpfc_offline(struct lpfc_hba *phba)
3055{
3056 struct Scsi_Host *shost;
3057 struct lpfc_vport **vports;
3058 int i;
3059
3060 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
3061 return;
3062
3063
3064 lpfc_stop_port(phba);
3065 vports = lpfc_create_vport_work_array(phba);
3066 if (vports != NULL)
3067 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
3068 lpfc_stop_vport_timers(vports[i]);
3069 lpfc_destroy_vport_work_array(phba, vports);
3070 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3071 "0460 Bring Adapter offline\n");
3072
3073
3074 lpfc_sli_hba_down(phba);
3075 spin_lock_irq(&phba->hbalock);
3076 phba->work_ha = 0;
3077 spin_unlock_irq(&phba->hbalock);
3078 vports = lpfc_create_vport_work_array(phba);
3079 if (vports != NULL)
3080 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3081 shost = lpfc_shost_from_vport(vports[i]);
3082 spin_lock_irq(shost->host_lock);
3083 vports[i]->work_port_events = 0;
3084 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3085 spin_unlock_irq(shost->host_lock);
3086 }
3087 lpfc_destroy_vport_work_array(phba, vports);
3088}
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098static void
3099lpfc_scsi_free(struct lpfc_hba *phba)
3100{
3101 struct lpfc_scsi_buf *sb, *sb_next;
3102 struct lpfc_iocbq *io, *io_next;
3103
3104 spin_lock_irq(&phba->hbalock);
3105
3106
3107
3108 spin_lock(&phba->scsi_buf_list_put_lock);
3109 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3110 list) {
3111 list_del(&sb->list);
3112 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
3113 sb->dma_handle);
3114 kfree(sb);
3115 phba->total_scsi_bufs--;
3116 }
3117 spin_unlock(&phba->scsi_buf_list_put_lock);
3118
3119 spin_lock(&phba->scsi_buf_list_get_lock);
3120 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3121 list) {
3122 list_del(&sb->list);
3123 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
3124 sb->dma_handle);
3125 kfree(sb);
3126 phba->total_scsi_bufs--;
3127 }
3128 spin_unlock(&phba->scsi_buf_list_get_lock);
3129
3130
3131 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
3132 list_del(&io->list);
3133 kfree(io);
3134 phba->total_iocbq_bufs--;
3135 }
3136
3137 spin_unlock_irq(&phba->hbalock);
3138}
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152int
3153lpfc_sli4_xri_sgl_update(struct lpfc_hba *phba)
3154{
3155 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3156 struct lpfc_scsi_buf *psb = NULL, *psb_next = NULL;
3157 uint16_t i, lxri, xri_cnt, els_xri_cnt, scsi_xri_cnt;
3158 LIST_HEAD(els_sgl_list);
3159 LIST_HEAD(scsi_sgl_list);
3160 int rc;
3161 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
3162
3163
3164
3165
3166 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3167 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3168
3169 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3170 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3171 "3157 ELS xri-sgl count increased from "
3172 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3173 els_xri_cnt);
3174
3175 for (i = 0; i < xri_cnt; i++) {
3176 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3177 GFP_KERNEL);
3178 if (sglq_entry == NULL) {
3179 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3180 "2562 Failure to allocate an "
3181 "ELS sgl entry:%d\n", i);
3182 rc = -ENOMEM;
3183 goto out_free_mem;
3184 }
3185 sglq_entry->buff_type = GEN_BUFF_TYPE;
3186 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3187 &sglq_entry->phys);
3188 if (sglq_entry->virt == NULL) {
3189 kfree(sglq_entry);
3190 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3191 "2563 Failure to allocate an "
3192 "ELS mbuf:%d\n", i);
3193 rc = -ENOMEM;
3194 goto out_free_mem;
3195 }
3196 sglq_entry->sgl = sglq_entry->virt;
3197 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3198 sglq_entry->state = SGL_FREED;
3199 list_add_tail(&sglq_entry->list, &els_sgl_list);
3200 }
3201 spin_lock_irq(&phba->hbalock);
3202 spin_lock(&pring->ring_lock);
3203 list_splice_init(&els_sgl_list, &phba->sli4_hba.lpfc_sgl_list);
3204 spin_unlock(&pring->ring_lock);
3205 spin_unlock_irq(&phba->hbalock);
3206 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3207
3208 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3209 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3210 "3158 ELS xri-sgl count decreased from "
3211 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3212 els_xri_cnt);
3213 spin_lock_irq(&phba->hbalock);
3214 spin_lock(&pring->ring_lock);
3215 list_splice_init(&phba->sli4_hba.lpfc_sgl_list, &els_sgl_list);
3216 spin_unlock(&pring->ring_lock);
3217 spin_unlock_irq(&phba->hbalock);
3218
3219 for (i = 0; i < xri_cnt; i++) {
3220 list_remove_head(&els_sgl_list,
3221 sglq_entry, struct lpfc_sglq, list);
3222 if (sglq_entry) {
3223 lpfc_mbuf_free(phba, sglq_entry->virt,
3224 sglq_entry->phys);
3225 kfree(sglq_entry);
3226 }
3227 }
3228 spin_lock_irq(&phba->hbalock);
3229 spin_lock(&pring->ring_lock);
3230 list_splice_init(&els_sgl_list, &phba->sli4_hba.lpfc_sgl_list);
3231 spin_unlock(&pring->ring_lock);
3232 spin_unlock_irq(&phba->hbalock);
3233 } else
3234 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3235 "3163 ELS xri-sgl count unchanged: %d\n",
3236 els_xri_cnt);
3237 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3238
3239
3240 sglq_entry = NULL;
3241 sglq_entry_next = NULL;
3242 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3243 &phba->sli4_hba.lpfc_sgl_list, list) {
3244 lxri = lpfc_sli4_next_xritag(phba);
3245 if (lxri == NO_XRI) {
3246 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3247 "2400 Failed to allocate xri for "
3248 "ELS sgl\n");
3249 rc = -ENOMEM;
3250 goto out_free_mem;
3251 }
3252 sglq_entry->sli4_lxritag = lxri;
3253 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3254 }
3255
3256
3257
3258
3259 phba->total_scsi_bufs = 0;
3260
3261
3262 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3263 els_xri_cnt;
3264
3265 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3266 "2401 Current allocated SCSI xri-sgl count:%d, "
3267 "maximum SCSI xri count:%d\n",
3268 phba->sli4_hba.scsi_xri_cnt,
3269 phba->sli4_hba.scsi_xri_max);
3270
3271 spin_lock_irq(&phba->scsi_buf_list_get_lock);
3272 spin_lock(&phba->scsi_buf_list_put_lock);
3273 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3274 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
3275 spin_unlock(&phba->scsi_buf_list_put_lock);
3276 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
3277
3278 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3279
3280 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3281 phba->sli4_hba.scsi_xri_max;
3282
3283 for (i = 0; i < scsi_xri_cnt; i++) {
3284 list_remove_head(&scsi_sgl_list, psb,
3285 struct lpfc_scsi_buf, list);
3286 if (psb) {
3287 pci_pool_free(phba->lpfc_scsi_dma_buf_pool,
3288 psb->data, psb->dma_handle);
3289 kfree(psb);
3290 }
3291 }
3292 spin_lock_irq(&phba->scsi_buf_list_get_lock);
3293 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
3294 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
3295 }
3296
3297
3298 psb = NULL;
3299 psb_next = NULL;
3300 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3301 lxri = lpfc_sli4_next_xritag(phba);
3302 if (lxri == NO_XRI) {
3303 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3304 "2560 Failed to allocate xri for "
3305 "scsi buffer\n");
3306 rc = -ENOMEM;
3307 goto out_free_mem;
3308 }
3309 psb->cur_iocbq.sli4_lxritag = lxri;
3310 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3311 }
3312 spin_lock_irq(&phba->scsi_buf_list_get_lock);
3313 spin_lock(&phba->scsi_buf_list_put_lock);
3314 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3315 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
3316 spin_unlock(&phba->scsi_buf_list_put_lock);
3317 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
3318
3319 return 0;
3320
3321out_free_mem:
3322 lpfc_free_els_sgl_list(phba);
3323 lpfc_scsi_free(phba);
3324 return rc;
3325}
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343struct lpfc_vport *
3344lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
3345{
3346 struct lpfc_vport *vport;
3347 struct Scsi_Host *shost;
3348 int error = 0;
3349
3350 if (dev != &phba->pcidev->dev) {
3351 shost = scsi_host_alloc(&lpfc_vport_template,
3352 sizeof(struct lpfc_vport));
3353 } else {
3354 if (phba->sli_rev == LPFC_SLI_REV4)
3355 shost = scsi_host_alloc(&lpfc_template,
3356 sizeof(struct lpfc_vport));
3357 else
3358 shost = scsi_host_alloc(&lpfc_template_s3,
3359 sizeof(struct lpfc_vport));
3360 }
3361 if (!shost)
3362 goto out;
3363
3364 vport = (struct lpfc_vport *) shost->hostdata;
3365 vport->phba = phba;
3366 vport->load_flag |= FC_LOADING;
3367 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3368 vport->fc_rscn_flush = 0;
3369
3370 lpfc_get_vport_cfgparam(vport);
3371 shost->unique_id = instance;
3372 shost->max_id = LPFC_MAX_TARGET;
3373 shost->max_lun = vport->cfg_max_luns;
3374 shost->this_id = -1;
3375 shost->max_cmd_len = 16;
3376 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
3377 if (phba->sli_rev == LPFC_SLI_REV4) {
3378 shost->dma_boundary =
3379 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
3380 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3381 }
3382
3383
3384
3385
3386
3387
3388 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3389 if (dev != &phba->pcidev->dev) {
3390 shost->transportt = lpfc_vport_transport_template;
3391 vport->port_type = LPFC_NPIV_PORT;
3392 } else {
3393 shost->transportt = lpfc_transport_template;
3394 vport->port_type = LPFC_PHYSICAL_PORT;
3395 }
3396
3397
3398 INIT_LIST_HEAD(&vport->fc_nodes);
3399 INIT_LIST_HEAD(&vport->rcv_buffer_list);
3400 spin_lock_init(&vport->work_port_lock);
3401
3402 init_timer(&vport->fc_disctmo);
3403 vport->fc_disctmo.function = lpfc_disc_timeout;
3404 vport->fc_disctmo.data = (unsigned long)vport;
3405
3406 init_timer(&vport->els_tmofunc);
3407 vport->els_tmofunc.function = lpfc_els_timeout;
3408 vport->els_tmofunc.data = (unsigned long)vport;
3409
3410 init_timer(&vport->delayed_disc_tmo);
3411 vport->delayed_disc_tmo.function = lpfc_delayed_disc_tmo;
3412 vport->delayed_disc_tmo.data = (unsigned long)vport;
3413
3414 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
3415 if (error)
3416 goto out_put_shost;
3417
3418 spin_lock_irq(&phba->hbalock);
3419 list_add_tail(&vport->listentry, &phba->port_list);
3420 spin_unlock_irq(&phba->hbalock);
3421 return vport;
3422
3423out_put_shost:
3424 scsi_host_put(shost);
3425out:
3426 return NULL;
3427}
3428
3429
3430
3431
3432
3433
3434
3435
3436void
3437destroy_port(struct lpfc_vport *vport)
3438{
3439 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3440 struct lpfc_hba *phba = vport->phba;
3441
3442 lpfc_debugfs_terminate(vport);
3443 fc_remove_host(shost);
3444 scsi_remove_host(shost);
3445
3446 spin_lock_irq(&phba->hbalock);
3447 list_del_init(&vport->listentry);
3448 spin_unlock_irq(&phba->hbalock);
3449
3450 lpfc_cleanup(vport);
3451 return;
3452}
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464int
3465lpfc_get_instance(void)
3466{
3467 int ret;
3468
3469 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3470 return ret < 0 ? -1 : ret;
3471}
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
3489{
3490 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3491 struct lpfc_hba *phba = vport->phba;
3492 int stat = 0;
3493
3494 spin_lock_irq(shost->host_lock);
3495
3496 if (vport->load_flag & FC_UNLOADING) {
3497 stat = 1;
3498 goto finished;
3499 }
3500 if (time >= msecs_to_jiffies(30 * 1000)) {
3501 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3502 "0461 Scanning longer than 30 "
3503 "seconds. Continuing initialization\n");
3504 stat = 1;
3505 goto finished;
3506 }
3507 if (time >= msecs_to_jiffies(15 * 1000) &&
3508 phba->link_state <= LPFC_LINK_DOWN) {
3509 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3510 "0465 Link down longer than 15 "
3511 "seconds. Continuing initialization\n");
3512 stat = 1;
3513 goto finished;
3514 }
3515
3516 if (vport->port_state != LPFC_VPORT_READY)
3517 goto finished;
3518 if (vport->num_disc_nodes || vport->fc_prli_sent)
3519 goto finished;
3520 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
3521 goto finished;
3522 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
3523 goto finished;
3524
3525 stat = 1;
3526
3527finished:
3528 spin_unlock_irq(shost->host_lock);
3529 return stat;
3530}
3531
3532
3533
3534
3535
3536
3537
3538
3539void lpfc_host_attrib_init(struct Scsi_Host *shost)
3540{
3541 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3542 struct lpfc_hba *phba = vport->phba;
3543
3544
3545
3546
3547 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
3548 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
3549 fc_host_supported_classes(shost) = FC_COS_CLASS3;
3550
3551 memset(fc_host_supported_fc4s(shost), 0,
3552 sizeof(fc_host_supported_fc4s(shost)));
3553 fc_host_supported_fc4s(shost)[2] = 1;
3554 fc_host_supported_fc4s(shost)[7] = 1;
3555
3556 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
3557 sizeof fc_host_symbolic_name(shost));
3558
3559 fc_host_supported_speeds(shost) = 0;
3560 if (phba->lmt & LMT_32Gb)
3561 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
3562 if (phba->lmt & LMT_16Gb)
3563 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
3564 if (phba->lmt & LMT_10Gb)
3565 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
3566 if (phba->lmt & LMT_8Gb)
3567 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
3568 if (phba->lmt & LMT_4Gb)
3569 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
3570 if (phba->lmt & LMT_2Gb)
3571 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
3572 if (phba->lmt & LMT_1Gb)
3573 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
3574
3575 fc_host_maxframe_size(shost) =
3576 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
3577 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
3578
3579 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
3580
3581
3582 memset(fc_host_active_fc4s(shost), 0,
3583 sizeof(fc_host_active_fc4s(shost)));
3584 fc_host_active_fc4s(shost)[2] = 1;
3585 fc_host_active_fc4s(shost)[7] = 1;
3586
3587 fc_host_max_npiv_vports(shost) = phba->max_vpi;
3588 spin_lock_irq(shost->host_lock);
3589 vport->load_flag &= ~FC_LOADING;
3590 spin_unlock_irq(shost->host_lock);
3591}
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601static void
3602lpfc_stop_port_s3(struct lpfc_hba *phba)
3603{
3604
3605 writel(0, phba->HCregaddr);
3606 readl(phba->HCregaddr);
3607
3608 writel(0xffffffff, phba->HAregaddr);
3609 readl(phba->HAregaddr);
3610
3611
3612 lpfc_stop_hba_timers(phba);
3613 phba->pport->work_port_events = 0;
3614}
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624static void
3625lpfc_stop_port_s4(struct lpfc_hba *phba)
3626{
3627
3628 lpfc_stop_hba_timers(phba);
3629 phba->pport->work_port_events = 0;
3630 phba->sli4_hba.intr_enable = 0;
3631}
3632
3633
3634
3635
3636
3637
3638
3639
3640void
3641lpfc_stop_port(struct lpfc_hba *phba)
3642{
3643 phba->lpfc_stop_port(phba);
3644}
3645
3646
3647
3648
3649
3650
3651
3652void
3653lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
3654{
3655 unsigned long fcf_redisc_wait_tmo =
3656 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
3657
3658 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
3659 spin_lock_irq(&phba->hbalock);
3660
3661 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
3662
3663 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
3664 spin_unlock_irq(&phba->hbalock);
3665}
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677static void
3678lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
3679{
3680 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
3681
3682
3683 spin_lock_irq(&phba->hbalock);
3684 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
3685 spin_unlock_irq(&phba->hbalock);
3686 return;
3687 }
3688
3689 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
3690
3691 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
3692 spin_unlock_irq(&phba->hbalock);
3693 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
3694 "2776 FCF rediscover quiescent timer expired\n");
3695
3696 lpfc_worker_wake_up(phba);
3697}
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710static uint16_t
3711lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
3712 struct lpfc_acqe_link *acqe_link)
3713{
3714 uint16_t latt_fault;
3715
3716 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
3717 case LPFC_ASYNC_LINK_FAULT_NONE:
3718 case LPFC_ASYNC_LINK_FAULT_LOCAL:
3719 case LPFC_ASYNC_LINK_FAULT_REMOTE:
3720 latt_fault = 0;
3721 break;
3722 default:
3723 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3724 "0398 Invalid link fault code: x%x\n",
3725 bf_get(lpfc_acqe_link_fault, acqe_link));
3726 latt_fault = MBXERR_ERROR;
3727 break;
3728 }
3729 return latt_fault;
3730}
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742static uint8_t
3743lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
3744 struct lpfc_acqe_link *acqe_link)
3745{
3746 uint8_t att_type;
3747
3748 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
3749 case LPFC_ASYNC_LINK_STATUS_DOWN:
3750 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
3751 att_type = LPFC_ATT_LINK_DOWN;
3752 break;
3753 case LPFC_ASYNC_LINK_STATUS_UP:
3754
3755 att_type = LPFC_ATT_RESERVED;
3756 break;
3757 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
3758 att_type = LPFC_ATT_LINK_UP;
3759 break;
3760 default:
3761 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3762 "0399 Invalid link attention type: x%x\n",
3763 bf_get(lpfc_acqe_link_status, acqe_link));
3764 att_type = LPFC_ATT_RESERVED;
3765 break;
3766 }
3767 return att_type;
3768}
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778uint32_t
3779lpfc_sli_port_speed_get(struct lpfc_hba *phba)
3780{
3781 uint32_t link_speed;
3782
3783 if (!lpfc_is_link_up(phba))
3784 return 0;
3785
3786 if (phba->sli_rev <= LPFC_SLI_REV3) {
3787 switch (phba->fc_linkspeed) {
3788 case LPFC_LINK_SPEED_1GHZ:
3789 link_speed = 1000;
3790 break;
3791 case LPFC_LINK_SPEED_2GHZ:
3792 link_speed = 2000;
3793 break;
3794 case LPFC_LINK_SPEED_4GHZ:
3795 link_speed = 4000;
3796 break;
3797 case LPFC_LINK_SPEED_8GHZ:
3798 link_speed = 8000;
3799 break;
3800 case LPFC_LINK_SPEED_10GHZ:
3801 link_speed = 10000;
3802 break;
3803 case LPFC_LINK_SPEED_16GHZ:
3804 link_speed = 16000;
3805 break;
3806 default:
3807 link_speed = 0;
3808 }
3809 } else {
3810 if (phba->sli4_hba.link_state.logical_speed)
3811 link_speed =
3812 phba->sli4_hba.link_state.logical_speed;
3813 else
3814 link_speed = phba->sli4_hba.link_state.speed;
3815 }
3816 return link_speed;
3817}
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830static uint32_t
3831lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
3832 uint8_t speed_code)
3833{
3834 uint32_t port_speed;
3835
3836 switch (evt_code) {
3837 case LPFC_TRAILER_CODE_LINK:
3838 switch (speed_code) {
3839 case LPFC_ASYNC_LINK_SPEED_ZERO:
3840 port_speed = 0;
3841 break;
3842 case LPFC_ASYNC_LINK_SPEED_10MBPS:
3843 port_speed = 10;
3844 break;
3845 case LPFC_ASYNC_LINK_SPEED_100MBPS:
3846 port_speed = 100;
3847 break;
3848 case LPFC_ASYNC_LINK_SPEED_1GBPS:
3849 port_speed = 1000;
3850 break;
3851 case LPFC_ASYNC_LINK_SPEED_10GBPS:
3852 port_speed = 10000;
3853 break;
3854 case LPFC_ASYNC_LINK_SPEED_20GBPS:
3855 port_speed = 20000;
3856 break;
3857 case LPFC_ASYNC_LINK_SPEED_25GBPS:
3858 port_speed = 25000;
3859 break;
3860 case LPFC_ASYNC_LINK_SPEED_40GBPS:
3861 port_speed = 40000;
3862 break;
3863 default:
3864 port_speed = 0;
3865 }
3866 break;
3867 case LPFC_TRAILER_CODE_FC:
3868 switch (speed_code) {
3869 case LPFC_FC_LA_SPEED_UNKNOWN:
3870 port_speed = 0;
3871 break;
3872 case LPFC_FC_LA_SPEED_1G:
3873 port_speed = 1000;
3874 break;
3875 case LPFC_FC_LA_SPEED_2G:
3876 port_speed = 2000;
3877 break;
3878 case LPFC_FC_LA_SPEED_4G:
3879 port_speed = 4000;
3880 break;
3881 case LPFC_FC_LA_SPEED_8G:
3882 port_speed = 8000;
3883 break;
3884 case LPFC_FC_LA_SPEED_10G:
3885 port_speed = 10000;
3886 break;
3887 case LPFC_FC_LA_SPEED_16G:
3888 port_speed = 16000;
3889 break;
3890 case LPFC_FC_LA_SPEED_32G:
3891 port_speed = 32000;
3892 break;
3893 default:
3894 port_speed = 0;
3895 }
3896 break;
3897 default:
3898 port_speed = 0;
3899 }
3900 return port_speed;
3901}
3902
3903
3904
3905
3906
3907
3908
3909
3910static void
3911lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
3912 struct lpfc_acqe_link *acqe_link)
3913{
3914 struct lpfc_dmabuf *mp;
3915 LPFC_MBOXQ_t *pmb;
3916 MAILBOX_t *mb;
3917 struct lpfc_mbx_read_top *la;
3918 uint8_t att_type;
3919 int rc;
3920
3921 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
3922 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
3923 return;
3924 phba->fcoe_eventtag = acqe_link->event_tag;
3925 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
3926 if (!pmb) {
3927 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3928 "0395 The mboxq allocation failed\n");
3929 return;
3930 }
3931 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
3932 if (!mp) {
3933 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3934 "0396 The lpfc_dmabuf allocation failed\n");
3935 goto out_free_pmb;
3936 }
3937 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
3938 if (!mp->virt) {
3939 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3940 "0397 The mbuf allocation failed\n");
3941 goto out_free_dmabuf;
3942 }
3943
3944
3945 lpfc_els_flush_all_cmd(phba);
3946
3947
3948 phba->sli.ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
3949
3950
3951 phba->sli.slistat.link_event++;
3952
3953
3954 lpfc_read_topology(phba, pmb, mp);
3955 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
3956 pmb->vport = phba->pport;
3957
3958
3959 phba->sli4_hba.link_state.speed =
3960 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
3961 bf_get(lpfc_acqe_link_speed, acqe_link));
3962 phba->sli4_hba.link_state.duplex =
3963 bf_get(lpfc_acqe_link_duplex, acqe_link);
3964 phba->sli4_hba.link_state.status =
3965 bf_get(lpfc_acqe_link_status, acqe_link);
3966 phba->sli4_hba.link_state.type =
3967 bf_get(lpfc_acqe_link_type, acqe_link);
3968 phba->sli4_hba.link_state.number =
3969 bf_get(lpfc_acqe_link_number, acqe_link);
3970 phba->sli4_hba.link_state.fault =
3971 bf_get(lpfc_acqe_link_fault, acqe_link);
3972 phba->sli4_hba.link_state.logical_speed =
3973 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
3974
3975 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3976 "2900 Async FC/FCoE Link event - Speed:%dGBit "
3977 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
3978 "Logical speed:%dMbps Fault:%d\n",
3979 phba->sli4_hba.link_state.speed,
3980 phba->sli4_hba.link_state.topology,
3981 phba->sli4_hba.link_state.status,
3982 phba->sli4_hba.link_state.type,
3983 phba->sli4_hba.link_state.number,
3984 phba->sli4_hba.link_state.logical_speed,
3985 phba->sli4_hba.link_state.fault);
3986
3987
3988
3989
3990 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
3991 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
3992 if (rc == MBX_NOT_FINISHED)
3993 goto out_free_dmabuf;
3994 return;
3995 }
3996
3997
3998
3999
4000
4001
4002 mb = &pmb->u.mb;
4003 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4004
4005
4006 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4007 la->eventTag = acqe_link->event_tag;
4008 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4009 bf_set(lpfc_mbx_read_top_link_spd, la,
4010 (bf_get(lpfc_acqe_link_speed, acqe_link)));
4011
4012
4013 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4014 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4015 bf_set(lpfc_mbx_read_top_il, la, 0);
4016 bf_set(lpfc_mbx_read_top_pb, la, 0);
4017 bf_set(lpfc_mbx_read_top_fa, la, 0);
4018 bf_set(lpfc_mbx_read_top_mm, la, 0);
4019
4020
4021 lpfc_mbx_cmpl_read_topology(phba, pmb);
4022
4023 return;
4024
4025out_free_dmabuf:
4026 kfree(mp);
4027out_free_pmb:
4028 mempool_free(pmb, phba->mbox_mem_pool);
4029}
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040static void
4041lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4042{
4043 struct lpfc_dmabuf *mp;
4044 LPFC_MBOXQ_t *pmb;
4045 MAILBOX_t *mb;
4046 struct lpfc_mbx_read_top *la;
4047 int rc;
4048
4049 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4050 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4051 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4052 "2895 Non FC link Event detected.(%d)\n",
4053 bf_get(lpfc_trailer_type, acqe_fc));
4054 return;
4055 }
4056
4057 phba->sli4_hba.link_state.speed =
4058 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4059 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
4060 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4061 phba->sli4_hba.link_state.topology =
4062 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4063 phba->sli4_hba.link_state.status =
4064 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4065 phba->sli4_hba.link_state.type =
4066 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4067 phba->sli4_hba.link_state.number =
4068 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4069 phba->sli4_hba.link_state.fault =
4070 bf_get(lpfc_acqe_link_fault, acqe_fc);
4071 phba->sli4_hba.link_state.logical_speed =
4072 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
4073 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4074 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4075 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4076 "%dMbps Fault:%d\n",
4077 phba->sli4_hba.link_state.speed,
4078 phba->sli4_hba.link_state.topology,
4079 phba->sli4_hba.link_state.status,
4080 phba->sli4_hba.link_state.type,
4081 phba->sli4_hba.link_state.number,
4082 phba->sli4_hba.link_state.logical_speed,
4083 phba->sli4_hba.link_state.fault);
4084 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4085 if (!pmb) {
4086 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4087 "2897 The mboxq allocation failed\n");
4088 return;
4089 }
4090 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4091 if (!mp) {
4092 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4093 "2898 The lpfc_dmabuf allocation failed\n");
4094 goto out_free_pmb;
4095 }
4096 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4097 if (!mp->virt) {
4098 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4099 "2899 The mbuf allocation failed\n");
4100 goto out_free_dmabuf;
4101 }
4102
4103
4104 lpfc_els_flush_all_cmd(phba);
4105
4106
4107 phba->sli.ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
4108
4109
4110 phba->sli.slistat.link_event++;
4111
4112
4113 lpfc_read_topology(phba, pmb, mp);
4114 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4115 pmb->vport = phba->pport;
4116
4117 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
4118
4119 mb = &pmb->u.mb;
4120 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4121 (void *)acqe_fc);
4122
4123
4124 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4125 la->eventTag = acqe_fc->event_tag;
4126 bf_set(lpfc_mbx_read_top_att_type, la,
4127 LPFC_FC_LA_TYPE_LINK_DOWN);
4128
4129
4130 lpfc_mbx_cmpl_read_topology(phba, pmb);
4131
4132 return;
4133 }
4134
4135 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4136 if (rc == MBX_NOT_FINISHED)
4137 goto out_free_dmabuf;
4138 return;
4139
4140out_free_dmabuf:
4141 kfree(mp);
4142out_free_pmb:
4143 mempool_free(pmb, phba->mbox_mem_pool);
4144}
4145
4146
4147
4148
4149
4150
4151
4152
4153static void
4154lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4155{
4156 char port_name;
4157 char message[128];
4158 uint8_t status;
4159 uint8_t evt_type;
4160 uint8_t operational = 0;
4161 struct temp_event temp_event_data;
4162 struct lpfc_acqe_misconfigured_event *misconfigured;
4163 struct Scsi_Host *shost;
4164
4165 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4166
4167 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4168 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4169 "x%08x SLI Event Type:%d\n",
4170 acqe_sli->event_data1, acqe_sli->event_data2,
4171 evt_type);
4172
4173 port_name = phba->Port[0];
4174 if (port_name == 0x00)
4175 port_name = '?';
4176
4177 switch (evt_type) {
4178 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4179 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4180 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4181 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4182
4183 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4184 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4185 acqe_sli->event_data1, port_name);
4186
4187 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
4188 shost = lpfc_shost_from_vport(phba->pport);
4189 fc_host_post_vendor_event(shost, fc_get_event_number(),
4190 sizeof(temp_event_data),
4191 (char *)&temp_event_data,
4192 SCSI_NL_VID_TYPE_PCI
4193 | PCI_VENDOR_ID_EMULEX);
4194 break;
4195 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4196 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4197 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4198 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4199
4200 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4201 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4202 acqe_sli->event_data1, port_name);
4203
4204 shost = lpfc_shost_from_vport(phba->pport);
4205 fc_host_post_vendor_event(shost, fc_get_event_number(),
4206 sizeof(temp_event_data),
4207 (char *)&temp_event_data,
4208 SCSI_NL_VID_TYPE_PCI
4209 | PCI_VENDOR_ID_EMULEX);
4210 break;
4211 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4212 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4213 &acqe_sli->event_data1;
4214
4215
4216 switch (phba->sli4_hba.lnk_info.lnk_no) {
4217 case LPFC_LINK_NUMBER_0:
4218 status = bf_get(lpfc_sli_misconfigured_port0_state,
4219 &misconfigured->theEvent);
4220 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4221 &misconfigured->theEvent);
4222 break;
4223 case LPFC_LINK_NUMBER_1:
4224 status = bf_get(lpfc_sli_misconfigured_port1_state,
4225 &misconfigured->theEvent);
4226 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4227 &misconfigured->theEvent);
4228 break;
4229 case LPFC_LINK_NUMBER_2:
4230 status = bf_get(lpfc_sli_misconfigured_port2_state,
4231 &misconfigured->theEvent);
4232 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4233 &misconfigured->theEvent);
4234 break;
4235 case LPFC_LINK_NUMBER_3:
4236 status = bf_get(lpfc_sli_misconfigured_port3_state,
4237 &misconfigured->theEvent);
4238 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4239 &misconfigured->theEvent);
4240 break;
4241 default:
4242 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4243 "3296 "
4244 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4245 "event: Invalid link %d",
4246 phba->sli4_hba.lnk_info.lnk_no);
4247 return;
4248 }
4249
4250
4251 if (phba->sli4_hba.lnk_info.optic_state == status)
4252 return;
4253
4254 switch (status) {
4255 case LPFC_SLI_EVENT_STATUS_VALID:
4256 sprintf(message, "Physical Link is functional");
4257 break;
4258 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4259 sprintf(message, "Optics faulted/incorrectly "
4260 "installed/not installed - Reseat optics, "
4261 "if issue not resolved, replace.");
4262 break;
4263 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4264 sprintf(message,
4265 "Optics of two types installed - Remove one "
4266 "optic or install matching pair of optics.");
4267 break;
4268 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4269 sprintf(message, "Incompatible optics - Replace with "
4270 "compatible optics for card to function.");
4271 break;
4272 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4273 sprintf(message, "Unqualified optics - Replace with "
4274 "Avago optics for Warranty and Technical "
4275 "Support - Link is%s operational",
4276 (operational) ? "" : " not");
4277 break;
4278 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4279 sprintf(message, "Uncertified optics - Replace with "
4280 "Avago-certified optics to enable link "
4281 "operation - Link is%s operational",
4282 (operational) ? "" : " not");
4283 break;
4284 default:
4285
4286 sprintf(message, "Unknown event status x%02x", status);
4287 break;
4288 }
4289 phba->sli4_hba.lnk_info.optic_state = status;
4290 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4291 "3176 Port Name %c %s\n", port_name, message);
4292 break;
4293 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4294 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4295 "3192 Remote DPort Test Initiated - "
4296 "Event Data1:x%08x Event Data2: x%08x\n",
4297 acqe_sli->event_data1, acqe_sli->event_data2);
4298 break;
4299 default:
4300 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4301 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4302 "x%08x SLI Event Type:%d\n",
4303 acqe_sli->event_data1, acqe_sli->event_data2,
4304 evt_type);
4305 break;
4306 }
4307}
4308
4309
4310
4311
4312
4313
4314
4315
4316
4317
4318
4319static struct lpfc_nodelist *
4320lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4321{
4322 struct lpfc_nodelist *ndlp;
4323 struct Scsi_Host *shost;
4324 struct lpfc_hba *phba;
4325
4326 if (!vport)
4327 return NULL;
4328 phba = vport->phba;
4329 if (!phba)
4330 return NULL;
4331 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4332 if (!ndlp) {
4333
4334 ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_KERNEL);
4335 if (!ndlp)
4336 return 0;
4337 lpfc_nlp_init(vport, ndlp, Fabric_DID);
4338
4339 ndlp->nlp_type |= NLP_FABRIC;
4340
4341 lpfc_enqueue_node(vport, ndlp);
4342 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4343
4344 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4345 if (!ndlp)
4346 return 0;
4347 }
4348 if ((phba->pport->port_state < LPFC_FLOGI) &&
4349 (phba->pport->port_state != LPFC_VPORT_FAILED))
4350 return NULL;
4351
4352 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4353 && (vport->port_state != LPFC_VPORT_FAILED))
4354 return NULL;
4355 shost = lpfc_shost_from_vport(vport);
4356 if (!shost)
4357 return NULL;
4358 lpfc_linkdown_port(vport);
4359 lpfc_cleanup_pending_mbox(vport);
4360 spin_lock_irq(shost->host_lock);
4361 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4362 spin_unlock_irq(shost->host_lock);
4363
4364 return ndlp;
4365}
4366
4367
4368
4369
4370
4371
4372
4373
4374static void
4375lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4376{
4377 struct lpfc_vport **vports;
4378 int i;
4379
4380 vports = lpfc_create_vport_work_array(phba);
4381 if (vports)
4382 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4383 lpfc_sli4_perform_vport_cvl(vports[i]);
4384 lpfc_destroy_vport_work_array(phba, vports);
4385}
4386
4387
4388
4389
4390
4391
4392
4393
4394static void
4395lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
4396 struct lpfc_acqe_fip *acqe_fip)
4397{
4398 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
4399 int rc;
4400 struct lpfc_vport *vport;
4401 struct lpfc_nodelist *ndlp;
4402 struct Scsi_Host *shost;
4403 int active_vlink_present;
4404 struct lpfc_vport **vports;
4405 int i;
4406
4407 phba->fc_eventTag = acqe_fip->event_tag;
4408 phba->fcoe_eventtag = acqe_fip->event_tag;
4409 switch (event_type) {
4410 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4411 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4412 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
4413 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4414 LOG_DISCOVERY,
4415 "2546 New FCF event, evt_tag:x%x, "
4416 "index:x%x\n",
4417 acqe_fip->event_tag,
4418 acqe_fip->index);
4419 else
4420 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4421 LOG_DISCOVERY,
4422 "2788 FCF param modified event, "
4423 "evt_tag:x%x, index:x%x\n",
4424 acqe_fip->event_tag,
4425 acqe_fip->index);
4426 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
4427
4428
4429
4430
4431
4432 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4433 LOG_DISCOVERY,
4434 "2779 Read FCF (x%x) for updating "
4435 "roundrobin FCF failover bmask\n",
4436 acqe_fip->index);
4437 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
4438 }
4439
4440
4441 spin_lock_irq(&phba->hbalock);
4442 if (phba->hba_flag & FCF_TS_INPROG) {
4443 spin_unlock_irq(&phba->hbalock);
4444 break;
4445 }
4446
4447 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4448 spin_unlock_irq(&phba->hbalock);
4449 break;
4450 }
4451
4452
4453 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
4454 spin_unlock_irq(&phba->hbalock);
4455 break;
4456 }
4457 spin_unlock_irq(&phba->hbalock);
4458
4459
4460 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4461 "2770 Start FCF table scan per async FCF "
4462 "event, evt_tag:x%x, index:x%x\n",
4463 acqe_fip->event_tag, acqe_fip->index);
4464 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
4465 LPFC_FCOE_FCF_GET_FIRST);
4466 if (rc)
4467 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4468 "2547 Issue FCF scan read FCF mailbox "
4469 "command failed (x%x)\n", rc);
4470 break;
4471
4472 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
4473 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4474 "2548 FCF Table full count 0x%x tag 0x%x\n",
4475 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
4476 acqe_fip->event_tag);
4477 break;
4478
4479 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
4480 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
4481 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4482 "2549 FCF (x%x) disconnected from network, "
4483 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
4484
4485
4486
4487
4488 spin_lock_irq(&phba->hbalock);
4489 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
4490 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
4491 spin_unlock_irq(&phba->hbalock);
4492
4493 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
4494 break;
4495 }
4496 spin_unlock_irq(&phba->hbalock);
4497
4498
4499 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
4500 break;
4501
4502
4503
4504
4505
4506
4507
4508 spin_lock_irq(&phba->hbalock);
4509
4510 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
4511 spin_unlock_irq(&phba->hbalock);
4512
4513 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4514 "2771 Start FCF fast failover process due to "
4515 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
4516 "\n", acqe_fip->event_tag, acqe_fip->index);
4517 rc = lpfc_sli4_redisc_fcf_table(phba);
4518 if (rc) {
4519 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4520 LOG_DISCOVERY,
4521 "2772 Issue FCF rediscover mabilbox "
4522 "command failed, fail through to FCF "
4523 "dead event\n");
4524 spin_lock_irq(&phba->hbalock);
4525 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
4526 spin_unlock_irq(&phba->hbalock);
4527
4528
4529
4530
4531 lpfc_sli4_fcf_dead_failthrough(phba);
4532 } else {
4533
4534 lpfc_sli4_clear_fcf_rr_bmask(phba);
4535
4536
4537
4538
4539 lpfc_sli4_perform_all_vport_cvl(phba);
4540 }
4541 break;
4542 case LPFC_FIP_EVENT_TYPE_CVL:
4543 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
4544 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4545 "2718 Clear Virtual Link Received for VPI 0x%x"
4546 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
4547
4548 vport = lpfc_find_vport_by_vpid(phba,
4549 acqe_fip->index);
4550 ndlp = lpfc_sli4_perform_vport_cvl(vport);
4551 if (!ndlp)
4552 break;
4553 active_vlink_present = 0;
4554
4555 vports = lpfc_create_vport_work_array(phba);
4556 if (vports) {
4557 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
4558 i++) {
4559 if ((!(vports[i]->fc_flag &
4560 FC_VPORT_CVL_RCVD)) &&
4561 (vports[i]->port_state > LPFC_FDISC)) {
4562 active_vlink_present = 1;
4563 break;
4564 }
4565 }
4566 lpfc_destroy_vport_work_array(phba, vports);
4567 }
4568
4569
4570
4571
4572
4573
4574 if (!(vport->load_flag & FC_UNLOADING) &&
4575 active_vlink_present) {
4576
4577
4578
4579
4580 mod_timer(&ndlp->nlp_delayfunc,
4581 jiffies + msecs_to_jiffies(1000));
4582 shost = lpfc_shost_from_vport(vport);
4583 spin_lock_irq(shost->host_lock);
4584 ndlp->nlp_flag |= NLP_DELAY_TMO;
4585 spin_unlock_irq(shost->host_lock);
4586 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
4587 vport->port_state = LPFC_FDISC;
4588 } else {
4589
4590
4591
4592
4593
4594
4595
4596 spin_lock_irq(&phba->hbalock);
4597 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
4598 spin_unlock_irq(&phba->hbalock);
4599 break;
4600 }
4601
4602 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
4603 spin_unlock_irq(&phba->hbalock);
4604 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4605 LOG_DISCOVERY,
4606 "2773 Start FCF failover per CVL, "
4607 "evt_tag:x%x\n", acqe_fip->event_tag);
4608 rc = lpfc_sli4_redisc_fcf_table(phba);
4609 if (rc) {
4610 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4611 LOG_DISCOVERY,
4612 "2774 Issue FCF rediscover "
4613 "mabilbox command failed, "
4614 "through to CVL event\n");
4615 spin_lock_irq(&phba->hbalock);
4616 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
4617 spin_unlock_irq(&phba->hbalock);
4618
4619
4620
4621
4622 lpfc_retry_pport_discovery(phba);
4623 } else
4624
4625
4626
4627
4628 lpfc_sli4_clear_fcf_rr_bmask(phba);
4629 }
4630 break;
4631 default:
4632 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4633 "0288 Unknown FCoE event type 0x%x event tag "
4634 "0x%x\n", event_type, acqe_fip->event_tag);
4635 break;
4636 }
4637}
4638
4639
4640
4641
4642
4643
4644
4645
4646static void
4647lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
4648 struct lpfc_acqe_dcbx *acqe_dcbx)
4649{
4650 phba->fc_eventTag = acqe_dcbx->event_tag;
4651 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4652 "0290 The SLI4 DCBX asynchronous event is not "
4653 "handled yet\n");
4654}
4655
4656
4657
4658
4659
4660
4661
4662
4663
4664
4665static void
4666lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
4667 struct lpfc_acqe_grp5 *acqe_grp5)
4668{
4669 uint16_t prev_ll_spd;
4670
4671 phba->fc_eventTag = acqe_grp5->event_tag;
4672 phba->fcoe_eventtag = acqe_grp5->event_tag;
4673 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
4674 phba->sli4_hba.link_state.logical_speed =
4675 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
4676 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4677 "2789 GRP5 Async Event: Updating logical link speed "
4678 "from %dMbps to %dMbps\n", prev_ll_spd,
4679 phba->sli4_hba.link_state.logical_speed);
4680}
4681
4682
4683
4684
4685
4686
4687
4688
4689void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
4690{
4691 struct lpfc_cq_event *cq_event;
4692
4693
4694 spin_lock_irq(&phba->hbalock);
4695 phba->hba_flag &= ~ASYNC_EVENT;
4696 spin_unlock_irq(&phba->hbalock);
4697
4698 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
4699
4700 spin_lock_irq(&phba->hbalock);
4701 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
4702 cq_event, struct lpfc_cq_event, list);
4703 spin_unlock_irq(&phba->hbalock);
4704
4705 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
4706 case LPFC_TRAILER_CODE_LINK:
4707 lpfc_sli4_async_link_evt(phba,
4708 &cq_event->cqe.acqe_link);
4709 break;
4710 case LPFC_TRAILER_CODE_FCOE:
4711 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
4712 break;
4713 case LPFC_TRAILER_CODE_DCBX:
4714 lpfc_sli4_async_dcbx_evt(phba,
4715 &cq_event->cqe.acqe_dcbx);
4716 break;
4717 case LPFC_TRAILER_CODE_GRP5:
4718 lpfc_sli4_async_grp5_evt(phba,
4719 &cq_event->cqe.acqe_grp5);
4720 break;
4721 case LPFC_TRAILER_CODE_FC:
4722 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
4723 break;
4724 case LPFC_TRAILER_CODE_SLI:
4725 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
4726 break;
4727 default:
4728 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4729 "1804 Invalid asynchrous event code: "
4730 "x%x\n", bf_get(lpfc_trailer_code,
4731 &cq_event->cqe.mcqe_cmpl));
4732 break;
4733 }
4734
4735 lpfc_sli4_cq_event_release(phba, cq_event);
4736 }
4737}
4738
4739
4740
4741
4742
4743
4744
4745
4746void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
4747{
4748 int rc;
4749
4750 spin_lock_irq(&phba->hbalock);
4751
4752 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
4753
4754 phba->fcf.failover_rec.flag = 0;
4755
4756 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
4757 spin_unlock_irq(&phba->hbalock);
4758
4759
4760 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4761 "2777 Start post-quiescent FCF table scan\n");
4762 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
4763 if (rc)
4764 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4765 "2747 Issue FCF scan read FCF mailbox "
4766 "command failed 0x%x\n", rc);
4767}
4768
4769
4770
4771
4772
4773
4774
4775
4776
4777
4778
4779int
4780lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
4781{
4782 int rc;
4783
4784
4785 phba->pci_dev_grp = dev_grp;
4786
4787
4788 if (dev_grp == LPFC_PCI_DEV_OC)
4789 phba->sli_rev = LPFC_SLI_REV4;
4790
4791
4792 rc = lpfc_init_api_table_setup(phba, dev_grp);
4793 if (rc)
4794 return -ENODEV;
4795
4796 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
4797 if (rc)
4798 return -ENODEV;
4799
4800 rc = lpfc_sli_api_table_setup(phba, dev_grp);
4801 if (rc)
4802 return -ENODEV;
4803
4804 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
4805 if (rc)
4806 return -ENODEV;
4807
4808 return 0;
4809}
4810
4811
4812
4813
4814
4815
4816
4817
4818
4819static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
4820{
4821 switch (intr_mode) {
4822 case 0:
4823 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4824 "0470 Enable INTx interrupt mode.\n");
4825 break;
4826 case 1:
4827 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4828 "0481 Enabled MSI interrupt mode.\n");
4829 break;
4830 case 2:
4831 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4832 "0480 Enabled MSI-X interrupt mode.\n");
4833 break;
4834 default:
4835 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4836 "0482 Illegal interrupt mode.\n");
4837 break;
4838 }
4839 return;
4840}
4841
4842
4843
4844
4845
4846
4847
4848
4849
4850
4851
4852
4853static int
4854lpfc_enable_pci_dev(struct lpfc_hba *phba)
4855{
4856 struct pci_dev *pdev;
4857
4858
4859 if (!phba->pcidev)
4860 goto out_error;
4861 else
4862 pdev = phba->pcidev;
4863
4864 if (pci_enable_device_mem(pdev))
4865 goto out_error;
4866
4867 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
4868 goto out_disable_device;
4869
4870 pci_set_master(pdev);
4871 pci_try_set_mwi(pdev);
4872 pci_save_state(pdev);
4873
4874
4875 if (pci_is_pcie(pdev))
4876 pdev->needs_freset = 1;
4877
4878 return 0;
4879
4880out_disable_device:
4881 pci_disable_device(pdev);
4882out_error:
4883 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4884 "1401 Failed to enable pci device\n");
4885 return -ENODEV;
4886}
4887
4888
4889
4890
4891
4892
4893
4894
4895static void
4896lpfc_disable_pci_dev(struct lpfc_hba *phba)
4897{
4898 struct pci_dev *pdev;
4899
4900
4901 if (!phba->pcidev)
4902 return;
4903 else
4904 pdev = phba->pcidev;
4905
4906 pci_release_mem_regions(pdev);
4907 pci_disable_device(pdev);
4908
4909 return;
4910}
4911
4912
4913
4914
4915
4916
4917
4918
4919
4920
4921void
4922lpfc_reset_hba(struct lpfc_hba *phba)
4923{
4924
4925 if (!phba->cfg_enable_hba_reset) {
4926 phba->link_state = LPFC_HBA_ERROR;
4927 return;
4928 }
4929 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
4930 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
4931 else
4932 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
4933 lpfc_offline(phba);
4934 lpfc_sli_brdrestart(phba);
4935 lpfc_online(phba);
4936 lpfc_unblock_mgmt_io(phba);
4937}
4938
4939
4940
4941
4942
4943
4944
4945
4946
4947
4948
4949uint16_t
4950lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
4951{
4952 struct pci_dev *pdev = phba->pcidev;
4953 uint16_t nr_virtfn;
4954 int pos;
4955
4956 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4957 if (pos == 0)
4958 return 0;
4959
4960 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
4961 return nr_virtfn;
4962}
4963
4964
4965
4966
4967
4968
4969
4970
4971
4972
4973
4974
4975int
4976lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
4977{
4978 struct pci_dev *pdev = phba->pcidev;
4979 uint16_t max_nr_vfn;
4980 int rc;
4981
4982 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
4983 if (nr_vfn > max_nr_vfn) {
4984 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4985 "3057 Requested vfs (%d) greater than "
4986 "supported vfs (%d)", nr_vfn, max_nr_vfn);
4987 return -EINVAL;
4988 }
4989
4990 rc = pci_enable_sriov(pdev, nr_vfn);
4991 if (rc) {
4992 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
4993 "2806 Failed to enable sriov on this device "
4994 "with vfn number nr_vf:%d, rc:%d\n",
4995 nr_vfn, rc);
4996 } else
4997 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
4998 "2807 Successful enable sriov on this device "
4999 "with vfn number nr_vf:%d\n", nr_vfn);
5000 return rc;
5001}
5002
5003
5004
5005
5006
5007
5008
5009
5010
5011
5012
5013
5014static int
5015lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5016{
5017 struct lpfc_sli *psli;
5018 int rc;
5019
5020
5021
5022
5023
5024
5025 init_timer(&phba->hb_tmofunc);
5026 phba->hb_tmofunc.function = lpfc_hb_timeout;
5027 phba->hb_tmofunc.data = (unsigned long)phba;
5028
5029 psli = &phba->sli;
5030
5031 init_timer(&psli->mbox_tmo);
5032 psli->mbox_tmo.function = lpfc_mbox_timeout;
5033 psli->mbox_tmo.data = (unsigned long) phba;
5034
5035 init_timer(&phba->fcp_poll_timer);
5036 phba->fcp_poll_timer.function = lpfc_poll_timeout;
5037 phba->fcp_poll_timer.data = (unsigned long) phba;
5038
5039 init_timer(&phba->fabric_block_timer);
5040 phba->fabric_block_timer.function = lpfc_fabric_block_timeout;
5041 phba->fabric_block_timer.data = (unsigned long) phba;
5042
5043 init_timer(&phba->eratt_poll);
5044 phba->eratt_poll.function = lpfc_poll_eratt;
5045 phba->eratt_poll.data = (unsigned long) phba;
5046
5047
5048 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5049 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
5050
5051
5052 lpfc_get_cfgparam(phba);
5053 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5054 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5055
5056 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5057 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5058 }
5059
5060 if (!phba->sli.ring)
5061 phba->sli.ring = kzalloc(LPFC_SLI3_MAX_RING *
5062 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
5063 if (!phba->sli.ring)
5064 return -ENOMEM;
5065
5066
5067
5068
5069
5070
5071
5072 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5073 lpfc_template_s3.sg_tablesize = phba->cfg_sg_seg_cnt;
5074
5075
5076 if (phba->cfg_enable_bg) {
5077
5078
5079
5080
5081
5082
5083
5084
5085
5086 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5087 sizeof(struct fcp_rsp) +
5088 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5089
5090 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5091 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5092
5093
5094 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5095 } else {
5096
5097
5098
5099
5100
5101 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5102 sizeof(struct fcp_rsp) +
5103 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5104
5105
5106 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
5107 }
5108
5109 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5110 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5111 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5112 phba->cfg_total_seg_cnt);
5113
5114 phba->max_vpi = LPFC_MAX_VPI;
5115
5116 phba->max_vports = 0;
5117
5118
5119
5120
5121 lpfc_sli_setup(phba);
5122 lpfc_sli_queue_setup(phba);
5123
5124
5125 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5126 return -ENOMEM;
5127
5128
5129
5130
5131
5132 if (phba->cfg_sriov_nr_virtfn > 0) {
5133 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5134 phba->cfg_sriov_nr_virtfn);
5135 if (rc) {
5136 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5137 "2808 Requested number of SR-IOV "
5138 "virtual functions (%d) is not "
5139 "supported\n",
5140 phba->cfg_sriov_nr_virtfn);
5141 phba->cfg_sriov_nr_virtfn = 0;
5142 }
5143 }
5144
5145 return 0;
5146}
5147
5148
5149
5150
5151
5152
5153
5154
5155static void
5156lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5157{
5158
5159 lpfc_mem_free_all(phba);
5160
5161 return;
5162}
5163
5164
5165
5166
5167
5168
5169
5170
5171
5172
5173
5174
5175static int
5176lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
5177{
5178 struct lpfc_vector_map_info *cpup;
5179 struct lpfc_sli *psli;
5180 LPFC_MBOXQ_t *mboxq;
5181 int rc, i, hbq_count, max_buf_size;
5182 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5183 struct lpfc_mqe *mqe;
5184 int longs;
5185 int fof_vectors = 0;
5186
5187
5188 lpfc_get_cfgparam(phba);
5189
5190
5191 rc = lpfc_sli4_post_status_check(phba);
5192 if (rc)
5193 return -ENODEV;
5194
5195
5196
5197
5198
5199
5200 init_timer(&phba->hb_tmofunc);
5201 phba->hb_tmofunc.function = lpfc_hb_timeout;
5202 phba->hb_tmofunc.data = (unsigned long)phba;
5203 init_timer(&phba->rrq_tmr);
5204 phba->rrq_tmr.function = lpfc_rrq_timeout;
5205 phba->rrq_tmr.data = (unsigned long)phba;
5206
5207 psli = &phba->sli;
5208
5209 init_timer(&psli->mbox_tmo);
5210 psli->mbox_tmo.function = lpfc_mbox_timeout;
5211 psli->mbox_tmo.data = (unsigned long) phba;
5212
5213 init_timer(&phba->fabric_block_timer);
5214 phba->fabric_block_timer.function = lpfc_fabric_block_timeout;
5215 phba->fabric_block_timer.data = (unsigned long) phba;
5216
5217 init_timer(&phba->eratt_poll);
5218 phba->eratt_poll.function = lpfc_poll_eratt;
5219 phba->eratt_poll.data = (unsigned long) phba;
5220
5221 init_timer(&phba->fcf.redisc_wait);
5222 phba->fcf.redisc_wait.function = lpfc_sli4_fcf_redisc_wait_tmo;
5223 phba->fcf.redisc_wait.data = (unsigned long)phba;
5224
5225
5226
5227
5228
5229 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5230 sizeof(struct lpfc_mbox_ext_buf_ctx));
5231 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5232
5233 phba->max_vpi = LPFC_MAX_VPI;
5234
5235
5236 phba->max_vports = 0;
5237
5238
5239 phba->valid_vlan = 0;
5240 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5241 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5242 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
5243
5244
5245
5246
5247
5248 if (!phba->sli.ring)
5249 phba->sli.ring = kzalloc(
5250 (LPFC_SLI3_MAX_RING + phba->cfg_fcp_io_channel) *
5251 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
5252 if (!phba->sli.ring)
5253 return -ENOMEM;
5254
5255
5256
5257
5258
5259
5260 max_buf_size = (2 * SLI4_PAGE_SIZE);
5261 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5262 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
5263
5264
5265
5266
5267
5268
5269 if (phba->cfg_enable_bg) {
5270
5271
5272
5273
5274
5275
5276
5277
5278
5279 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5280 sizeof(struct fcp_rsp) + max_buf_size;
5281
5282
5283 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5284
5285 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
5286 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
5287 } else {
5288
5289
5290
5291
5292
5293 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5294 sizeof(struct fcp_rsp) +
5295 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge));
5296
5297
5298 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
5299
5300
5301
5302
5303 }
5304
5305
5306 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5307 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5308
5309 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5310 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5311 else
5312 phba->cfg_sg_dma_buf_size =
5313 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5314
5315 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5316 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5317 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5318 phba->cfg_total_seg_cnt);
5319
5320
5321 hbq_count = lpfc_sli_hbq_count();
5322 for (i = 0; i < hbq_count; ++i)
5323 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
5324 INIT_LIST_HEAD(&phba->rb_pend_list);
5325 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5326 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
5327
5328
5329
5330
5331
5332 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5333 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5334
5335 spin_lock_init(&phba->sli4_hba.abts_sgl_list_lock);
5336
5337
5338
5339
5340
5341
5342 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5343
5344 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
5345
5346 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5347
5348 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5349
5350 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5351
5352 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5353
5354
5355 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5356 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5357 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5358 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5359
5360
5361 phba->sli4_hba.lnk_info.optic_state = 0xff;
5362
5363
5364 lpfc_sli_setup(phba);
5365 lpfc_sli_queue_setup(phba);
5366
5367
5368 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5369 if (rc)
5370 return -ENOMEM;
5371
5372
5373 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5374 LPFC_SLI_INTF_IF_TYPE_2) {
5375 rc = lpfc_pci_function_reset(phba);
5376 if (unlikely(rc))
5377 return -ENODEV;
5378 phba->temp_sensor_support = 1;
5379 }
5380
5381
5382 rc = lpfc_create_bootstrap_mbox(phba);
5383 if (unlikely(rc))
5384 goto out_free_mem;
5385
5386
5387 rc = lpfc_setup_endian_order(phba);
5388 if (unlikely(rc))
5389 goto out_free_bsmbx;
5390
5391
5392 rc = lpfc_sli4_read_config(phba);
5393 if (unlikely(rc))
5394 goto out_free_bsmbx;
5395 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
5396 if (unlikely(rc))
5397 goto out_free_bsmbx;
5398
5399
5400 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5401 LPFC_SLI_INTF_IF_TYPE_0) {
5402 rc = lpfc_pci_function_reset(phba);
5403 if (unlikely(rc))
5404 goto out_free_bsmbx;
5405 }
5406
5407 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
5408 GFP_KERNEL);
5409 if (!mboxq) {
5410 rc = -ENOMEM;
5411 goto out_free_bsmbx;
5412 }
5413
5414
5415 lpfc_supported_pages(mboxq);
5416 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5417 if (!rc) {
5418 mqe = &mboxq->u.mqe;
5419 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
5420 LPFC_MAX_SUPPORTED_PAGES);
5421 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
5422 switch (pn_page[i]) {
5423 case LPFC_SLI4_PARAMETERS:
5424 phba->sli4_hba.pc_sli4_params.supported = 1;
5425 break;
5426 default:
5427 break;
5428 }
5429 }
5430
5431 if (phba->sli4_hba.pc_sli4_params.supported)
5432 rc = lpfc_pc_sli4_params_get(phba, mboxq);
5433 if (rc) {
5434 mempool_free(mboxq, phba->mbox_mem_pool);
5435 rc = -EIO;
5436 goto out_free_bsmbx;
5437 }
5438 }
5439
5440
5441
5442
5443
5444
5445 rc = lpfc_get_sli4_parameters(phba, mboxq);
5446 if (rc) {
5447 if (phba->sli4_hba.extents_in_use &&
5448 phba->sli4_hba.rpi_hdrs_in_use) {
5449 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5450 "2999 Unsupported SLI4 Parameters "
5451 "Extents and RPI headers enabled.\n");
5452 goto out_free_bsmbx;
5453 }
5454 }
5455 mempool_free(mboxq, phba->mbox_mem_pool);
5456
5457
5458 lpfc_sli4_oas_verify(phba);
5459 if (phba->cfg_fof)
5460 fof_vectors = 1;
5461
5462
5463 rc = lpfc_sli4_queue_verify(phba);
5464 if (rc)
5465 goto out_free_bsmbx;
5466
5467
5468 rc = lpfc_sli4_cq_event_pool_create(phba);
5469 if (rc)
5470 goto out_free_bsmbx;
5471
5472
5473 lpfc_init_sgl_list(phba);
5474
5475
5476 rc = lpfc_init_active_sgl_array(phba);
5477 if (rc) {
5478 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5479 "1430 Failed to initialize sgl list.\n");
5480 goto out_destroy_cq_event_pool;
5481 }
5482 rc = lpfc_sli4_init_rpi_hdrs(phba);
5483 if (rc) {
5484 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5485 "1432 Failed to initialize rpi headers.\n");
5486 goto out_free_active_sgl;
5487 }
5488
5489
5490 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
5491 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
5492 GFP_KERNEL);
5493 if (!phba->fcf.fcf_rr_bmask) {
5494 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5495 "2759 Failed allocate memory for FCF round "
5496 "robin failover bmask\n");
5497 rc = -ENOMEM;
5498 goto out_remove_rpi_hdrs;
5499 }
5500
5501 phba->sli4_hba.fcp_eq_hdl =
5502 kzalloc((sizeof(struct lpfc_fcp_eq_hdl) *
5503 (fof_vectors + phba->cfg_fcp_io_channel)),
5504 GFP_KERNEL);
5505 if (!phba->sli4_hba.fcp_eq_hdl) {
5506 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5507 "2572 Failed allocate memory for "
5508 "fast-path per-EQ handle array\n");
5509 rc = -ENOMEM;
5510 goto out_free_fcf_rr_bmask;
5511 }
5512
5513 phba->sli4_hba.msix_entries = kzalloc((sizeof(struct msix_entry) *
5514 (fof_vectors +
5515 phba->cfg_fcp_io_channel)), GFP_KERNEL);
5516 if (!phba->sli4_hba.msix_entries) {
5517 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5518 "2573 Failed allocate memory for msi-x "
5519 "interrupt vector entries\n");
5520 rc = -ENOMEM;
5521 goto out_free_fcp_eq_hdl;
5522 }
5523
5524 phba->sli4_hba.cpu_map = kzalloc((sizeof(struct lpfc_vector_map_info) *
5525 phba->sli4_hba.num_present_cpu),
5526 GFP_KERNEL);
5527 if (!phba->sli4_hba.cpu_map) {
5528 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5529 "3327 Failed allocate memory for msi-x "
5530 "interrupt vector mapping\n");
5531 rc = -ENOMEM;
5532 goto out_free_msix;
5533 }
5534 if (lpfc_used_cpu == NULL) {
5535 lpfc_used_cpu = kzalloc((sizeof(uint16_t) * lpfc_present_cpu),
5536 GFP_KERNEL);
5537 if (!lpfc_used_cpu) {
5538 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5539 "3335 Failed allocate memory for msi-x "
5540 "interrupt vector mapping\n");
5541 kfree(phba->sli4_hba.cpu_map);
5542 rc = -ENOMEM;
5543 goto out_free_msix;
5544 }
5545 for (i = 0; i < lpfc_present_cpu; i++)
5546 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
5547 }
5548
5549
5550 cpup = phba->sli4_hba.cpu_map;
5551 rc = 0;
5552 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
5553 cpup->channel_id = rc;
5554 rc++;
5555 if (rc >= phba->cfg_fcp_io_channel)
5556 rc = 0;
5557 }
5558
5559
5560
5561
5562
5563 if (phba->cfg_sriov_nr_virtfn > 0) {
5564 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5565 phba->cfg_sriov_nr_virtfn);
5566 if (rc) {
5567 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5568 "3020 Requested number of SR-IOV "
5569 "virtual functions (%d) is not "
5570 "supported\n",
5571 phba->cfg_sriov_nr_virtfn);
5572 phba->cfg_sriov_nr_virtfn = 0;
5573 }
5574 }
5575
5576 return 0;
5577
5578out_free_msix:
5579 kfree(phba->sli4_hba.msix_entries);
5580out_free_fcp_eq_hdl:
5581 kfree(phba->sli4_hba.fcp_eq_hdl);
5582out_free_fcf_rr_bmask:
5583 kfree(phba->fcf.fcf_rr_bmask);
5584out_remove_rpi_hdrs:
5585 lpfc_sli4_remove_rpi_hdrs(phba);
5586out_free_active_sgl:
5587 lpfc_free_active_sgl(phba);
5588out_destroy_cq_event_pool:
5589 lpfc_sli4_cq_event_pool_destroy(phba);
5590out_free_bsmbx:
5591 lpfc_destroy_bootstrap_mbox(phba);
5592out_free_mem:
5593 lpfc_mem_free(phba);
5594 return rc;
5595}
5596
5597
5598
5599
5600
5601
5602
5603
5604static void
5605lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
5606{
5607 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
5608
5609
5610 kfree(phba->sli4_hba.cpu_map);
5611 phba->sli4_hba.num_present_cpu = 0;
5612 phba->sli4_hba.num_online_cpu = 0;
5613 phba->sli4_hba.curr_disp_cpu = 0;
5614
5615
5616 kfree(phba->sli4_hba.msix_entries);
5617
5618
5619 kfree(phba->sli4_hba.fcp_eq_hdl);
5620
5621
5622 lpfc_sli4_remove_rpi_hdrs(phba);
5623 lpfc_sli4_remove_rpis(phba);
5624
5625
5626 kfree(phba->fcf.fcf_rr_bmask);
5627
5628
5629 lpfc_free_active_sgl(phba);
5630 lpfc_free_els_sgl_list(phba);
5631
5632
5633 lpfc_sli4_cq_event_release_all(phba);
5634 lpfc_sli4_cq_event_pool_destroy(phba);
5635
5636
5637 lpfc_sli4_dealloc_resource_identifiers(phba);
5638
5639
5640 lpfc_destroy_bootstrap_mbox(phba);
5641
5642
5643 lpfc_mem_free_all(phba);
5644
5645
5646 list_for_each_entry_safe(conn_entry, next_conn_entry,
5647 &phba->fcf_conn_rec_list, list) {
5648 list_del_init(&conn_entry->list);
5649 kfree(conn_entry);
5650 }
5651
5652 return;
5653}
5654
5655
5656
5657
5658
5659
5660
5661
5662
5663
5664
5665int
5666lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5667{
5668 phba->lpfc_hba_init_link = lpfc_hba_init_link;
5669 phba->lpfc_hba_down_link = lpfc_hba_down_link;
5670 phba->lpfc_selective_reset = lpfc_selective_reset;
5671 switch (dev_grp) {
5672 case LPFC_PCI_DEV_LP:
5673 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
5674 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
5675 phba->lpfc_stop_port = lpfc_stop_port_s3;
5676 break;
5677 case LPFC_PCI_DEV_OC:
5678 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
5679 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
5680 phba->lpfc_stop_port = lpfc_stop_port_s4;
5681 break;
5682 default:
5683 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5684 "1431 Invalid HBA PCI-device group: 0x%x\n",
5685 dev_grp);
5686 return -ENODEV;
5687 break;
5688 }
5689 return 0;
5690}
5691
5692
5693
5694
5695
5696
5697
5698
5699
5700
5701
5702
5703static int
5704lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
5705{
5706
5707
5708
5709 atomic_set(&phba->fast_event_count, 0);
5710 spin_lock_init(&phba->hbalock);
5711
5712
5713 spin_lock_init(&phba->ndlp_lock);
5714
5715 INIT_LIST_HEAD(&phba->port_list);
5716 INIT_LIST_HEAD(&phba->work_list);
5717 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5718
5719
5720 init_waitqueue_head(&phba->work_waitq);
5721
5722
5723 spin_lock_init(&phba->scsi_buf_list_get_lock);
5724 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5725 spin_lock_init(&phba->scsi_buf_list_put_lock);
5726 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5727
5728
5729 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5730
5731
5732 INIT_LIST_HEAD(&phba->elsbuf);
5733
5734
5735 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5736
5737
5738 spin_lock_init(&phba->devicelock);
5739 INIT_LIST_HEAD(&phba->luns);
5740
5741 return 0;
5742}
5743
5744
5745
5746
5747
5748
5749
5750
5751
5752
5753
5754
5755static int
5756lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
5757{
5758 int error;
5759
5760
5761 phba->worker_thread = kthread_run(lpfc_do_work, phba,
5762 "lpfc_worker_%d", phba->brd_no);
5763 if (IS_ERR(phba->worker_thread)) {
5764 error = PTR_ERR(phba->worker_thread);
5765 return error;
5766 }
5767
5768 return 0;
5769}
5770
5771
5772
5773
5774
5775
5776
5777
5778
5779static void
5780lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
5781{
5782
5783 kthread_stop(phba->worker_thread);
5784}
5785
5786
5787
5788
5789
5790
5791
5792static void
5793lpfc_free_iocb_list(struct lpfc_hba *phba)
5794{
5795 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
5796
5797 spin_lock_irq(&phba->hbalock);
5798 list_for_each_entry_safe(iocbq_entry, iocbq_next,
5799 &phba->lpfc_iocb_list, list) {
5800 list_del(&iocbq_entry->list);
5801 kfree(iocbq_entry);
5802 phba->total_iocbq_bufs--;
5803 }
5804 spin_unlock_irq(&phba->hbalock);
5805
5806 return;
5807}
5808
5809
5810
5811
5812
5813
5814
5815
5816
5817
5818
5819
5820static int
5821lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
5822{
5823 struct lpfc_iocbq *iocbq_entry = NULL;
5824 uint16_t iotag;
5825 int i;
5826
5827
5828 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
5829 for (i = 0; i < iocb_count; i++) {
5830 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
5831 if (iocbq_entry == NULL) {
5832 printk(KERN_ERR "%s: only allocated %d iocbs of "
5833 "expected %d count. Unloading driver.\n",
5834 __func__, i, LPFC_IOCB_LIST_CNT);
5835 goto out_free_iocbq;
5836 }
5837
5838 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
5839 if (iotag == 0) {
5840 kfree(iocbq_entry);
5841 printk(KERN_ERR "%s: failed to allocate IOTAG. "
5842 "Unloading driver.\n", __func__);
5843 goto out_free_iocbq;
5844 }
5845 iocbq_entry->sli4_lxritag = NO_XRI;
5846 iocbq_entry->sli4_xritag = NO_XRI;
5847
5848 spin_lock_irq(&phba->hbalock);
5849 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
5850 phba->total_iocbq_bufs++;
5851 spin_unlock_irq(&phba->hbalock);
5852 }
5853
5854 return 0;
5855
5856out_free_iocbq:
5857 lpfc_free_iocb_list(phba);
5858
5859 return -ENOMEM;
5860}
5861
5862
5863
5864
5865
5866
5867
5868
5869void
5870lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
5871{
5872 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
5873
5874 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
5875 list_del(&sglq_entry->list);
5876 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
5877 kfree(sglq_entry);
5878 }
5879}
5880
5881
5882
5883
5884
5885
5886
5887static void
5888lpfc_free_els_sgl_list(struct lpfc_hba *phba)
5889{
5890 LIST_HEAD(sglq_list);
5891 struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
5892
5893
5894 spin_lock_irq(&phba->hbalock);
5895 spin_lock(&pring->ring_lock);
5896 list_splice_init(&phba->sli4_hba.lpfc_sgl_list, &sglq_list);
5897 spin_unlock(&pring->ring_lock);
5898 spin_unlock_irq(&phba->hbalock);
5899
5900
5901 lpfc_free_sgl_list(phba, &sglq_list);
5902}
5903
5904
5905
5906
5907
5908
5909
5910
5911static int
5912lpfc_init_active_sgl_array(struct lpfc_hba *phba)
5913{
5914 int size;
5915 size = sizeof(struct lpfc_sglq *);
5916 size *= phba->sli4_hba.max_cfg_param.max_xri;
5917
5918 phba->sli4_hba.lpfc_sglq_active_list =
5919 kzalloc(size, GFP_KERNEL);
5920 if (!phba->sli4_hba.lpfc_sglq_active_list)
5921 return -ENOMEM;
5922 return 0;
5923}
5924
5925
5926
5927
5928
5929
5930
5931
5932
5933static void
5934lpfc_free_active_sgl(struct lpfc_hba *phba)
5935{
5936 kfree(phba->sli4_hba.lpfc_sglq_active_list);
5937}
5938
5939
5940
5941
5942
5943
5944
5945
5946
5947static void
5948lpfc_init_sgl_list(struct lpfc_hba *phba)
5949{
5950
5951 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_sgl_list);
5952 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
5953
5954
5955 phba->sli4_hba.els_xri_cnt = 0;
5956
5957
5958 phba->sli4_hba.scsi_xri_cnt = 0;
5959}
5960
5961
5962
5963
5964
5965
5966
5967
5968
5969
5970
5971
5972
5973
5974
5975int
5976lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
5977{
5978 int rc = 0;
5979 struct lpfc_rpi_hdr *rpi_hdr;
5980
5981 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
5982 if (!phba->sli4_hba.rpi_hdrs_in_use)
5983 return rc;
5984 if (phba->sli4_hba.extents_in_use)
5985 return -EIO;
5986
5987 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
5988 if (!rpi_hdr) {
5989 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
5990 "0391 Error during rpi post operation\n");
5991 lpfc_sli4_remove_rpis(phba);
5992 rc = -ENODEV;
5993 }
5994
5995 return rc;
5996}
5997
5998
5999
6000
6001
6002
6003
6004
6005
6006
6007
6008
6009
6010
6011struct lpfc_rpi_hdr *
6012lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6013{
6014 uint16_t rpi_limit, curr_rpi_range;
6015 struct lpfc_dmabuf *dmabuf;
6016 struct lpfc_rpi_hdr *rpi_hdr;
6017 uint32_t rpi_count;
6018
6019
6020
6021
6022
6023
6024 if (!phba->sli4_hba.rpi_hdrs_in_use)
6025 return NULL;
6026 if (phba->sli4_hba.extents_in_use)
6027 return NULL;
6028
6029
6030 rpi_limit = phba->sli4_hba.max_cfg_param.rpi_base +
6031 phba->sli4_hba.max_cfg_param.max_rpi - 1;
6032
6033 spin_lock_irq(&phba->hbalock);
6034
6035
6036
6037
6038
6039 curr_rpi_range = phba->sli4_hba.next_rpi;
6040 spin_unlock_irq(&phba->hbalock);
6041
6042
6043
6044
6045
6046
6047 if ((curr_rpi_range + (LPFC_RPI_HDR_COUNT - 1)) > rpi_limit)
6048 rpi_count = rpi_limit - curr_rpi_range;
6049 else
6050 rpi_count = LPFC_RPI_HDR_COUNT;
6051
6052 if (!rpi_count)
6053 return NULL;
6054
6055
6056
6057
6058 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6059 if (!dmabuf)
6060 return NULL;
6061
6062 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6063 LPFC_HDR_TEMPLATE_SIZE,
6064 &dmabuf->phys, GFP_KERNEL);
6065 if (!dmabuf->virt) {
6066 rpi_hdr = NULL;
6067 goto err_free_dmabuf;
6068 }
6069
6070 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6071 rpi_hdr = NULL;
6072 goto err_free_coherent;
6073 }
6074
6075
6076 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6077 if (!rpi_hdr)
6078 goto err_free_coherent;
6079
6080 rpi_hdr->dmabuf = dmabuf;
6081 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6082 rpi_hdr->page_count = 1;
6083 spin_lock_irq(&phba->hbalock);
6084
6085
6086 rpi_hdr->start_rpi = curr_rpi_range;
6087 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6088
6089
6090
6091
6092
6093 phba->sli4_hba.next_rpi += rpi_count;
6094 spin_unlock_irq(&phba->hbalock);
6095 return rpi_hdr;
6096
6097 err_free_coherent:
6098 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6099 dmabuf->virt, dmabuf->phys);
6100 err_free_dmabuf:
6101 kfree(dmabuf);
6102 return NULL;
6103}
6104
6105
6106
6107
6108
6109
6110
6111
6112
6113
6114void
6115lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6116{
6117 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6118
6119 if (!phba->sli4_hba.rpi_hdrs_in_use)
6120 goto exit;
6121
6122 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6123 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6124 list_del(&rpi_hdr->list);
6125 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6126 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6127 kfree(rpi_hdr->dmabuf);
6128 kfree(rpi_hdr);
6129 }
6130 exit:
6131
6132 phba->sli4_hba.next_rpi = 0;
6133}
6134
6135
6136
6137
6138
6139
6140
6141
6142
6143
6144
6145
6146
6147static struct lpfc_hba *
6148lpfc_hba_alloc(struct pci_dev *pdev)
6149{
6150 struct lpfc_hba *phba;
6151
6152
6153 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6154 if (!phba) {
6155 dev_err(&pdev->dev, "failed to allocate hba struct\n");
6156 return NULL;
6157 }
6158
6159
6160 phba->pcidev = pdev;
6161
6162
6163 phba->brd_no = lpfc_get_instance();
6164 if (phba->brd_no < 0) {
6165 kfree(phba);
6166 return NULL;
6167 }
6168 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
6169
6170 spin_lock_init(&phba->ct_ev_lock);
6171 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6172
6173 return phba;
6174}
6175
6176
6177
6178
6179
6180
6181
6182
6183static void
6184lpfc_hba_free(struct lpfc_hba *phba)
6185{
6186
6187 idr_remove(&lpfc_hba_index, phba->brd_no);
6188
6189
6190 kfree(phba->sli.ring);
6191 phba->sli.ring = NULL;
6192
6193 kfree(phba);
6194 return;
6195}
6196
6197
6198
6199
6200
6201
6202
6203
6204
6205
6206
6207
6208static int
6209lpfc_create_shost(struct lpfc_hba *phba)
6210{
6211 struct lpfc_vport *vport;
6212 struct Scsi_Host *shost;
6213
6214
6215 phba->fc_edtov = FF_DEF_EDTOV;
6216 phba->fc_ratov = FF_DEF_RATOV;
6217 phba->fc_altov = FF_DEF_ALTOV;
6218 phba->fc_arbtov = FF_DEF_ARBTOV;
6219
6220 atomic_set(&phba->sdev_cnt, 0);
6221 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6222 if (!vport)
6223 return -ENODEV;
6224
6225 shost = lpfc_shost_from_vport(vport);
6226 phba->pport = vport;
6227 lpfc_debugfs_initialize(vport);
6228
6229 pci_set_drvdata(phba->pcidev, shost);
6230
6231
6232
6233
6234
6235 vport->load_flag |= FC_ALLOW_FDMI;
6236 if (phba->cfg_enable_SmartSAN ||
6237 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
6238
6239
6240 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
6241 if (phba->cfg_enable_SmartSAN)
6242 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6243 else
6244 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6245 }
6246 return 0;
6247}
6248
6249
6250
6251
6252
6253
6254
6255
6256static void
6257lpfc_destroy_shost(struct lpfc_hba *phba)
6258{
6259 struct lpfc_vport *vport = phba->pport;
6260
6261
6262 destroy_port(vport);
6263
6264 return;
6265}
6266
6267
6268
6269
6270
6271
6272
6273
6274
6275static void
6276lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6277{
6278 uint32_t old_mask;
6279 uint32_t old_guard;
6280
6281 int pagecnt = 10;
6282 if (lpfc_prot_mask && lpfc_prot_guard) {
6283 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6284 "1478 Registering BlockGuard with the "
6285 "SCSI layer\n");
6286
6287 old_mask = lpfc_prot_mask;
6288 old_guard = lpfc_prot_guard;
6289
6290
6291 lpfc_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
6292 SHOST_DIX_TYPE0_PROTECTION |
6293 SHOST_DIX_TYPE1_PROTECTION);
6294 lpfc_prot_guard &= (SHOST_DIX_GUARD_IP | SHOST_DIX_GUARD_CRC);
6295
6296
6297 if (lpfc_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6298 lpfc_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
6299
6300 if (lpfc_prot_mask && lpfc_prot_guard) {
6301 if ((old_mask != lpfc_prot_mask) ||
6302 (old_guard != lpfc_prot_guard))
6303 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6304 "1475 Registering BlockGuard with the "
6305 "SCSI layer: mask %d guard %d\n",
6306 lpfc_prot_mask, lpfc_prot_guard);
6307
6308 scsi_host_set_prot(shost, lpfc_prot_mask);
6309 scsi_host_set_guard(shost, lpfc_prot_guard);
6310 } else
6311 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6312 "1479 Not Registering BlockGuard with the SCSI "
6313 "layer, Bad protection parameters: %d %d\n",
6314 old_mask, old_guard);
6315 }
6316
6317 if (!_dump_buf_data) {
6318 while (pagecnt) {
6319 spin_lock_init(&_dump_buf_lock);
6320 _dump_buf_data =
6321 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6322 if (_dump_buf_data) {
6323 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6324 "9043 BLKGRD: allocated %d pages for "
6325 "_dump_buf_data at 0x%p\n",
6326 (1 << pagecnt), _dump_buf_data);
6327 _dump_buf_data_order = pagecnt;
6328 memset(_dump_buf_data, 0,
6329 ((1 << PAGE_SHIFT) << pagecnt));
6330 break;
6331 } else
6332 --pagecnt;
6333 }
6334 if (!_dump_buf_data_order)
6335 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6336 "9044 BLKGRD: ERROR unable to allocate "
6337 "memory for hexdump\n");
6338 } else
6339 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6340 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
6341 "\n", _dump_buf_data);
6342 if (!_dump_buf_dif) {
6343 while (pagecnt) {
6344 _dump_buf_dif =
6345 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6346 if (_dump_buf_dif) {
6347 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6348 "9046 BLKGRD: allocated %d pages for "
6349 "_dump_buf_dif at 0x%p\n",
6350 (1 << pagecnt), _dump_buf_dif);
6351 _dump_buf_dif_order = pagecnt;
6352 memset(_dump_buf_dif, 0,
6353 ((1 << PAGE_SHIFT) << pagecnt));
6354 break;
6355 } else
6356 --pagecnt;
6357 }
6358 if (!_dump_buf_dif_order)
6359 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6360 "9047 BLKGRD: ERROR unable to allocate "
6361 "memory for hexdump\n");
6362 } else
6363 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6364 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
6365 _dump_buf_dif);
6366}
6367
6368
6369
6370
6371
6372
6373
6374
6375static void
6376lpfc_post_init_setup(struct lpfc_hba *phba)
6377{
6378 struct Scsi_Host *shost;
6379 struct lpfc_adapter_event_header adapter_event;
6380
6381
6382 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
6383
6384
6385
6386
6387
6388 shost = pci_get_drvdata(phba->pcidev);
6389 shost->can_queue = phba->cfg_hba_queue_depth - 10;
6390 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
6391 lpfc_setup_bg(phba, shost);
6392
6393 lpfc_host_attrib_init(shost);
6394
6395 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
6396 spin_lock_irq(shost->host_lock);
6397 lpfc_poll_start_timer(phba);
6398 spin_unlock_irq(shost->host_lock);
6399 }
6400
6401 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6402 "0428 Perform SCSI scan\n");
6403
6404 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
6405 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
6406 fc_host_post_vendor_event(shost, fc_get_event_number(),
6407 sizeof(adapter_event),
6408 (char *) &adapter_event,
6409 LPFC_NL_VENDOR_ID);
6410 return;
6411}
6412
6413
6414
6415
6416
6417
6418
6419
6420
6421
6422
6423
6424static int
6425lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
6426{
6427 struct pci_dev *pdev;
6428 unsigned long bar0map_len, bar2map_len;
6429 int i, hbq_count;
6430 void *ptr;
6431 int error = -ENODEV;
6432
6433
6434 if (!phba->pcidev)
6435 return error;
6436 else
6437 pdev = phba->pcidev;
6438
6439
6440 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
6441 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
6442 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
6443 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
6444 return error;
6445 }
6446 }
6447
6448
6449
6450
6451 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6452 bar0map_len = pci_resource_len(pdev, 0);
6453
6454 phba->pci_bar2_map = pci_resource_start(pdev, 2);
6455 bar2map_len = pci_resource_len(pdev, 2);
6456
6457
6458 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
6459 if (!phba->slim_memmap_p) {
6460 dev_printk(KERN_ERR, &pdev->dev,
6461 "ioremap failed for SLIM memory.\n");
6462 goto out;
6463 }
6464
6465
6466 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
6467 if (!phba->ctrl_regs_memmap_p) {
6468 dev_printk(KERN_ERR, &pdev->dev,
6469 "ioremap failed for HBA control registers.\n");
6470 goto out_iounmap_slim;
6471 }
6472
6473
6474 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6475 &phba->slim2p.phys, GFP_KERNEL);
6476 if (!phba->slim2p.virt)
6477 goto out_iounmap;
6478
6479 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
6480 phba->mbox_ext = (phba->slim2p.virt +
6481 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
6482 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
6483 phba->IOCBs = (phba->slim2p.virt +
6484 offsetof(struct lpfc_sli2_slim, IOCBs));
6485
6486 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
6487 lpfc_sli_hbq_size(),
6488 &phba->hbqslimp.phys,
6489 GFP_KERNEL);
6490 if (!phba->hbqslimp.virt)
6491 goto out_free_slim;
6492
6493 hbq_count = lpfc_sli_hbq_count();
6494 ptr = phba->hbqslimp.virt;
6495 for (i = 0; i < hbq_count; ++i) {
6496 phba->hbqs[i].hbq_virt = ptr;
6497 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
6498 ptr += (lpfc_hbq_defs[i]->entry_count *
6499 sizeof(struct lpfc_hbq_entry));
6500 }
6501 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
6502 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
6503
6504 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
6505
6506 INIT_LIST_HEAD(&phba->rb_pend_list);
6507
6508 phba->MBslimaddr = phba->slim_memmap_p;
6509 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
6510 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
6511 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
6512 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
6513
6514 return 0;
6515
6516out_free_slim:
6517 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6518 phba->slim2p.virt, phba->slim2p.phys);
6519out_iounmap:
6520 iounmap(phba->ctrl_regs_memmap_p);
6521out_iounmap_slim:
6522 iounmap(phba->slim_memmap_p);
6523out:
6524 return error;
6525}
6526
6527
6528
6529
6530
6531
6532
6533
6534static void
6535lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
6536{
6537 struct pci_dev *pdev;
6538
6539
6540 if (!phba->pcidev)
6541 return;
6542 else
6543 pdev = phba->pcidev;
6544
6545
6546 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
6547 phba->hbqslimp.virt, phba->hbqslimp.phys);
6548 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6549 phba->slim2p.virt, phba->slim2p.phys);
6550
6551
6552 iounmap(phba->ctrl_regs_memmap_p);
6553 iounmap(phba->slim_memmap_p);
6554
6555 return;
6556}
6557
6558
6559
6560
6561
6562
6563
6564
6565
6566
6567int
6568lpfc_sli4_post_status_check(struct lpfc_hba *phba)
6569{
6570 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
6571 struct lpfc_register reg_data;
6572 int i, port_error = 0;
6573 uint32_t if_type;
6574
6575 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
6576 memset(®_data, 0, sizeof(reg_data));
6577 if (!phba->sli4_hba.PSMPHRregaddr)
6578 return -ENODEV;
6579
6580
6581 for (i = 0; i < 3000; i++) {
6582 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
6583 &portsmphr_reg.word0) ||
6584 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
6585
6586 port_error = -ENODEV;
6587 break;
6588 }
6589 if (LPFC_POST_STAGE_PORT_READY ==
6590 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
6591 break;
6592 msleep(10);
6593 }
6594
6595
6596
6597
6598
6599 if (port_error) {
6600 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6601 "1408 Port Failed POST - portsmphr=0x%x, "
6602 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
6603 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
6604 portsmphr_reg.word0,
6605 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
6606 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
6607 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
6608 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
6609 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
6610 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
6611 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
6612 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
6613 } else {
6614 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6615 "2534 Device Info: SLIFamily=0x%x, "
6616 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
6617 "SLIHint_2=0x%x, FT=0x%x\n",
6618 bf_get(lpfc_sli_intf_sli_family,
6619 &phba->sli4_hba.sli_intf),
6620 bf_get(lpfc_sli_intf_slirev,
6621 &phba->sli4_hba.sli_intf),
6622 bf_get(lpfc_sli_intf_if_type,
6623 &phba->sli4_hba.sli_intf),
6624 bf_get(lpfc_sli_intf_sli_hint1,
6625 &phba->sli4_hba.sli_intf),
6626 bf_get(lpfc_sli_intf_sli_hint2,
6627 &phba->sli4_hba.sli_intf),
6628 bf_get(lpfc_sli_intf_func_type,
6629 &phba->sli4_hba.sli_intf));
6630
6631
6632
6633
6634
6635 if_type = bf_get(lpfc_sli_intf_if_type,
6636 &phba->sli4_hba.sli_intf);
6637 switch (if_type) {
6638 case LPFC_SLI_INTF_IF_TYPE_0:
6639 phba->sli4_hba.ue_mask_lo =
6640 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
6641 phba->sli4_hba.ue_mask_hi =
6642 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
6643 uerrlo_reg.word0 =
6644 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
6645 uerrhi_reg.word0 =
6646 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
6647 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
6648 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
6649 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6650 "1422 Unrecoverable Error "
6651 "Detected during POST "
6652 "uerr_lo_reg=0x%x, "
6653 "uerr_hi_reg=0x%x, "
6654 "ue_mask_lo_reg=0x%x, "
6655 "ue_mask_hi_reg=0x%x\n",
6656 uerrlo_reg.word0,
6657 uerrhi_reg.word0,
6658 phba->sli4_hba.ue_mask_lo,
6659 phba->sli4_hba.ue_mask_hi);
6660 port_error = -ENODEV;
6661 }
6662 break;
6663 case LPFC_SLI_INTF_IF_TYPE_2:
6664
6665 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
6666 ®_data.word0) ||
6667 (bf_get(lpfc_sliport_status_err, ®_data) &&
6668 !bf_get(lpfc_sliport_status_rn, ®_data))) {
6669 phba->work_status[0] =
6670 readl(phba->sli4_hba.u.if_type2.
6671 ERR1regaddr);
6672 phba->work_status[1] =
6673 readl(phba->sli4_hba.u.if_type2.
6674 ERR2regaddr);
6675 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6676 "2888 Unrecoverable port error "
6677 "following POST: port status reg "
6678 "0x%x, port_smphr reg 0x%x, "
6679 "error 1=0x%x, error 2=0x%x\n",
6680 reg_data.word0,
6681 portsmphr_reg.word0,
6682 phba->work_status[0],
6683 phba->work_status[1]);
6684 port_error = -ENODEV;
6685 }
6686 break;
6687 case LPFC_SLI_INTF_IF_TYPE_1:
6688 default:
6689 break;
6690 }
6691 }
6692 return port_error;
6693}
6694
6695
6696
6697
6698
6699
6700
6701
6702
6703static void
6704lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
6705{
6706 switch (if_type) {
6707 case LPFC_SLI_INTF_IF_TYPE_0:
6708 phba->sli4_hba.u.if_type0.UERRLOregaddr =
6709 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
6710 phba->sli4_hba.u.if_type0.UERRHIregaddr =
6711 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
6712 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
6713 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
6714 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
6715 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
6716 phba->sli4_hba.SLIINTFregaddr =
6717 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
6718 break;
6719 case LPFC_SLI_INTF_IF_TYPE_2:
6720 phba->sli4_hba.u.if_type2.ERR1regaddr =
6721 phba->sli4_hba.conf_regs_memmap_p +
6722 LPFC_CTL_PORT_ER1_OFFSET;
6723 phba->sli4_hba.u.if_type2.ERR2regaddr =
6724 phba->sli4_hba.conf_regs_memmap_p +
6725 LPFC_CTL_PORT_ER2_OFFSET;
6726 phba->sli4_hba.u.if_type2.CTRLregaddr =
6727 phba->sli4_hba.conf_regs_memmap_p +
6728 LPFC_CTL_PORT_CTL_OFFSET;
6729 phba->sli4_hba.u.if_type2.STATUSregaddr =
6730 phba->sli4_hba.conf_regs_memmap_p +
6731 LPFC_CTL_PORT_STA_OFFSET;
6732 phba->sli4_hba.SLIINTFregaddr =
6733 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
6734 phba->sli4_hba.PSMPHRregaddr =
6735 phba->sli4_hba.conf_regs_memmap_p +
6736 LPFC_CTL_PORT_SEM_OFFSET;
6737 phba->sli4_hba.RQDBregaddr =
6738 phba->sli4_hba.conf_regs_memmap_p +
6739 LPFC_ULP0_RQ_DOORBELL;
6740 phba->sli4_hba.WQDBregaddr =
6741 phba->sli4_hba.conf_regs_memmap_p +
6742 LPFC_ULP0_WQ_DOORBELL;
6743 phba->sli4_hba.EQCQDBregaddr =
6744 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
6745 phba->sli4_hba.MQDBregaddr =
6746 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
6747 phba->sli4_hba.BMBXregaddr =
6748 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
6749 break;
6750 case LPFC_SLI_INTF_IF_TYPE_1:
6751 default:
6752 dev_printk(KERN_ERR, &phba->pcidev->dev,
6753 "FATAL - unsupported SLI4 interface type - %d\n",
6754 if_type);
6755 break;
6756 }
6757}
6758
6759
6760
6761
6762
6763
6764
6765
6766static void
6767lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
6768{
6769 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
6770 LPFC_SLIPORT_IF0_SMPHR;
6771 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
6772 LPFC_HST_ISR0;
6773 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
6774 LPFC_HST_IMR0;
6775 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
6776 LPFC_HST_ISCR0;
6777}
6778
6779
6780
6781
6782
6783
6784
6785
6786
6787
6788
6789static int
6790lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
6791{
6792 if (vf > LPFC_VIR_FUNC_MAX)
6793 return -ENODEV;
6794
6795 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
6796 vf * LPFC_VFR_PAGE_SIZE +
6797 LPFC_ULP0_RQ_DOORBELL);
6798 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
6799 vf * LPFC_VFR_PAGE_SIZE +
6800 LPFC_ULP0_WQ_DOORBELL);
6801 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
6802 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
6803 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
6804 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
6805 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
6806 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
6807 return 0;
6808}
6809
6810
6811
6812
6813
6814
6815
6816
6817
6818
6819
6820
6821
6822
6823
6824
6825static int
6826lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
6827{
6828 uint32_t bmbx_size;
6829 struct lpfc_dmabuf *dmabuf;
6830 struct dma_address *dma_address;
6831 uint32_t pa_addr;
6832 uint64_t phys_addr;
6833
6834 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6835 if (!dmabuf)
6836 return -ENOMEM;
6837
6838
6839
6840
6841
6842 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
6843 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
6844 &dmabuf->phys, GFP_KERNEL);
6845 if (!dmabuf->virt) {
6846 kfree(dmabuf);
6847 return -ENOMEM;
6848 }
6849
6850
6851
6852
6853
6854
6855
6856
6857 phba->sli4_hba.bmbx.dmabuf = dmabuf;
6858 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
6859
6860 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
6861 LPFC_ALIGN_16_BYTE);
6862 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
6863 LPFC_ALIGN_16_BYTE);
6864
6865
6866
6867
6868
6869
6870
6871
6872
6873 dma_address = &phba->sli4_hba.bmbx.dma_address;
6874 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
6875 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
6876 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
6877 LPFC_BMBX_BIT1_ADDR_HI);
6878
6879 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
6880 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
6881 LPFC_BMBX_BIT1_ADDR_LO);
6882 return 0;
6883}
6884
6885
6886
6887
6888
6889
6890
6891
6892
6893
6894
6895
6896static void
6897lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
6898{
6899 dma_free_coherent(&phba->pcidev->dev,
6900 phba->sli4_hba.bmbx.bmbx_size,
6901 phba->sli4_hba.bmbx.dmabuf->virt,
6902 phba->sli4_hba.bmbx.dmabuf->phys);
6903
6904 kfree(phba->sli4_hba.bmbx.dmabuf);
6905 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
6906}
6907
6908
6909
6910
6911
6912
6913
6914
6915
6916
6917
6918
6919
6920
6921
6922int
6923lpfc_sli4_read_config(struct lpfc_hba *phba)
6924{
6925 LPFC_MBOXQ_t *pmb;
6926 struct lpfc_mbx_read_config *rd_config;
6927 union lpfc_sli4_cfg_shdr *shdr;
6928 uint32_t shdr_status, shdr_add_status;
6929 struct lpfc_mbx_get_func_cfg *get_func_cfg;
6930 struct lpfc_rsrc_desc_fcfcoe *desc;
6931 char *pdesc_0;
6932 int length, i, rc = 0, rc2;
6933
6934 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6935 if (!pmb) {
6936 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6937 "2011 Unable to allocate memory for issuing "
6938 "SLI_CONFIG_SPECIAL mailbox command\n");
6939 return -ENOMEM;
6940 }
6941
6942 lpfc_read_config(phba, pmb);
6943
6944 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
6945 if (rc != MBX_SUCCESS) {
6946 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6947 "2012 Mailbox failed , mbxCmd x%x "
6948 "READ_CONFIG, mbxStatus x%x\n",
6949 bf_get(lpfc_mqe_command, &pmb->u.mqe),
6950 bf_get(lpfc_mqe_status, &pmb->u.mqe));
6951 rc = -EIO;
6952 } else {
6953 rd_config = &pmb->u.mqe.un.rd_config;
6954 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
6955 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
6956 phba->sli4_hba.lnk_info.lnk_tp =
6957 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
6958 phba->sli4_hba.lnk_info.lnk_no =
6959 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
6960 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6961 "3081 lnk_type:%d, lnk_numb:%d\n",
6962 phba->sli4_hba.lnk_info.lnk_tp,
6963 phba->sli4_hba.lnk_info.lnk_no);
6964 } else
6965 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6966 "3082 Mailbox (x%x) returned ldv:x0\n",
6967 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6968 phba->sli4_hba.extents_in_use =
6969 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
6970 phba->sli4_hba.max_cfg_param.max_xri =
6971 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
6972 phba->sli4_hba.max_cfg_param.xri_base =
6973 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
6974 phba->sli4_hba.max_cfg_param.max_vpi =
6975 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
6976 phba->sli4_hba.max_cfg_param.vpi_base =
6977 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
6978 phba->sli4_hba.max_cfg_param.max_rpi =
6979 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
6980 phba->sli4_hba.max_cfg_param.rpi_base =
6981 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
6982 phba->sli4_hba.max_cfg_param.max_vfi =
6983 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
6984 phba->sli4_hba.max_cfg_param.vfi_base =
6985 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
6986 phba->sli4_hba.max_cfg_param.max_fcfi =
6987 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
6988 phba->sli4_hba.max_cfg_param.max_eq =
6989 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
6990 phba->sli4_hba.max_cfg_param.max_rq =
6991 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
6992 phba->sli4_hba.max_cfg_param.max_wq =
6993 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
6994 phba->sli4_hba.max_cfg_param.max_cq =
6995 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
6996 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
6997 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
6998 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
6999 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
7000 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7001 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
7002 phba->max_vports = phba->max_vpi;
7003 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7004 "2003 cfg params Extents? %d "
7005 "XRI(B:%d M:%d), "
7006 "VPI(B:%d M:%d) "
7007 "VFI(B:%d M:%d) "
7008 "RPI(B:%d M:%d) "
7009 "FCFI(Count:%d)\n",
7010 phba->sli4_hba.extents_in_use,
7011 phba->sli4_hba.max_cfg_param.xri_base,
7012 phba->sli4_hba.max_cfg_param.max_xri,
7013 phba->sli4_hba.max_cfg_param.vpi_base,
7014 phba->sli4_hba.max_cfg_param.max_vpi,
7015 phba->sli4_hba.max_cfg_param.vfi_base,
7016 phba->sli4_hba.max_cfg_param.max_vfi,
7017 phba->sli4_hba.max_cfg_param.rpi_base,
7018 phba->sli4_hba.max_cfg_param.max_rpi,
7019 phba->sli4_hba.max_cfg_param.max_fcfi);
7020 }
7021
7022 if (rc)
7023 goto read_cfg_out;
7024
7025
7026 length = phba->sli4_hba.max_cfg_param.max_xri -
7027 lpfc_sli4_get_els_iocb_cnt(phba);
7028 if (phba->cfg_hba_queue_depth > length) {
7029 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7030 "3361 HBA queue depth changed from %d to %d\n",
7031 phba->cfg_hba_queue_depth, length);
7032 phba->cfg_hba_queue_depth = length;
7033 }
7034
7035 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7036 LPFC_SLI_INTF_IF_TYPE_2)
7037 goto read_cfg_out;
7038
7039
7040 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7041 sizeof(struct lpfc_sli4_cfg_mhdr));
7042 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7043 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7044 length, LPFC_SLI4_MBX_EMBED);
7045
7046 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7047 shdr = (union lpfc_sli4_cfg_shdr *)
7048 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7049 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7050 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
7051 if (rc2 || shdr_status || shdr_add_status) {
7052 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7053 "3026 Mailbox failed , mbxCmd x%x "
7054 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7055 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7056 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7057 goto read_cfg_out;
7058 }
7059
7060
7061 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
7062
7063 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7064 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7065 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7066 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7067 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7068 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7069 goto read_cfg_out;
7070
7071 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
7072 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
7073 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
7074 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
7075 phba->sli4_hba.iov.pf_number =
7076 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7077 phba->sli4_hba.iov.vf_number =
7078 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7079 break;
7080 }
7081 }
7082
7083 if (i < LPFC_RSRC_DESC_MAX_NUM)
7084 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7085 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7086 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7087 phba->sli4_hba.iov.vf_number);
7088 else
7089 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7090 "3028 GET_FUNCTION_CONFIG: failed to find "
7091 "Resrouce Descriptor:x%x\n",
7092 LPFC_RSRC_DESC_TYPE_FCFCOE);
7093
7094read_cfg_out:
7095 mempool_free(pmb, phba->mbox_mem_pool);
7096 return rc;
7097}
7098
7099
7100
7101
7102
7103
7104
7105
7106
7107
7108
7109
7110
7111
7112static int
7113lpfc_setup_endian_order(struct lpfc_hba *phba)
7114{
7115 LPFC_MBOXQ_t *mboxq;
7116 uint32_t if_type, rc = 0;
7117 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7118 HOST_ENDIAN_HIGH_WORD1};
7119
7120 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7121 switch (if_type) {
7122 case LPFC_SLI_INTF_IF_TYPE_0:
7123 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7124 GFP_KERNEL);
7125 if (!mboxq) {
7126 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7127 "0492 Unable to allocate memory for "
7128 "issuing SLI_CONFIG_SPECIAL mailbox "
7129 "command\n");
7130 return -ENOMEM;
7131 }
7132
7133
7134
7135
7136
7137 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7138 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7139 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7140 if (rc != MBX_SUCCESS) {
7141 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7142 "0493 SLI_CONFIG_SPECIAL mailbox "
7143 "failed with status x%x\n",
7144 rc);
7145 rc = -EIO;
7146 }
7147 mempool_free(mboxq, phba->mbox_mem_pool);
7148 break;
7149 case LPFC_SLI_INTF_IF_TYPE_2:
7150 case LPFC_SLI_INTF_IF_TYPE_1:
7151 default:
7152 break;
7153 }
7154 return rc;
7155}
7156
7157
7158
7159
7160
7161
7162
7163
7164
7165
7166
7167
7168
7169
7170static int
7171lpfc_sli4_queue_verify(struct lpfc_hba *phba)
7172{
7173 int cfg_fcp_io_channel;
7174 uint32_t cpu;
7175 uint32_t i = 0;
7176 int fof_vectors = phba->cfg_fof ? 1 : 0;
7177
7178
7179
7180
7181
7182
7183
7184 cfg_fcp_io_channel = phba->cfg_fcp_io_channel;
7185
7186
7187 for_each_present_cpu(cpu) {
7188 if (cpu_online(cpu))
7189 i++;
7190 }
7191 phba->sli4_hba.num_online_cpu = i;
7192 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
7193 phba->sli4_hba.curr_disp_cpu = 0;
7194
7195 if (i < cfg_fcp_io_channel) {
7196 lpfc_printf_log(phba,
7197 KERN_ERR, LOG_INIT,
7198 "3188 Reducing IO channels to match number of "
7199 "online CPUs: from %d to %d\n",
7200 cfg_fcp_io_channel, i);
7201 cfg_fcp_io_channel = i;
7202 }
7203
7204 if (cfg_fcp_io_channel + fof_vectors >
7205 phba->sli4_hba.max_cfg_param.max_eq) {
7206 if (phba->sli4_hba.max_cfg_param.max_eq <
7207 LPFC_FCP_IO_CHAN_MIN) {
7208 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7209 "2574 Not enough EQs (%d) from the "
7210 "pci function for supporting FCP "
7211 "EQs (%d)\n",
7212 phba->sli4_hba.max_cfg_param.max_eq,
7213 phba->cfg_fcp_io_channel);
7214 goto out_error;
7215 }
7216 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7217 "2575 Reducing IO channels to match number of "
7218 "available EQs: from %d to %d\n",
7219 cfg_fcp_io_channel,
7220 phba->sli4_hba.max_cfg_param.max_eq);
7221 cfg_fcp_io_channel = phba->sli4_hba.max_cfg_param.max_eq -
7222 fof_vectors;
7223 }
7224
7225
7226 phba->cfg_fcp_io_channel = cfg_fcp_io_channel;
7227
7228
7229 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7230 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
7231
7232
7233 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7234 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
7235
7236 return 0;
7237out_error:
7238 return -ENOMEM;
7239}
7240
7241
7242
7243
7244
7245
7246
7247
7248
7249
7250
7251
7252
7253
7254
7255int
7256lpfc_sli4_queue_create(struct lpfc_hba *phba)
7257{
7258 struct lpfc_queue *qdesc;
7259 int idx;
7260
7261
7262
7263
7264 if (!phba->cfg_fcp_io_channel)
7265 return -ERANGE;
7266
7267 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
7268 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
7269 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
7270 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
7271 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
7272 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
7273
7274 phba->sli4_hba.hba_eq = kzalloc((sizeof(struct lpfc_queue *) *
7275 phba->cfg_fcp_io_channel), GFP_KERNEL);
7276 if (!phba->sli4_hba.hba_eq) {
7277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7278 "2576 Failed allocate memory for "
7279 "fast-path EQ record array\n");
7280 goto out_error;
7281 }
7282
7283 phba->sli4_hba.fcp_cq = kzalloc((sizeof(struct lpfc_queue *) *
7284 phba->cfg_fcp_io_channel), GFP_KERNEL);
7285 if (!phba->sli4_hba.fcp_cq) {
7286 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7287 "2577 Failed allocate memory for fast-path "
7288 "CQ record array\n");
7289 goto out_error;
7290 }
7291
7292 phba->sli4_hba.fcp_wq = kzalloc((sizeof(struct lpfc_queue *) *
7293 phba->cfg_fcp_io_channel), GFP_KERNEL);
7294 if (!phba->sli4_hba.fcp_wq) {
7295 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7296 "2578 Failed allocate memory for fast-path "
7297 "WQ record array\n");
7298 goto out_error;
7299 }
7300
7301
7302
7303
7304
7305
7306 phba->sli4_hba.fcp_cq_map = kzalloc((sizeof(uint16_t) *
7307 phba->cfg_fcp_io_channel), GFP_KERNEL);
7308 if (!phba->sli4_hba.fcp_cq_map) {
7309 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7310 "2545 Failed allocate memory for fast-path "
7311 "CQ map\n");
7312 goto out_error;
7313 }
7314
7315
7316
7317
7318
7319 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) {
7320
7321
7322 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
7323 phba->sli4_hba.eq_ecount);
7324 if (!qdesc) {
7325 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7326 "0497 Failed allocate EQ (%d)\n", idx);
7327 goto out_error;
7328 }
7329 phba->sli4_hba.hba_eq[idx] = qdesc;
7330
7331
7332 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7333 phba->sli4_hba.cq_ecount);
7334 if (!qdesc) {
7335 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7336 "0499 Failed allocate fast-path FCP "
7337 "CQ (%d)\n", idx);
7338 goto out_error;
7339 }
7340 phba->sli4_hba.fcp_cq[idx] = qdesc;
7341
7342
7343 if (phba->fcp_embed_io) {
7344 qdesc = lpfc_sli4_queue_alloc(phba,
7345 LPFC_WQE128_SIZE,
7346 LPFC_WQE128_DEF_COUNT);
7347 } else {
7348 qdesc = lpfc_sli4_queue_alloc(phba,
7349 phba->sli4_hba.wq_esize,
7350 phba->sli4_hba.wq_ecount);
7351 }
7352 if (!qdesc) {
7353 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7354 "0503 Failed allocate fast-path FCP "
7355 "WQ (%d)\n", idx);
7356 goto out_error;
7357 }
7358 phba->sli4_hba.fcp_wq[idx] = qdesc;
7359 }
7360
7361
7362
7363
7364
7365
7366
7367 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7368 phba->sli4_hba.cq_ecount);
7369 if (!qdesc) {
7370 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7371 "0500 Failed allocate slow-path mailbox CQ\n");
7372 goto out_error;
7373 }
7374 phba->sli4_hba.mbx_cq = qdesc;
7375
7376
7377 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7378 phba->sli4_hba.cq_ecount);
7379 if (!qdesc) {
7380 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7381 "0501 Failed allocate slow-path ELS CQ\n");
7382 goto out_error;
7383 }
7384 phba->sli4_hba.els_cq = qdesc;
7385
7386
7387
7388
7389
7390
7391
7392
7393 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
7394 phba->sli4_hba.mq_ecount);
7395 if (!qdesc) {
7396 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7397 "0505 Failed allocate slow-path MQ\n");
7398 goto out_error;
7399 }
7400 phba->sli4_hba.mbx_wq = qdesc;
7401
7402
7403
7404
7405
7406
7407 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
7408 phba->sli4_hba.wq_ecount);
7409 if (!qdesc) {
7410 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7411 "0504 Failed allocate slow-path ELS WQ\n");
7412 goto out_error;
7413 }
7414 phba->sli4_hba.els_wq = qdesc;
7415
7416
7417
7418
7419
7420
7421 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
7422 phba->sli4_hba.rq_ecount);
7423 if (!qdesc) {
7424 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7425 "0506 Failed allocate receive HRQ\n");
7426 goto out_error;
7427 }
7428 phba->sli4_hba.hdr_rq = qdesc;
7429
7430
7431 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
7432 phba->sli4_hba.rq_ecount);
7433 if (!qdesc) {
7434 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7435 "0507 Failed allocate receive DRQ\n");
7436 goto out_error;
7437 }
7438 phba->sli4_hba.dat_rq = qdesc;
7439
7440
7441 if (phba->cfg_fof)
7442 lpfc_fof_queue_create(phba);
7443 return 0;
7444
7445out_error:
7446 lpfc_sli4_queue_destroy(phba);
7447 return -ENOMEM;
7448}
7449
7450
7451
7452
7453
7454
7455
7456
7457
7458
7459
7460
7461
7462void
7463lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
7464{
7465 int idx;
7466
7467 if (phba->cfg_fof)
7468 lpfc_fof_queue_destroy(phba);
7469
7470 if (phba->sli4_hba.hba_eq != NULL) {
7471
7472 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) {
7473 if (phba->sli4_hba.hba_eq[idx] != NULL) {
7474 lpfc_sli4_queue_free(
7475 phba->sli4_hba.hba_eq[idx]);
7476 phba->sli4_hba.hba_eq[idx] = NULL;
7477 }
7478 }
7479 kfree(phba->sli4_hba.hba_eq);
7480 phba->sli4_hba.hba_eq = NULL;
7481 }
7482
7483 if (phba->sli4_hba.fcp_cq != NULL) {
7484
7485 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) {
7486 if (phba->sli4_hba.fcp_cq[idx] != NULL) {
7487 lpfc_sli4_queue_free(
7488 phba->sli4_hba.fcp_cq[idx]);
7489 phba->sli4_hba.fcp_cq[idx] = NULL;
7490 }
7491 }
7492 kfree(phba->sli4_hba.fcp_cq);
7493 phba->sli4_hba.fcp_cq = NULL;
7494 }
7495
7496 if (phba->sli4_hba.fcp_wq != NULL) {
7497
7498 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) {
7499 if (phba->sli4_hba.fcp_wq[idx] != NULL) {
7500 lpfc_sli4_queue_free(
7501 phba->sli4_hba.fcp_wq[idx]);
7502 phba->sli4_hba.fcp_wq[idx] = NULL;
7503 }
7504 }
7505 kfree(phba->sli4_hba.fcp_wq);
7506 phba->sli4_hba.fcp_wq = NULL;
7507 }
7508
7509
7510 if (phba->sli4_hba.fcp_cq_map != NULL) {
7511 kfree(phba->sli4_hba.fcp_cq_map);
7512 phba->sli4_hba.fcp_cq_map = NULL;
7513 }
7514
7515
7516 if (phba->sli4_hba.mbx_wq != NULL) {
7517 lpfc_sli4_queue_free(phba->sli4_hba.mbx_wq);
7518 phba->sli4_hba.mbx_wq = NULL;
7519 }
7520
7521
7522 if (phba->sli4_hba.els_wq != NULL) {
7523 lpfc_sli4_queue_free(phba->sli4_hba.els_wq);
7524 phba->sli4_hba.els_wq = NULL;
7525 }
7526
7527
7528 if (phba->sli4_hba.hdr_rq != NULL) {
7529 lpfc_sli4_queue_free(phba->sli4_hba.hdr_rq);
7530 phba->sli4_hba.hdr_rq = NULL;
7531 }
7532 if (phba->sli4_hba.dat_rq != NULL) {
7533 lpfc_sli4_queue_free(phba->sli4_hba.dat_rq);
7534 phba->sli4_hba.dat_rq = NULL;
7535 }
7536
7537
7538 if (phba->sli4_hba.els_cq != NULL) {
7539 lpfc_sli4_queue_free(phba->sli4_hba.els_cq);
7540 phba->sli4_hba.els_cq = NULL;
7541 }
7542
7543
7544 if (phba->sli4_hba.mbx_cq != NULL) {
7545 lpfc_sli4_queue_free(phba->sli4_hba.mbx_cq);
7546 phba->sli4_hba.mbx_cq = NULL;
7547 }
7548
7549 return;
7550}
7551
7552
7553
7554
7555
7556
7557
7558
7559
7560
7561
7562
7563
7564int
7565lpfc_sli4_queue_setup(struct lpfc_hba *phba)
7566{
7567 struct lpfc_sli *psli = &phba->sli;
7568 struct lpfc_sli_ring *pring;
7569 int rc = -ENOMEM;
7570 int fcp_eqidx, fcp_cqidx, fcp_wqidx;
7571 int fcp_cq_index = 0;
7572 uint32_t shdr_status, shdr_add_status;
7573 union lpfc_sli4_cfg_shdr *shdr;
7574 LPFC_MBOXQ_t *mboxq;
7575 uint32_t length;
7576
7577
7578 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7579 if (!mboxq) {
7580 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7581 "3249 Unable to allocate memory for "
7582 "QUERY_FW_CFG mailbox command\n");
7583 return -ENOMEM;
7584 }
7585 length = (sizeof(struct lpfc_mbx_query_fw_config) -
7586 sizeof(struct lpfc_sli4_cfg_mhdr));
7587 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
7588 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
7589 length, LPFC_SLI4_MBX_EMBED);
7590
7591 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7592
7593 shdr = (union lpfc_sli4_cfg_shdr *)
7594 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
7595 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7596 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
7597 if (shdr_status || shdr_add_status || rc) {
7598 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7599 "3250 QUERY_FW_CFG mailbox failed with status "
7600 "x%x add_status x%x, mbx status x%x\n",
7601 shdr_status, shdr_add_status, rc);
7602 if (rc != MBX_TIMEOUT)
7603 mempool_free(mboxq, phba->mbox_mem_pool);
7604 rc = -ENXIO;
7605 goto out_error;
7606 }
7607
7608 phba->sli4_hba.fw_func_mode =
7609 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
7610 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
7611 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
7612 phba->sli4_hba.physical_port =
7613 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
7614 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7615 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
7616 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
7617 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
7618
7619 if (rc != MBX_TIMEOUT)
7620 mempool_free(mboxq, phba->mbox_mem_pool);
7621
7622
7623
7624
7625
7626
7627 if (phba->cfg_fcp_io_channel && !phba->sli4_hba.hba_eq) {
7628 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7629 "3147 Fast-path EQs not allocated\n");
7630 rc = -ENOMEM;
7631 goto out_error;
7632 }
7633 for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_io_channel; fcp_eqidx++) {
7634 if (!phba->sli4_hba.hba_eq[fcp_eqidx]) {
7635 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7636 "0522 Fast-path EQ (%d) not "
7637 "allocated\n", fcp_eqidx);
7638 rc = -ENOMEM;
7639 goto out_destroy_hba_eq;
7640 }
7641 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[fcp_eqidx],
7642 (phba->cfg_fcp_imax / phba->cfg_fcp_io_channel));
7643 if (rc) {
7644 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7645 "0523 Failed setup of fast-path EQ "
7646 "(%d), rc = 0x%x\n", fcp_eqidx,
7647 (uint32_t)rc);
7648 goto out_destroy_hba_eq;
7649 }
7650 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7651 "2584 HBA EQ setup: "
7652 "queue[%d]-id=%d\n", fcp_eqidx,
7653 phba->sli4_hba.hba_eq[fcp_eqidx]->queue_id);
7654 }
7655
7656
7657 if (!phba->sli4_hba.fcp_cq) {
7658 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7659 "3148 Fast-path FCP CQ array not "
7660 "allocated\n");
7661 rc = -ENOMEM;
7662 goto out_destroy_hba_eq;
7663 }
7664
7665 for (fcp_cqidx = 0; fcp_cqidx < phba->cfg_fcp_io_channel; fcp_cqidx++) {
7666 if (!phba->sli4_hba.fcp_cq[fcp_cqidx]) {
7667 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7668 "0526 Fast-path FCP CQ (%d) not "
7669 "allocated\n", fcp_cqidx);
7670 rc = -ENOMEM;
7671 goto out_destroy_fcp_cq;
7672 }
7673 rc = lpfc_cq_create(phba, phba->sli4_hba.fcp_cq[fcp_cqidx],
7674 phba->sli4_hba.hba_eq[fcp_cqidx], LPFC_WCQ, LPFC_FCP);
7675 if (rc) {
7676 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7677 "0527 Failed setup of fast-path FCP "
7678 "CQ (%d), rc = 0x%x\n", fcp_cqidx,
7679 (uint32_t)rc);
7680 goto out_destroy_fcp_cq;
7681 }
7682
7683
7684 phba->sli4_hba.fcp_cq_map[fcp_cqidx] =
7685 phba->sli4_hba.fcp_cq[fcp_cqidx]->queue_id;
7686
7687 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7688 "2588 FCP CQ setup: cq[%d]-id=%d, "
7689 "parent seq[%d]-id=%d\n",
7690 fcp_cqidx,
7691 phba->sli4_hba.fcp_cq[fcp_cqidx]->queue_id,
7692 fcp_cqidx,
7693 phba->sli4_hba.hba_eq[fcp_cqidx]->queue_id);
7694 }
7695
7696
7697 if (!phba->sli4_hba.fcp_wq) {
7698 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7699 "3149 Fast-path FCP WQ array not "
7700 "allocated\n");
7701 rc = -ENOMEM;
7702 goto out_destroy_fcp_cq;
7703 }
7704
7705 for (fcp_wqidx = 0; fcp_wqidx < phba->cfg_fcp_io_channel; fcp_wqidx++) {
7706 if (!phba->sli4_hba.fcp_wq[fcp_wqidx]) {
7707 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7708 "0534 Fast-path FCP WQ (%d) not "
7709 "allocated\n", fcp_wqidx);
7710 rc = -ENOMEM;
7711 goto out_destroy_fcp_wq;
7712 }
7713 rc = lpfc_wq_create(phba, phba->sli4_hba.fcp_wq[fcp_wqidx],
7714 phba->sli4_hba.fcp_cq[fcp_wqidx],
7715 LPFC_FCP);
7716 if (rc) {
7717 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7718 "0535 Failed setup of fast-path FCP "
7719 "WQ (%d), rc = 0x%x\n", fcp_wqidx,
7720 (uint32_t)rc);
7721 goto out_destroy_fcp_wq;
7722 }
7723
7724
7725 pring = &psli->ring[MAX_SLI3_CONFIGURED_RINGS + fcp_wqidx];
7726 pring->sli.sli4.wqp = (void *)phba->sli4_hba.fcp_wq[fcp_wqidx];
7727 phba->sli4_hba.fcp_cq[fcp_wqidx]->pring = pring;
7728
7729 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7730 "2591 FCP WQ setup: wq[%d]-id=%d, "
7731 "parent cq[%d]-id=%d\n",
7732 fcp_wqidx,
7733 phba->sli4_hba.fcp_wq[fcp_wqidx]->queue_id,
7734 fcp_cq_index,
7735 phba->sli4_hba.fcp_cq[fcp_wqidx]->queue_id);
7736 }
7737
7738
7739
7740
7741
7742 if (!phba->sli4_hba.mbx_cq) {
7743 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7744 "0528 Mailbox CQ not allocated\n");
7745 rc = -ENOMEM;
7746 goto out_destroy_fcp_wq;
7747 }
7748 rc = lpfc_cq_create(phba, phba->sli4_hba.mbx_cq,
7749 phba->sli4_hba.hba_eq[0], LPFC_MCQ, LPFC_MBOX);
7750 if (rc) {
7751 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7752 "0529 Failed setup of slow-path mailbox CQ: "
7753 "rc = 0x%x\n", (uint32_t)rc);
7754 goto out_destroy_fcp_wq;
7755 }
7756 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7757 "2585 MBX CQ setup: cq-id=%d, parent eq-id=%d\n",
7758 phba->sli4_hba.mbx_cq->queue_id,
7759 phba->sli4_hba.hba_eq[0]->queue_id);
7760
7761
7762 if (!phba->sli4_hba.els_cq) {
7763 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7764 "0530 ELS CQ not allocated\n");
7765 rc = -ENOMEM;
7766 goto out_destroy_mbx_cq;
7767 }
7768 rc = lpfc_cq_create(phba, phba->sli4_hba.els_cq,
7769 phba->sli4_hba.hba_eq[0], LPFC_WCQ, LPFC_ELS);
7770 if (rc) {
7771 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7772 "0531 Failed setup of slow-path ELS CQ: "
7773 "rc = 0x%x\n", (uint32_t)rc);
7774 goto out_destroy_mbx_cq;
7775 }
7776 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7777 "2586 ELS CQ setup: cq-id=%d, parent eq-id=%d\n",
7778 phba->sli4_hba.els_cq->queue_id,
7779 phba->sli4_hba.hba_eq[0]->queue_id);
7780
7781
7782
7783
7784
7785
7786 if (!phba->sli4_hba.mbx_wq) {
7787 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7788 "0538 Slow-path MQ not allocated\n");
7789 rc = -ENOMEM;
7790 goto out_destroy_els_cq;
7791 }
7792 rc = lpfc_mq_create(phba, phba->sli4_hba.mbx_wq,
7793 phba->sli4_hba.mbx_cq, LPFC_MBOX);
7794 if (rc) {
7795 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7796 "0539 Failed setup of slow-path MQ: "
7797 "rc = 0x%x\n", rc);
7798 goto out_destroy_els_cq;
7799 }
7800 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7801 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
7802 phba->sli4_hba.mbx_wq->queue_id,
7803 phba->sli4_hba.mbx_cq->queue_id);
7804
7805
7806 if (!phba->sli4_hba.els_wq) {
7807 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7808 "0536 Slow-path ELS WQ not allocated\n");
7809 rc = -ENOMEM;
7810 goto out_destroy_mbx_wq;
7811 }
7812 rc = lpfc_wq_create(phba, phba->sli4_hba.els_wq,
7813 phba->sli4_hba.els_cq, LPFC_ELS);
7814 if (rc) {
7815 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7816 "0537 Failed setup of slow-path ELS WQ: "
7817 "rc = 0x%x\n", (uint32_t)rc);
7818 goto out_destroy_mbx_wq;
7819 }
7820
7821
7822 pring = &psli->ring[LPFC_ELS_RING];
7823 pring->sli.sli4.wqp = (void *)phba->sli4_hba.els_wq;
7824 phba->sli4_hba.els_cq->pring = pring;
7825
7826 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7827 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
7828 phba->sli4_hba.els_wq->queue_id,
7829 phba->sli4_hba.els_cq->queue_id);
7830
7831
7832
7833
7834 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
7835 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7836 "0540 Receive Queue not allocated\n");
7837 rc = -ENOMEM;
7838 goto out_destroy_els_wq;
7839 }
7840
7841 lpfc_rq_adjust_repost(phba, phba->sli4_hba.hdr_rq, LPFC_ELS_HBQ);
7842 lpfc_rq_adjust_repost(phba, phba->sli4_hba.dat_rq, LPFC_ELS_HBQ);
7843
7844 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
7845 phba->sli4_hba.els_cq, LPFC_USOL);
7846 if (rc) {
7847 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7848 "0541 Failed setup of Receive Queue: "
7849 "rc = 0x%x\n", (uint32_t)rc);
7850 goto out_destroy_fcp_wq;
7851 }
7852
7853 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7854 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
7855 "parent cq-id=%d\n",
7856 phba->sli4_hba.hdr_rq->queue_id,
7857 phba->sli4_hba.dat_rq->queue_id,
7858 phba->sli4_hba.els_cq->queue_id);
7859
7860 if (phba->cfg_fof) {
7861 rc = lpfc_fof_queue_setup(phba);
7862 if (rc) {
7863 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7864 "0549 Failed setup of FOF Queues: "
7865 "rc = 0x%x\n", rc);
7866 goto out_destroy_els_rq;
7867 }
7868 }
7869
7870
7871
7872
7873
7874 for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_io_channel;
7875 fcp_eqidx += LPFC_MAX_EQ_DELAY)
7876 lpfc_modify_fcp_eq_delay(phba, fcp_eqidx);
7877 return 0;
7878
7879out_destroy_els_rq:
7880 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq);
7881out_destroy_els_wq:
7882 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
7883out_destroy_mbx_wq:
7884 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
7885out_destroy_els_cq:
7886 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
7887out_destroy_mbx_cq:
7888 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
7889out_destroy_fcp_wq:
7890 for (--fcp_wqidx; fcp_wqidx >= 0; fcp_wqidx--)
7891 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[fcp_wqidx]);
7892out_destroy_fcp_cq:
7893 for (--fcp_cqidx; fcp_cqidx >= 0; fcp_cqidx--)
7894 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[fcp_cqidx]);
7895out_destroy_hba_eq:
7896 for (--fcp_eqidx; fcp_eqidx >= 0; fcp_eqidx--)
7897 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[fcp_eqidx]);
7898out_error:
7899 return rc;
7900}
7901
7902
7903
7904
7905
7906
7907
7908
7909
7910
7911
7912
7913
7914void
7915lpfc_sli4_queue_unset(struct lpfc_hba *phba)
7916{
7917 int fcp_qidx;
7918
7919
7920 if (phba->cfg_fof)
7921 lpfc_fof_queue_destroy(phba);
7922
7923 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
7924
7925 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
7926
7927 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq);
7928
7929 if (phba->sli4_hba.fcp_wq) {
7930 for (fcp_qidx = 0; fcp_qidx < phba->cfg_fcp_io_channel;
7931 fcp_qidx++)
7932 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[fcp_qidx]);
7933 }
7934
7935 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
7936
7937 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
7938
7939 if (phba->sli4_hba.fcp_cq) {
7940 for (fcp_qidx = 0; fcp_qidx < phba->cfg_fcp_io_channel;
7941 fcp_qidx++)
7942 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[fcp_qidx]);
7943 }
7944
7945 if (phba->sli4_hba.hba_eq) {
7946 for (fcp_qidx = 0; fcp_qidx < phba->cfg_fcp_io_channel;
7947 fcp_qidx++)
7948 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[fcp_qidx]);
7949 }
7950}
7951
7952
7953
7954
7955
7956
7957
7958
7959
7960
7961
7962
7963
7964
7965
7966
7967
7968static int
7969lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
7970{
7971 struct lpfc_cq_event *cq_event;
7972 int i;
7973
7974 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
7975 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
7976 if (!cq_event)
7977 goto out_pool_create_fail;
7978 list_add_tail(&cq_event->list,
7979 &phba->sli4_hba.sp_cqe_event_pool);
7980 }
7981 return 0;
7982
7983out_pool_create_fail:
7984 lpfc_sli4_cq_event_pool_destroy(phba);
7985 return -ENOMEM;
7986}
7987
7988
7989
7990
7991
7992
7993
7994
7995
7996
7997
7998static void
7999lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
8000{
8001 struct lpfc_cq_event *cq_event, *next_cq_event;
8002
8003 list_for_each_entry_safe(cq_event, next_cq_event,
8004 &phba->sli4_hba.sp_cqe_event_pool, list) {
8005 list_del(&cq_event->list);
8006 kfree(cq_event);
8007 }
8008}
8009
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
8020struct lpfc_cq_event *
8021__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8022{
8023 struct lpfc_cq_event *cq_event = NULL;
8024
8025 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
8026 struct lpfc_cq_event, list);
8027 return cq_event;
8028}
8029
8030
8031
8032
8033
8034
8035
8036
8037
8038
8039
8040struct lpfc_cq_event *
8041lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8042{
8043 struct lpfc_cq_event *cq_event;
8044 unsigned long iflags;
8045
8046 spin_lock_irqsave(&phba->hbalock, iflags);
8047 cq_event = __lpfc_sli4_cq_event_alloc(phba);
8048 spin_unlock_irqrestore(&phba->hbalock, iflags);
8049 return cq_event;
8050}
8051
8052
8053
8054
8055
8056
8057
8058
8059
8060void
8061__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8062 struct lpfc_cq_event *cq_event)
8063{
8064 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
8065}
8066
8067
8068
8069
8070
8071
8072
8073
8074
8075void
8076lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8077 struct lpfc_cq_event *cq_event)
8078{
8079 unsigned long iflags;
8080 spin_lock_irqsave(&phba->hbalock, iflags);
8081 __lpfc_sli4_cq_event_release(phba, cq_event);
8082 spin_unlock_irqrestore(&phba->hbalock, iflags);
8083}
8084
8085
8086
8087
8088
8089
8090
8091
8092static void
8093lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
8094{
8095 LIST_HEAD(cqelist);
8096 struct lpfc_cq_event *cqe;
8097 unsigned long iflags;
8098
8099
8100 spin_lock_irqsave(&phba->hbalock, iflags);
8101
8102 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
8103 &cqelist);
8104
8105 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
8106 &cqelist);
8107
8108 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
8109 &cqelist);
8110 spin_unlock_irqrestore(&phba->hbalock, iflags);
8111
8112 while (!list_empty(&cqelist)) {
8113 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
8114 lpfc_sli4_cq_event_release(phba, cqe);
8115 }
8116}
8117
8118
8119
8120
8121
8122
8123
8124
8125
8126
8127
8128
8129
8130int
8131lpfc_pci_function_reset(struct lpfc_hba *phba)
8132{
8133 LPFC_MBOXQ_t *mboxq;
8134 uint32_t rc = 0, if_type;
8135 uint32_t shdr_status, shdr_add_status;
8136 uint32_t rdy_chk;
8137 uint32_t port_reset = 0;
8138 union lpfc_sli4_cfg_shdr *shdr;
8139 struct lpfc_register reg_data;
8140 uint16_t devid;
8141
8142 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8143 switch (if_type) {
8144 case LPFC_SLI_INTF_IF_TYPE_0:
8145 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8146 GFP_KERNEL);
8147 if (!mboxq) {
8148 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8149 "0494 Unable to allocate memory for "
8150 "issuing SLI_FUNCTION_RESET mailbox "
8151 "command\n");
8152 return -ENOMEM;
8153 }
8154
8155
8156 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8157 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
8158 LPFC_SLI4_MBX_EMBED);
8159 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8160 shdr = (union lpfc_sli4_cfg_shdr *)
8161 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8162 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8163 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
8164 &shdr->response);
8165 if (rc != MBX_TIMEOUT)
8166 mempool_free(mboxq, phba->mbox_mem_pool);
8167 if (shdr_status || shdr_add_status || rc) {
8168 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8169 "0495 SLI_FUNCTION_RESET mailbox "
8170 "failed with status x%x add_status x%x,"
8171 " mbx status x%x\n",
8172 shdr_status, shdr_add_status, rc);
8173 rc = -ENXIO;
8174 }
8175 break;
8176 case LPFC_SLI_INTF_IF_TYPE_2:
8177wait:
8178
8179
8180
8181
8182
8183 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
8184 if (lpfc_readl(phba->sli4_hba.u.if_type2.
8185 STATUSregaddr, ®_data.word0)) {
8186 rc = -ENODEV;
8187 goto out;
8188 }
8189 if (bf_get(lpfc_sliport_status_rdy, ®_data))
8190 break;
8191 msleep(20);
8192 }
8193
8194 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) {
8195 phba->work_status[0] = readl(
8196 phba->sli4_hba.u.if_type2.ERR1regaddr);
8197 phba->work_status[1] = readl(
8198 phba->sli4_hba.u.if_type2.ERR2regaddr);
8199 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8200 "2890 Port not ready, port status reg "
8201 "0x%x error 1=0x%x, error 2=0x%x\n",
8202 reg_data.word0,
8203 phba->work_status[0],
8204 phba->work_status[1]);
8205 rc = -ENODEV;
8206 goto out;
8207 }
8208
8209 if (!port_reset) {
8210
8211
8212
8213 reg_data.word0 = 0;
8214 bf_set(lpfc_sliport_ctrl_end, ®_data,
8215 LPFC_SLIPORT_LITTLE_ENDIAN);
8216 bf_set(lpfc_sliport_ctrl_ip, ®_data,
8217 LPFC_SLIPORT_INIT_PORT);
8218 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
8219 CTRLregaddr);
8220
8221 pci_read_config_word(phba->pcidev,
8222 PCI_DEVICE_ID, &devid);
8223
8224 port_reset = 1;
8225 msleep(20);
8226 goto wait;
8227 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) {
8228 rc = -ENODEV;
8229 goto out;
8230 }
8231 break;
8232
8233 case LPFC_SLI_INTF_IF_TYPE_1:
8234 default:
8235 break;
8236 }
8237
8238out:
8239
8240 if (rc) {
8241 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8242 "3317 HBA not functional: IP Reset Failed "
8243 "try: echo fw_reset > board_mode\n");
8244 rc = -ENODEV;
8245 }
8246
8247 return rc;
8248}
8249
8250
8251
8252
8253
8254
8255
8256
8257
8258
8259
8260
8261static int
8262lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
8263{
8264 struct pci_dev *pdev;
8265 unsigned long bar0map_len, bar1map_len, bar2map_len;
8266 int error = -ENODEV;
8267 uint32_t if_type;
8268
8269
8270 if (!phba->pcidev)
8271 return error;
8272 else
8273 pdev = phba->pcidev;
8274
8275
8276 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
8277 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
8278 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
8279 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
8280 return error;
8281 }
8282 }
8283
8284
8285
8286
8287
8288 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
8289 &phba->sli4_hba.sli_intf.word0)) {
8290 return error;
8291 }
8292
8293
8294 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
8295 LPFC_SLI_INTF_VALID) {
8296 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8297 "2894 SLI_INTF reg contents invalid "
8298 "sli_intf reg 0x%x\n",
8299 phba->sli4_hba.sli_intf.word0);
8300 return error;
8301 }
8302
8303 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8304
8305
8306
8307
8308
8309
8310 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
8311 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
8312 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
8313
8314
8315
8316
8317
8318 phba->sli4_hba.conf_regs_memmap_p =
8319 ioremap(phba->pci_bar0_map, bar0map_len);
8320 if (!phba->sli4_hba.conf_regs_memmap_p) {
8321 dev_printk(KERN_ERR, &pdev->dev,
8322 "ioremap failed for SLI4 PCI config "
8323 "registers.\n");
8324 goto out;
8325 }
8326 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
8327
8328 lpfc_sli4_bar0_register_memmap(phba, if_type);
8329 } else {
8330 phba->pci_bar0_map = pci_resource_start(pdev, 1);
8331 bar0map_len = pci_resource_len(pdev, 1);
8332 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
8333 dev_printk(KERN_ERR, &pdev->dev,
8334 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
8335 goto out;
8336 }
8337 phba->sli4_hba.conf_regs_memmap_p =
8338 ioremap(phba->pci_bar0_map, bar0map_len);
8339 if (!phba->sli4_hba.conf_regs_memmap_p) {
8340 dev_printk(KERN_ERR, &pdev->dev,
8341 "ioremap failed for SLI4 PCI config "
8342 "registers.\n");
8343 goto out;
8344 }
8345 lpfc_sli4_bar0_register_memmap(phba, if_type);
8346 }
8347
8348 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
8349 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
8350
8351
8352
8353
8354 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
8355 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
8356 phba->sli4_hba.ctrl_regs_memmap_p =
8357 ioremap(phba->pci_bar1_map, bar1map_len);
8358 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
8359 dev_printk(KERN_ERR, &pdev->dev,
8360 "ioremap failed for SLI4 HBA control registers.\n");
8361 goto out_iounmap_conf;
8362 }
8363 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
8364 lpfc_sli4_bar1_register_memmap(phba);
8365 }
8366
8367 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
8368 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
8369
8370
8371
8372
8373 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
8374 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
8375 phba->sli4_hba.drbl_regs_memmap_p =
8376 ioremap(phba->pci_bar2_map, bar2map_len);
8377 if (!phba->sli4_hba.drbl_regs_memmap_p) {
8378 dev_printk(KERN_ERR, &pdev->dev,
8379 "ioremap failed for SLI4 HBA doorbell registers.\n");
8380 goto out_iounmap_ctrl;
8381 }
8382 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
8383 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
8384 if (error)
8385 goto out_iounmap_all;
8386 }
8387
8388 return 0;
8389
8390out_iounmap_all:
8391 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
8392out_iounmap_ctrl:
8393 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
8394out_iounmap_conf:
8395 iounmap(phba->sli4_hba.conf_regs_memmap_p);
8396out:
8397 return error;
8398}
8399
8400
8401
8402
8403
8404
8405
8406
8407static void
8408lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
8409{
8410 uint32_t if_type;
8411 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8412
8413 switch (if_type) {
8414 case LPFC_SLI_INTF_IF_TYPE_0:
8415 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
8416 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
8417 iounmap(phba->sli4_hba.conf_regs_memmap_p);
8418 break;
8419 case LPFC_SLI_INTF_IF_TYPE_2:
8420 iounmap(phba->sli4_hba.conf_regs_memmap_p);
8421 break;
8422 case LPFC_SLI_INTF_IF_TYPE_1:
8423 default:
8424 dev_printk(KERN_ERR, &phba->pcidev->dev,
8425 "FATAL - unsupported SLI4 interface type - %d\n",
8426 if_type);
8427 break;
8428 }
8429}
8430
8431
8432
8433
8434
8435
8436
8437
8438
8439
8440
8441
8442
8443
8444
8445
8446
8447
8448
8449
8450
8451static int
8452lpfc_sli_enable_msix(struct lpfc_hba *phba)
8453{
8454 int rc, i;
8455 LPFC_MBOXQ_t *pmb;
8456
8457
8458 for (i = 0; i < LPFC_MSIX_VECTORS; i++)
8459 phba->msix_entries[i].entry = i;
8460
8461
8462 rc = pci_enable_msix_exact(phba->pcidev, phba->msix_entries,
8463 LPFC_MSIX_VECTORS);
8464 if (rc) {
8465 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8466 "0420 PCI enable MSI-X failed (%d)\n", rc);
8467 goto vec_fail_out;
8468 }
8469 for (i = 0; i < LPFC_MSIX_VECTORS; i++)
8470 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8471 "0477 MSI-X entry[%d]: vector=x%x "
8472 "message=%d\n", i,
8473 phba->msix_entries[i].vector,
8474 phba->msix_entries[i].entry);
8475
8476
8477
8478
8479
8480 rc = request_irq(phba->msix_entries[0].vector,
8481 &lpfc_sli_sp_intr_handler, 0,
8482 LPFC_SP_DRIVER_HANDLER_NAME, phba);
8483 if (rc) {
8484 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8485 "0421 MSI-X slow-path request_irq failed "
8486 "(%d)\n", rc);
8487 goto msi_fail_out;
8488 }
8489
8490
8491 rc = request_irq(phba->msix_entries[1].vector,
8492 &lpfc_sli_fp_intr_handler, 0,
8493 LPFC_FP_DRIVER_HANDLER_NAME, phba);
8494
8495 if (rc) {
8496 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8497 "0429 MSI-X fast-path request_irq failed "
8498 "(%d)\n", rc);
8499 goto irq_fail_out;
8500 }
8501
8502
8503
8504
8505 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8506
8507 if (!pmb) {
8508 rc = -ENOMEM;
8509 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8510 "0474 Unable to allocate memory for issuing "
8511 "MBOX_CONFIG_MSI command\n");
8512 goto mem_fail_out;
8513 }
8514 rc = lpfc_config_msi(phba, pmb);
8515 if (rc)
8516 goto mbx_fail_out;
8517 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
8518 if (rc != MBX_SUCCESS) {
8519 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
8520 "0351 Config MSI mailbox command failed, "
8521 "mbxCmd x%x, mbxStatus x%x\n",
8522 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
8523 goto mbx_fail_out;
8524 }
8525
8526
8527 mempool_free(pmb, phba->mbox_mem_pool);
8528 return rc;
8529
8530mbx_fail_out:
8531
8532 mempool_free(pmb, phba->mbox_mem_pool);
8533
8534mem_fail_out:
8535
8536 free_irq(phba->msix_entries[1].vector, phba);
8537
8538irq_fail_out:
8539
8540 free_irq(phba->msix_entries[0].vector, phba);
8541
8542msi_fail_out:
8543
8544 pci_disable_msix(phba->pcidev);
8545
8546vec_fail_out:
8547 return rc;
8548}
8549
8550
8551
8552
8553
8554
8555
8556
8557static void
8558lpfc_sli_disable_msix(struct lpfc_hba *phba)
8559{
8560 int i;
8561
8562
8563 for (i = 0; i < LPFC_MSIX_VECTORS; i++)
8564 free_irq(phba->msix_entries[i].vector, phba);
8565
8566 pci_disable_msix(phba->pcidev);
8567
8568 return;
8569}
8570
8571
8572
8573
8574
8575
8576
8577
8578
8579
8580
8581
8582
8583
8584
8585static int
8586lpfc_sli_enable_msi(struct lpfc_hba *phba)
8587{
8588 int rc;
8589
8590 rc = pci_enable_msi(phba->pcidev);
8591 if (!rc)
8592 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8593 "0462 PCI enable MSI mode success.\n");
8594 else {
8595 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8596 "0471 PCI enable MSI mode failed (%d)\n", rc);
8597 return rc;
8598 }
8599
8600 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
8601 0, LPFC_DRIVER_NAME, phba);
8602 if (rc) {
8603 pci_disable_msi(phba->pcidev);
8604 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8605 "0478 MSI request_irq failed (%d)\n", rc);
8606 }
8607 return rc;
8608}
8609
8610
8611
8612
8613
8614
8615
8616
8617
8618
8619
8620static void
8621lpfc_sli_disable_msi(struct lpfc_hba *phba)
8622{
8623 free_irq(phba->pcidev->irq, phba);
8624 pci_disable_msi(phba->pcidev);
8625 return;
8626}
8627
8628
8629
8630
8631
8632
8633
8634
8635
8636
8637
8638
8639
8640
8641
8642
8643
8644static uint32_t
8645lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
8646{
8647 uint32_t intr_mode = LPFC_INTR_ERROR;
8648 int retval;
8649
8650 if (cfg_mode == 2) {
8651
8652 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
8653 if (!retval) {
8654
8655 retval = lpfc_sli_enable_msix(phba);
8656 if (!retval) {
8657
8658 phba->intr_type = MSIX;
8659 intr_mode = 2;
8660 }
8661 }
8662 }
8663
8664
8665 if (cfg_mode >= 1 && phba->intr_type == NONE) {
8666 retval = lpfc_sli_enable_msi(phba);
8667 if (!retval) {
8668
8669 phba->intr_type = MSI;
8670 intr_mode = 1;
8671 }
8672 }
8673
8674
8675 if (phba->intr_type == NONE) {
8676 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
8677 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
8678 if (!retval) {
8679
8680 phba->intr_type = INTx;
8681 intr_mode = 0;
8682 }
8683 }
8684 return intr_mode;
8685}
8686
8687
8688
8689
8690
8691
8692
8693
8694
8695
8696static void
8697lpfc_sli_disable_intr(struct lpfc_hba *phba)
8698{
8699
8700 if (phba->intr_type == MSIX)
8701 lpfc_sli_disable_msix(phba);
8702 else if (phba->intr_type == MSI)
8703 lpfc_sli_disable_msi(phba);
8704 else if (phba->intr_type == INTx)
8705 free_irq(phba->pcidev->irq, phba);
8706
8707
8708 phba->intr_type = NONE;
8709 phba->sli.slistat.sli_intr = 0;
8710
8711 return;
8712}
8713
8714
8715
8716
8717
8718
8719
8720static int
8721lpfc_find_next_cpu(struct lpfc_hba *phba, uint32_t phys_id)
8722{
8723 struct lpfc_vector_map_info *cpup;
8724 int cpu;
8725
8726 cpup = phba->sli4_hba.cpu_map;
8727 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
8728
8729 if (cpu_online(cpu)) {
8730 if ((cpup->irq == LPFC_VECTOR_MAP_EMPTY) &&
8731 (lpfc_used_cpu[cpu] == LPFC_VECTOR_MAP_EMPTY) &&
8732 (cpup->phys_id == phys_id)) {
8733 return cpu;
8734 }
8735 }
8736 cpup++;
8737 }
8738
8739
8740
8741
8742
8743
8744
8745 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
8746 if (lpfc_used_cpu[cpu] == phys_id)
8747 lpfc_used_cpu[cpu] = LPFC_VECTOR_MAP_EMPTY;
8748 }
8749
8750 cpup = phba->sli4_hba.cpu_map;
8751 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
8752
8753 if (cpu_online(cpu)) {
8754 if ((cpup->irq == LPFC_VECTOR_MAP_EMPTY) &&
8755 (cpup->phys_id == phys_id)) {
8756 return cpu;
8757 }
8758 }
8759 cpup++;
8760 }
8761 return LPFC_VECTOR_MAP_EMPTY;
8762}
8763
8764
8765
8766
8767
8768
8769
8770
8771
8772
8773
8774static int
8775lpfc_sli4_set_affinity(struct lpfc_hba *phba, int vectors)
8776{
8777 int i, idx, saved_chann, used_chann, cpu, phys_id;
8778 int max_phys_id, min_phys_id;
8779 int num_io_channel, first_cpu, chan;
8780 struct lpfc_vector_map_info *cpup;
8781#ifdef CONFIG_X86
8782 struct cpuinfo_x86 *cpuinfo;
8783#endif
8784 uint8_t chann[LPFC_FCP_IO_CHAN_MAX+1];
8785
8786
8787 if (!phba->cfg_fcp_cpu_map)
8788 return 1;
8789
8790
8791 memset(phba->sli4_hba.cpu_map, 0xff,
8792 (sizeof(struct lpfc_vector_map_info) *
8793 phba->sli4_hba.num_present_cpu));
8794
8795 max_phys_id = 0;
8796 min_phys_id = 0xff;
8797 phys_id = 0;
8798 num_io_channel = 0;
8799 first_cpu = LPFC_VECTOR_MAP_EMPTY;
8800
8801
8802 cpup = phba->sli4_hba.cpu_map;
8803 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
8804#ifdef CONFIG_X86
8805 cpuinfo = &cpu_data(cpu);
8806 cpup->phys_id = cpuinfo->phys_proc_id;
8807 cpup->core_id = cpuinfo->cpu_core_id;
8808#else
8809
8810 cpup->phys_id = 0;
8811 cpup->core_id = 0;
8812#endif
8813
8814 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8815 "3328 CPU physid %d coreid %d\n",
8816 cpup->phys_id, cpup->core_id);
8817
8818 if (cpup->phys_id > max_phys_id)
8819 max_phys_id = cpup->phys_id;
8820 if (cpup->phys_id < min_phys_id)
8821 min_phys_id = cpup->phys_id;
8822 cpup++;
8823 }
8824
8825 phys_id = min_phys_id;
8826
8827 for (idx = 0; idx < vectors; idx++) {
8828 cpup = phba->sli4_hba.cpu_map;
8829 cpu = lpfc_find_next_cpu(phba, phys_id);
8830 if (cpu == LPFC_VECTOR_MAP_EMPTY) {
8831
8832
8833 for (i = 1; i < max_phys_id; i++) {
8834 phys_id++;
8835 if (phys_id > max_phys_id)
8836 phys_id = min_phys_id;
8837 cpu = lpfc_find_next_cpu(phba, phys_id);
8838 if (cpu == LPFC_VECTOR_MAP_EMPTY)
8839 continue;
8840 goto found;
8841 }
8842
8843
8844 phba->cfg_fcp_io_sched = LPFC_FCP_SCHED_ROUND_ROBIN;
8845 chan = 0;
8846 cpup = phba->sli4_hba.cpu_map;
8847 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
8848 cpup->channel_id = chan;
8849 cpup++;
8850 chan++;
8851 if (chan >= phba->cfg_fcp_io_channel)
8852 chan = 0;
8853 }
8854
8855 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8856 "3329 Cannot set affinity:"
8857 "Error mapping vector %d (%d)\n",
8858 idx, vectors);
8859 return 0;
8860 }
8861found:
8862 cpup += cpu;
8863 if (phba->cfg_fcp_cpu_map == LPFC_DRIVER_CPU_MAP)
8864 lpfc_used_cpu[cpu] = phys_id;
8865
8866
8867 cpup->irq = phba->sli4_hba.msix_entries[idx].vector;
8868
8869
8870 cpup->channel_id = idx;
8871 num_io_channel++;
8872
8873 if (first_cpu == LPFC_VECTOR_MAP_EMPTY)
8874 first_cpu = cpu;
8875
8876
8877 i = irq_set_affinity_hint(phba->sli4_hba.msix_entries[idx].
8878 vector, get_cpu_mask(cpu));
8879
8880 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8881 "3330 Set Affinity: CPU %d channel %d "
8882 "irq %d (%x)\n",
8883 cpu, cpup->channel_id,
8884 phba->sli4_hba.msix_entries[idx].vector, i);
8885
8886
8887 phys_id++;
8888 if (phys_id > max_phys_id)
8889 phys_id = min_phys_id;
8890 }
8891
8892
8893
8894
8895
8896
8897
8898
8899 for (i = min_phys_id; i <= max_phys_id; i++) {
8900
8901
8902
8903
8904
8905 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8906 chann[idx] = idx;
8907
8908 saved_chann = 0;
8909 used_chann = 0;
8910
8911
8912
8913
8914
8915
8916 cpup = phba->sli4_hba.cpu_map;
8917 cpu = first_cpu;
8918 cpup += cpu;
8919 for (idx = 0; idx < phba->sli4_hba.num_present_cpu;
8920 idx++) {
8921 if (cpup->phys_id == i) {
8922
8923
8924
8925
8926 if (cpup->irq != LPFC_VECTOR_MAP_EMPTY) {
8927 if (saved_chann <=
8928 LPFC_FCP_IO_CHAN_MAX) {
8929 chann[saved_chann] =
8930 cpup->channel_id;
8931 saved_chann++;
8932 }
8933 goto out;
8934 }
8935
8936
8937 if (saved_chann == 0)
8938 saved_chann =
8939 phba->cfg_fcp_io_channel;
8940
8941
8942 cpup->channel_id = chann[used_chann];
8943 num_io_channel++;
8944 used_chann++;
8945 if (used_chann == saved_chann)
8946 used_chann = 0;
8947
8948 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8949 "3331 Set IO_CHANN "
8950 "CPU %d channel %d\n",
8951 idx, cpup->channel_id);
8952 }
8953out:
8954 cpu++;
8955 if (cpu >= phba->sli4_hba.num_present_cpu) {
8956 cpup = phba->sli4_hba.cpu_map;
8957 cpu = 0;
8958 } else {
8959 cpup++;
8960 }
8961 }
8962 }
8963
8964 if (phba->sli4_hba.num_online_cpu != phba->sli4_hba.num_present_cpu) {
8965 cpup = phba->sli4_hba.cpu_map;
8966 for (idx = 0; idx < phba->sli4_hba.num_present_cpu; idx++) {
8967 if (cpup->channel_id == LPFC_VECTOR_MAP_EMPTY) {
8968 cpup->channel_id = 0;
8969 num_io_channel++;
8970
8971 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8972 "3332 Assign IO_CHANN "
8973 "CPU %d channel %d\n",
8974 idx, cpup->channel_id);
8975 }
8976 cpup++;
8977 }
8978 }
8979
8980
8981 if (num_io_channel != phba->sli4_hba.num_present_cpu)
8982 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8983 "3333 Set affinity mismatch:"
8984 "%d chann != %d cpus: %d vectors\n",
8985 num_io_channel, phba->sli4_hba.num_present_cpu,
8986 vectors);
8987
8988
8989 phba->cfg_fcp_io_sched = LPFC_FCP_SCHED_BY_CPU;
8990 return 1;
8991}
8992
8993
8994
8995
8996
8997
8998
8999
9000
9001
9002
9003
9004
9005
9006
9007
9008
9009
9010
9011
9012static int
9013lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9014{
9015 int vectors, rc, index;
9016
9017
9018 for (index = 0; index < phba->cfg_fcp_io_channel; index++)
9019 phba->sli4_hba.msix_entries[index].entry = index;
9020
9021
9022 vectors = phba->cfg_fcp_io_channel;
9023 if (phba->cfg_fof) {
9024 phba->sli4_hba.msix_entries[index].entry = index;
9025 vectors++;
9026 }
9027 rc = pci_enable_msix_range(phba->pcidev, phba->sli4_hba.msix_entries,
9028 2, vectors);
9029 if (rc < 0) {
9030 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9031 "0484 PCI enable MSI-X failed (%d)\n", rc);
9032 goto vec_fail_out;
9033 }
9034 vectors = rc;
9035
9036
9037 for (index = 0; index < vectors; index++)
9038 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9039 "0489 MSI-X entry[%d]: vector=x%x "
9040 "message=%d\n", index,
9041 phba->sli4_hba.msix_entries[index].vector,
9042 phba->sli4_hba.msix_entries[index].entry);
9043
9044
9045 for (index = 0; index < vectors; index++) {
9046 memset(&phba->sli4_hba.handler_name[index], 0, 16);
9047 snprintf((char *)&phba->sli4_hba.handler_name[index],
9048 LPFC_SLI4_HANDLER_NAME_SZ,
9049 LPFC_DRIVER_HANDLER_NAME"%d", index);
9050
9051 phba->sli4_hba.fcp_eq_hdl[index].idx = index;
9052 phba->sli4_hba.fcp_eq_hdl[index].phba = phba;
9053 atomic_set(&phba->sli4_hba.fcp_eq_hdl[index].fcp_eq_in_use, 1);
9054 if (phba->cfg_fof && (index == (vectors - 1)))
9055 rc = request_irq(
9056 phba->sli4_hba.msix_entries[index].vector,
9057 &lpfc_sli4_fof_intr_handler, 0,
9058 (char *)&phba->sli4_hba.handler_name[index],
9059 &phba->sli4_hba.fcp_eq_hdl[index]);
9060 else
9061 rc = request_irq(
9062 phba->sli4_hba.msix_entries[index].vector,
9063 &lpfc_sli4_hba_intr_handler, 0,
9064 (char *)&phba->sli4_hba.handler_name[index],
9065 &phba->sli4_hba.fcp_eq_hdl[index]);
9066 if (rc) {
9067 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9068 "0486 MSI-X fast-path (%d) "
9069 "request_irq failed (%d)\n", index, rc);
9070 goto cfg_fail_out;
9071 }
9072 }
9073
9074 if (phba->cfg_fof)
9075 vectors--;
9076
9077 if (vectors != phba->cfg_fcp_io_channel) {
9078 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9079 "3238 Reducing IO channels to match number of "
9080 "MSI-X vectors, requested %d got %d\n",
9081 phba->cfg_fcp_io_channel, vectors);
9082 phba->cfg_fcp_io_channel = vectors;
9083 }
9084
9085 if (!shost_use_blk_mq(lpfc_shost_from_vport(phba->pport)))
9086 lpfc_sli4_set_affinity(phba, vectors);
9087 return rc;
9088
9089cfg_fail_out:
9090
9091 for (--index; index >= 0; index--) {
9092 irq_set_affinity_hint(phba->sli4_hba.msix_entries[index].
9093 vector, NULL);
9094 free_irq(phba->sli4_hba.msix_entries[index].vector,
9095 &phba->sli4_hba.fcp_eq_hdl[index]);
9096 }
9097
9098
9099 pci_disable_msix(phba->pcidev);
9100
9101vec_fail_out:
9102 return rc;
9103}
9104
9105
9106
9107
9108
9109
9110
9111
9112static void
9113lpfc_sli4_disable_msix(struct lpfc_hba *phba)
9114{
9115 int index;
9116
9117
9118 for (index = 0; index < phba->cfg_fcp_io_channel; index++) {
9119 irq_set_affinity_hint(phba->sli4_hba.msix_entries[index].
9120 vector, NULL);
9121 free_irq(phba->sli4_hba.msix_entries[index].vector,
9122 &phba->sli4_hba.fcp_eq_hdl[index]);
9123 }
9124 if (phba->cfg_fof) {
9125 free_irq(phba->sli4_hba.msix_entries[index].vector,
9126 &phba->sli4_hba.fcp_eq_hdl[index]);
9127 }
9128
9129 pci_disable_msix(phba->pcidev);
9130
9131 return;
9132}
9133
9134
9135
9136
9137
9138
9139
9140
9141
9142
9143
9144
9145
9146
9147
9148static int
9149lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9150{
9151 int rc, index;
9152
9153 rc = pci_enable_msi(phba->pcidev);
9154 if (!rc)
9155 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9156 "0487 PCI enable MSI mode success.\n");
9157 else {
9158 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9159 "0488 PCI enable MSI mode failed (%d)\n", rc);
9160 return rc;
9161 }
9162
9163 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9164 0, LPFC_DRIVER_NAME, phba);
9165 if (rc) {
9166 pci_disable_msi(phba->pcidev);
9167 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9168 "0490 MSI request_irq failed (%d)\n", rc);
9169 return rc;
9170 }
9171
9172 for (index = 0; index < phba->cfg_fcp_io_channel; index++) {
9173 phba->sli4_hba.fcp_eq_hdl[index].idx = index;
9174 phba->sli4_hba.fcp_eq_hdl[index].phba = phba;
9175 }
9176
9177 if (phba->cfg_fof) {
9178 phba->sli4_hba.fcp_eq_hdl[index].idx = index;
9179 phba->sli4_hba.fcp_eq_hdl[index].phba = phba;
9180 }
9181 return 0;
9182}
9183
9184
9185
9186
9187
9188
9189
9190
9191
9192
9193
9194static void
9195lpfc_sli4_disable_msi(struct lpfc_hba *phba)
9196{
9197 free_irq(phba->pcidev->irq, phba);
9198 pci_disable_msi(phba->pcidev);
9199 return;
9200}
9201
9202
9203
9204
9205
9206
9207
9208
9209
9210
9211
9212
9213
9214
9215
9216
9217
9218static uint32_t
9219lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9220{
9221 uint32_t intr_mode = LPFC_INTR_ERROR;
9222 int retval, index;
9223
9224 if (cfg_mode == 2) {
9225
9226 retval = 0;
9227 if (!retval) {
9228
9229 retval = lpfc_sli4_enable_msix(phba);
9230 if (!retval) {
9231
9232 phba->intr_type = MSIX;
9233 intr_mode = 2;
9234 }
9235 }
9236 }
9237
9238
9239 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9240 retval = lpfc_sli4_enable_msi(phba);
9241 if (!retval) {
9242
9243 phba->intr_type = MSI;
9244 intr_mode = 1;
9245 }
9246 }
9247
9248
9249 if (phba->intr_type == NONE) {
9250 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9251 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9252 if (!retval) {
9253
9254 phba->intr_type = INTx;
9255 intr_mode = 0;
9256 for (index = 0; index < phba->cfg_fcp_io_channel;
9257 index++) {
9258 phba->sli4_hba.fcp_eq_hdl[index].idx = index;
9259 phba->sli4_hba.fcp_eq_hdl[index].phba = phba;
9260 atomic_set(&phba->sli4_hba.fcp_eq_hdl[index].
9261 fcp_eq_in_use, 1);
9262 }
9263 if (phba->cfg_fof) {
9264 phba->sli4_hba.fcp_eq_hdl[index].idx = index;
9265 phba->sli4_hba.fcp_eq_hdl[index].phba = phba;
9266 atomic_set(&phba->sli4_hba.fcp_eq_hdl[index].
9267 fcp_eq_in_use, 1);
9268 }
9269 }
9270 }
9271 return intr_mode;
9272}
9273
9274
9275
9276
9277
9278
9279
9280
9281
9282
9283static void
9284lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9285{
9286
9287 if (phba->intr_type == MSIX)
9288 lpfc_sli4_disable_msix(phba);
9289 else if (phba->intr_type == MSI)
9290 lpfc_sli4_disable_msi(phba);
9291 else if (phba->intr_type == INTx)
9292 free_irq(phba->pcidev->irq, phba);
9293
9294
9295 phba->intr_type = NONE;
9296 phba->sli.slistat.sli_intr = 0;
9297
9298 return;
9299}
9300
9301
9302
9303
9304
9305
9306
9307
9308static void
9309lpfc_unset_hba(struct lpfc_hba *phba)
9310{
9311 struct lpfc_vport *vport = phba->pport;
9312 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
9313
9314 spin_lock_irq(shost->host_lock);
9315 vport->load_flag |= FC_UNLOADING;
9316 spin_unlock_irq(shost->host_lock);
9317
9318 kfree(phba->vpi_bmask);
9319 kfree(phba->vpi_ids);
9320
9321 lpfc_stop_hba_timers(phba);
9322
9323 phba->pport->work_port_events = 0;
9324
9325 lpfc_sli_hba_down(phba);
9326
9327 lpfc_sli_brdrestart(phba);
9328
9329 lpfc_sli_disable_intr(phba);
9330
9331 return;
9332}
9333
9334
9335
9336
9337
9338
9339
9340
9341
9342
9343
9344
9345
9346
9347static void
9348lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
9349{
9350 int wait_time = 0;
9351 int fcp_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
9352 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
9353
9354 while (!fcp_xri_cmpl || !els_xri_cmpl) {
9355 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
9356 if (!fcp_xri_cmpl)
9357 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9358 "2877 FCP XRI exchange busy "
9359 "wait time: %d seconds.\n",
9360 wait_time/1000);
9361 if (!els_xri_cmpl)
9362 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9363 "2878 ELS XRI exchange busy "
9364 "wait time: %d seconds.\n",
9365 wait_time/1000);
9366 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
9367 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
9368 } else {
9369 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
9370 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
9371 }
9372 fcp_xri_cmpl =
9373 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
9374 els_xri_cmpl =
9375 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
9376 }
9377}
9378
9379
9380
9381
9382
9383
9384
9385
9386
9387
9388
9389static void
9390lpfc_sli4_hba_unset(struct lpfc_hba *phba)
9391{
9392 int wait_cnt = 0;
9393 LPFC_MBOXQ_t *mboxq;
9394 struct pci_dev *pdev = phba->pcidev;
9395
9396 lpfc_stop_hba_timers(phba);
9397 phba->sli4_hba.intr_enable = 0;
9398
9399
9400
9401
9402
9403
9404
9405 spin_lock_irq(&phba->hbalock);
9406 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
9407 spin_unlock_irq(&phba->hbalock);
9408
9409 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
9410 msleep(10);
9411 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
9412 break;
9413 }
9414
9415 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
9416 spin_lock_irq(&phba->hbalock);
9417 mboxq = phba->sli.mbox_active;
9418 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
9419 __lpfc_mbox_cmpl_put(phba, mboxq);
9420 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
9421 phba->sli.mbox_active = NULL;
9422 spin_unlock_irq(&phba->hbalock);
9423 }
9424
9425
9426 lpfc_sli_hba_iocb_abort(phba);
9427
9428
9429 lpfc_sli4_xri_exchange_busy_wait(phba);
9430
9431
9432 lpfc_sli4_disable_intr(phba);
9433
9434
9435 if (phba->cfg_sriov_nr_virtfn)
9436 pci_disable_sriov(pdev);
9437
9438
9439 kthread_stop(phba->worker_thread);
9440
9441
9442 lpfc_pci_function_reset(phba);
9443 lpfc_sli4_queue_destroy(phba);
9444
9445
9446 phba->pport->work_port_events = 0;
9447}
9448
9449
9450
9451
9452
9453
9454
9455
9456
9457
9458
9459
9460
9461int
9462lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
9463{
9464 int rc;
9465 struct lpfc_mqe *mqe;
9466 struct lpfc_pc_sli4_params *sli4_params;
9467 uint32_t mbox_tmo;
9468
9469 rc = 0;
9470 mqe = &mboxq->u.mqe;
9471
9472
9473 lpfc_pc_sli4_params(mboxq);
9474 if (!phba->sli4_hba.intr_enable)
9475 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9476 else {
9477 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
9478 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
9479 }
9480
9481 if (unlikely(rc))
9482 return 1;
9483
9484 sli4_params = &phba->sli4_hba.pc_sli4_params;
9485 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
9486 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
9487 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
9488 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
9489 &mqe->un.sli4_params);
9490 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
9491 &mqe->un.sli4_params);
9492 sli4_params->proto_types = mqe->un.sli4_params.word3;
9493 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
9494 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
9495 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
9496 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
9497 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
9498 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
9499 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
9500 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
9501 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
9502 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
9503 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
9504 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
9505 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
9506 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
9507 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
9508 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
9509 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
9510 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
9511 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
9512 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
9513
9514
9515 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
9516 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
9517
9518 return rc;
9519}
9520
9521
9522
9523
9524
9525
9526
9527
9528
9529
9530
9531
9532
9533int
9534lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
9535{
9536 int rc;
9537 struct lpfc_mqe *mqe = &mboxq->u.mqe;
9538 struct lpfc_pc_sli4_params *sli4_params;
9539 uint32_t mbox_tmo;
9540 int length;
9541 struct lpfc_sli4_parameters *mbx_sli4_parameters;
9542
9543
9544
9545
9546
9547
9548 phba->sli4_hba.rpi_hdrs_in_use = 1;
9549
9550
9551 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
9552 sizeof(struct lpfc_sli4_cfg_mhdr));
9553 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9554 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
9555 length, LPFC_SLI4_MBX_EMBED);
9556 if (!phba->sli4_hba.intr_enable)
9557 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9558 else {
9559 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
9560 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
9561 }
9562 if (unlikely(rc))
9563 return rc;
9564 sli4_params = &phba->sli4_hba.pc_sli4_params;
9565 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
9566 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
9567 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
9568 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
9569 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
9570 mbx_sli4_parameters);
9571 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
9572 mbx_sli4_parameters);
9573 if (bf_get(cfg_phwq, mbx_sli4_parameters))
9574 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
9575 else
9576 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
9577 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
9578 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
9579 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
9580 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
9581 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
9582 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
9583 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
9584 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
9585 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
9586 mbx_sli4_parameters);
9587 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
9588 mbx_sli4_parameters);
9589 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
9590 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
9591
9592
9593 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
9594 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
9595
9596
9597
9598
9599
9600
9601 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
9602 phba->fcp_embed_io = 1;
9603 else
9604 phba->fcp_embed_io = 0;
9605
9606
9607
9608
9609 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
9610 phba->mds_diags_support = 1;
9611 else
9612 phba->mds_diags_support = 0;
9613 return 0;
9614}
9615
9616
9617
9618
9619
9620
9621
9622
9623
9624
9625
9626
9627
9628
9629
9630
9631
9632
9633static int
9634lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
9635{
9636 struct lpfc_hba *phba;
9637 struct lpfc_vport *vport = NULL;
9638 struct Scsi_Host *shost = NULL;
9639 int error;
9640 uint32_t cfg_mode, intr_mode;
9641
9642
9643 phba = lpfc_hba_alloc(pdev);
9644 if (!phba)
9645 return -ENOMEM;
9646
9647
9648 error = lpfc_enable_pci_dev(phba);
9649 if (error)
9650 goto out_free_phba;
9651
9652
9653 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
9654 if (error)
9655 goto out_disable_pci_dev;
9656
9657
9658 error = lpfc_sli_pci_mem_setup(phba);
9659 if (error) {
9660 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9661 "1402 Failed to set up pci memory space.\n");
9662 goto out_disable_pci_dev;
9663 }
9664
9665
9666 error = lpfc_setup_driver_resource_phase1(phba);
9667 if (error) {
9668 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9669 "1403 Failed to set up driver resource.\n");
9670 goto out_unset_pci_mem_s3;
9671 }
9672
9673
9674 error = lpfc_sli_driver_resource_setup(phba);
9675 if (error) {
9676 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9677 "1404 Failed to set up driver resource.\n");
9678 goto out_unset_pci_mem_s3;
9679 }
9680
9681
9682 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
9683 if (error) {
9684 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9685 "1405 Failed to initialize iocb list.\n");
9686 goto out_unset_driver_resource_s3;
9687 }
9688
9689
9690 error = lpfc_setup_driver_resource_phase2(phba);
9691 if (error) {
9692 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9693 "1406 Failed to set up driver resource.\n");
9694 goto out_free_iocb_list;
9695 }
9696
9697
9698 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
9699
9700
9701 error = lpfc_create_shost(phba);
9702 if (error) {
9703 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9704 "1407 Failed to create scsi host.\n");
9705 goto out_unset_driver_resource;
9706 }
9707
9708
9709 vport = phba->pport;
9710 error = lpfc_alloc_sysfs_attr(vport);
9711 if (error) {
9712 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9713 "1476 Failed to allocate sysfs attr\n");
9714 goto out_destroy_shost;
9715 }
9716
9717 shost = lpfc_shost_from_vport(vport);
9718
9719 cfg_mode = phba->cfg_use_msi;
9720 while (true) {
9721
9722 lpfc_stop_port(phba);
9723
9724 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
9725 if (intr_mode == LPFC_INTR_ERROR) {
9726 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9727 "0431 Failed to enable interrupt.\n");
9728 error = -ENODEV;
9729 goto out_free_sysfs_attr;
9730 }
9731
9732 if (lpfc_sli_hba_setup(phba)) {
9733 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9734 "1477 Failed to set up hba\n");
9735 error = -ENODEV;
9736 goto out_remove_device;
9737 }
9738
9739
9740 msleep(50);
9741
9742 if (intr_mode == 0 ||
9743 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
9744
9745 phba->intr_mode = intr_mode;
9746 lpfc_log_intr_mode(phba, intr_mode);
9747 break;
9748 } else {
9749 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9750 "0447 Configure interrupt mode (%d) "
9751 "failed active interrupt test.\n",
9752 intr_mode);
9753
9754 lpfc_sli_disable_intr(phba);
9755
9756 cfg_mode = --intr_mode;
9757 }
9758 }
9759
9760
9761 lpfc_post_init_setup(phba);
9762
9763
9764 lpfc_create_static_vport(phba);
9765
9766 return 0;
9767
9768out_remove_device:
9769 lpfc_unset_hba(phba);
9770out_free_sysfs_attr:
9771 lpfc_free_sysfs_attr(vport);
9772out_destroy_shost:
9773 lpfc_destroy_shost(phba);
9774out_unset_driver_resource:
9775 lpfc_unset_driver_resource_phase2(phba);
9776out_free_iocb_list:
9777 lpfc_free_iocb_list(phba);
9778out_unset_driver_resource_s3:
9779 lpfc_sli_driver_resource_unset(phba);
9780out_unset_pci_mem_s3:
9781 lpfc_sli_pci_mem_unset(phba);
9782out_disable_pci_dev:
9783 lpfc_disable_pci_dev(phba);
9784 if (shost)
9785 scsi_host_put(shost);
9786out_free_phba:
9787 lpfc_hba_free(phba);
9788 return error;
9789}
9790
9791
9792
9793
9794
9795
9796
9797
9798
9799
9800static void
9801lpfc_pci_remove_one_s3(struct pci_dev *pdev)
9802{
9803 struct Scsi_Host *shost = pci_get_drvdata(pdev);
9804 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
9805 struct lpfc_vport **vports;
9806 struct lpfc_hba *phba = vport->phba;
9807 int i;
9808
9809 spin_lock_irq(&phba->hbalock);
9810 vport->load_flag |= FC_UNLOADING;
9811 spin_unlock_irq(&phba->hbalock);
9812
9813 lpfc_free_sysfs_attr(vport);
9814
9815
9816 vports = lpfc_create_vport_work_array(phba);
9817 if (vports != NULL)
9818 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
9819 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
9820 continue;
9821 fc_vport_terminate(vports[i]->fc_vport);
9822 }
9823 lpfc_destroy_vport_work_array(phba, vports);
9824
9825
9826 fc_remove_host(shost);
9827 scsi_remove_host(shost);
9828 lpfc_cleanup(vport);
9829
9830
9831
9832
9833
9834
9835
9836
9837 lpfc_sli_hba_down(phba);
9838
9839 kthread_stop(phba->worker_thread);
9840
9841 lpfc_sli_brdrestart(phba);
9842
9843 kfree(phba->vpi_bmask);
9844 kfree(phba->vpi_ids);
9845
9846 lpfc_stop_hba_timers(phba);
9847 spin_lock_irq(&phba->hbalock);
9848 list_del_init(&vport->listentry);
9849 spin_unlock_irq(&phba->hbalock);
9850
9851 lpfc_debugfs_terminate(vport);
9852
9853
9854 if (phba->cfg_sriov_nr_virtfn)
9855 pci_disable_sriov(pdev);
9856
9857
9858 lpfc_sli_disable_intr(phba);
9859
9860 scsi_host_put(shost);
9861
9862
9863
9864
9865
9866 lpfc_scsi_free(phba);
9867 lpfc_mem_free_all(phba);
9868
9869 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
9870 phba->hbqslimp.virt, phba->hbqslimp.phys);
9871
9872
9873 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9874 phba->slim2p.virt, phba->slim2p.phys);
9875
9876
9877 iounmap(phba->ctrl_regs_memmap_p);
9878 iounmap(phba->slim_memmap_p);
9879
9880 lpfc_hba_free(phba);
9881
9882 pci_release_mem_regions(pdev);
9883 pci_disable_device(pdev);
9884}
9885
9886
9887
9888
9889
9890
9891
9892
9893
9894
9895
9896
9897
9898
9899
9900
9901
9902
9903
9904
9905
9906
9907static int
9908lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
9909{
9910 struct Scsi_Host *shost = pci_get_drvdata(pdev);
9911 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
9912
9913 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9914 "0473 PCI device Power Management suspend.\n");
9915
9916
9917 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
9918 lpfc_offline(phba);
9919 kthread_stop(phba->worker_thread);
9920
9921
9922 lpfc_sli_disable_intr(phba);
9923
9924
9925 pci_save_state(pdev);
9926 pci_set_power_state(pdev, PCI_D3hot);
9927
9928 return 0;
9929}
9930
9931
9932
9933
9934
9935
9936
9937
9938
9939
9940
9941
9942
9943
9944
9945
9946
9947
9948
9949
9950static int
9951lpfc_pci_resume_one_s3(struct pci_dev *pdev)
9952{
9953 struct Scsi_Host *shost = pci_get_drvdata(pdev);
9954 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
9955 uint32_t intr_mode;
9956 int error;
9957
9958 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9959 "0452 PCI device Power Management resume.\n");
9960
9961
9962 pci_set_power_state(pdev, PCI_D0);
9963 pci_restore_state(pdev);
9964
9965
9966
9967
9968
9969 pci_save_state(pdev);
9970
9971 if (pdev->is_busmaster)
9972 pci_set_master(pdev);
9973
9974
9975 phba->worker_thread = kthread_run(lpfc_do_work, phba,
9976 "lpfc_worker_%d", phba->brd_no);
9977 if (IS_ERR(phba->worker_thread)) {
9978 error = PTR_ERR(phba->worker_thread);
9979 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9980 "0434 PM resume failed to start worker "
9981 "thread: error=x%x.\n", error);
9982 return error;
9983 }
9984
9985
9986 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
9987 if (intr_mode == LPFC_INTR_ERROR) {
9988 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9989 "0430 PM resume Failed to enable interrupt\n");
9990 return -EIO;
9991 } else
9992 phba->intr_mode = intr_mode;
9993
9994
9995 lpfc_sli_brdrestart(phba);
9996 lpfc_online(phba);
9997
9998
9999 lpfc_log_intr_mode(phba, phba->intr_mode);
10000
10001 return 0;
10002}
10003
10004
10005
10006
10007
10008
10009
10010
10011static void
10012lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10013{
10014 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10015 "2723 PCI channel I/O abort preparing for recovery\n");
10016
10017
10018
10019
10020
10021 lpfc_sli_abort_fcp_rings(phba);
10022}
10023
10024
10025
10026
10027
10028
10029
10030
10031
10032static void
10033lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10034{
10035 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10036 "2710 PCI channel disable preparing for reset\n");
10037
10038
10039 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
10040
10041
10042 lpfc_scsi_dev_block(phba);
10043
10044
10045 lpfc_sli_flush_fcp_rings(phba);
10046
10047
10048 lpfc_stop_hba_timers(phba);
10049
10050
10051 lpfc_sli_disable_intr(phba);
10052 pci_disable_device(phba->pcidev);
10053}
10054
10055
10056
10057
10058
10059
10060
10061
10062
10063static void
10064lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
10065{
10066 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10067 "2711 PCI channel permanent disable for failure\n");
10068
10069 lpfc_scsi_dev_block(phba);
10070
10071
10072 lpfc_stop_hba_timers(phba);
10073
10074
10075 lpfc_sli_flush_fcp_rings(phba);
10076}
10077
10078
10079
10080
10081
10082
10083
10084
10085
10086
10087
10088
10089
10090
10091
10092
10093
10094
10095
10096static pci_ers_result_t
10097lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10098{
10099 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10100 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10101
10102 switch (state) {
10103 case pci_channel_io_normal:
10104
10105 lpfc_sli_prep_dev_for_recover(phba);
10106 return PCI_ERS_RESULT_CAN_RECOVER;
10107 case pci_channel_io_frozen:
10108
10109 lpfc_sli_prep_dev_for_reset(phba);
10110 return PCI_ERS_RESULT_NEED_RESET;
10111 case pci_channel_io_perm_failure:
10112
10113 lpfc_sli_prep_dev_for_perm_failure(phba);
10114 return PCI_ERS_RESULT_DISCONNECT;
10115 default:
10116
10117 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10118 "0472 Unknown PCI error state: x%x\n", state);
10119 lpfc_sli_prep_dev_for_reset(phba);
10120 return PCI_ERS_RESULT_NEED_RESET;
10121 }
10122}
10123
10124
10125
10126
10127
10128
10129
10130
10131
10132
10133
10134
10135
10136
10137
10138
10139
10140
10141
10142static pci_ers_result_t
10143lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10144{
10145 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10146 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10147 struct lpfc_sli *psli = &phba->sli;
10148 uint32_t intr_mode;
10149
10150 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10151 if (pci_enable_device_mem(pdev)) {
10152 printk(KERN_ERR "lpfc: Cannot re-enable "
10153 "PCI device after reset.\n");
10154 return PCI_ERS_RESULT_DISCONNECT;
10155 }
10156
10157 pci_restore_state(pdev);
10158
10159
10160
10161
10162
10163 pci_save_state(pdev);
10164
10165 if (pdev->is_busmaster)
10166 pci_set_master(pdev);
10167
10168 spin_lock_irq(&phba->hbalock);
10169 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10170 spin_unlock_irq(&phba->hbalock);
10171
10172
10173 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10174 if (intr_mode == LPFC_INTR_ERROR) {
10175 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10176 "0427 Cannot re-enable interrupt after "
10177 "slot reset.\n");
10178 return PCI_ERS_RESULT_DISCONNECT;
10179 } else
10180 phba->intr_mode = intr_mode;
10181
10182
10183 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
10184 lpfc_offline(phba);
10185 lpfc_sli_brdrestart(phba);
10186
10187
10188 lpfc_log_intr_mode(phba, phba->intr_mode);
10189
10190 return PCI_ERS_RESULT_RECOVERED;
10191}
10192
10193
10194
10195
10196
10197
10198
10199
10200
10201
10202
10203static void
10204lpfc_io_resume_s3(struct pci_dev *pdev)
10205{
10206 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10207 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10208
10209
10210 lpfc_online(phba);
10211
10212
10213 if (phba->hba_flag & HBA_AER_ENABLED)
10214 pci_cleanup_aer_uncorrect_error_status(pdev);
10215}
10216
10217
10218
10219
10220
10221
10222
10223int
10224lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
10225{
10226 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
10227
10228 if (phba->sli_rev == LPFC_SLI_REV4) {
10229 if (max_xri <= 100)
10230 return 10;
10231 else if (max_xri <= 256)
10232 return 25;
10233 else if (max_xri <= 512)
10234 return 50;
10235 else if (max_xri <= 1024)
10236 return 100;
10237 else if (max_xri <= 1536)
10238 return 150;
10239 else if (max_xri <= 2048)
10240 return 200;
10241 else
10242 return 250;
10243 } else
10244 return 0;
10245}
10246
10247
10248
10249
10250
10251
10252
10253static void
10254lpfc_write_firmware(const struct firmware *fw, void *context)
10255{
10256 struct lpfc_hba *phba = (struct lpfc_hba *)context;
10257 char fwrev[FW_REV_STR_SIZE];
10258 struct lpfc_grp_hdr *image;
10259 struct list_head dma_buffer_list;
10260 int i, rc = 0;
10261 struct lpfc_dmabuf *dmabuf, *next;
10262 uint32_t offset = 0, temp_offset = 0;
10263
10264
10265 if (!fw) {
10266 rc = -ENXIO;
10267 goto out;
10268 }
10269 image = (struct lpfc_grp_hdr *)fw->data;
10270
10271 INIT_LIST_HEAD(&dma_buffer_list);
10272 if ((be32_to_cpu(image->magic_number) != LPFC_GROUP_OJECT_MAGIC_NUM) ||
10273 (bf_get_be32(lpfc_grp_hdr_file_type, image) !=
10274 LPFC_FILE_TYPE_GROUP) ||
10275 (bf_get_be32(lpfc_grp_hdr_id, image) != LPFC_FILE_ID_GROUP) ||
10276 (be32_to_cpu(image->size) != fw->size)) {
10277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10278 "3022 Invalid FW image found. "
10279 "Magic:%x Type:%x ID:%x\n",
10280 be32_to_cpu(image->magic_number),
10281 bf_get_be32(lpfc_grp_hdr_file_type, image),
10282 bf_get_be32(lpfc_grp_hdr_id, image));
10283 rc = -EINVAL;
10284 goto release_out;
10285 }
10286 lpfc_decode_firmware_rev(phba, fwrev, 1);
10287 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
10288 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10289 "3023 Updating Firmware, Current Version:%s "
10290 "New Version:%s\n",
10291 fwrev, image->revision);
10292 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
10293 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
10294 GFP_KERNEL);
10295 if (!dmabuf) {
10296 rc = -ENOMEM;
10297 goto release_out;
10298 }
10299 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
10300 SLI4_PAGE_SIZE,
10301 &dmabuf->phys,
10302 GFP_KERNEL);
10303 if (!dmabuf->virt) {
10304 kfree(dmabuf);
10305 rc = -ENOMEM;
10306 goto release_out;
10307 }
10308 list_add_tail(&dmabuf->list, &dma_buffer_list);
10309 }
10310 while (offset < fw->size) {
10311 temp_offset = offset;
10312 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
10313 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
10314 memcpy(dmabuf->virt,
10315 fw->data + temp_offset,
10316 fw->size - temp_offset);
10317 temp_offset = fw->size;
10318 break;
10319 }
10320 memcpy(dmabuf->virt, fw->data + temp_offset,
10321 SLI4_PAGE_SIZE);
10322 temp_offset += SLI4_PAGE_SIZE;
10323 }
10324 rc = lpfc_wr_object(phba, &dma_buffer_list,
10325 (fw->size - offset), &offset);
10326 if (rc)
10327 goto release_out;
10328 }
10329 rc = offset;
10330 }
10331
10332release_out:
10333 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
10334 list_del(&dmabuf->list);
10335 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
10336 dmabuf->virt, dmabuf->phys);
10337 kfree(dmabuf);
10338 }
10339 release_firmware(fw);
10340out:
10341 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10342 "3024 Firmware update done: %d.\n", rc);
10343 return;
10344}
10345
10346
10347
10348
10349
10350
10351
10352
10353int
10354lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
10355{
10356 uint8_t file_name[ELX_MODEL_NAME_SIZE];
10357 int ret;
10358 const struct firmware *fw;
10359
10360
10361 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
10362 LPFC_SLI_INTF_IF_TYPE_2)
10363 return -EPERM;
10364
10365 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
10366
10367 if (fw_upgrade == INT_FW_UPGRADE) {
10368 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
10369 file_name, &phba->pcidev->dev,
10370 GFP_KERNEL, (void *)phba,
10371 lpfc_write_firmware);
10372 } else if (fw_upgrade == RUN_FW_UPGRADE) {
10373 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
10374 if (!ret)
10375 lpfc_write_firmware(fw, (void *)phba);
10376 } else {
10377 ret = -EINVAL;
10378 }
10379
10380 return ret;
10381}
10382
10383
10384
10385
10386
10387
10388
10389
10390
10391
10392
10393
10394
10395
10396
10397
10398
10399
10400
10401static int
10402lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
10403{
10404 struct lpfc_hba *phba;
10405 struct lpfc_vport *vport = NULL;
10406 struct Scsi_Host *shost = NULL;
10407 int error;
10408 uint32_t cfg_mode, intr_mode;
10409 int adjusted_fcp_io_channel;
10410
10411
10412 phba = lpfc_hba_alloc(pdev);
10413 if (!phba)
10414 return -ENOMEM;
10415
10416
10417 error = lpfc_enable_pci_dev(phba);
10418 if (error)
10419 goto out_free_phba;
10420
10421
10422 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
10423 if (error)
10424 goto out_disable_pci_dev;
10425
10426
10427 error = lpfc_sli4_pci_mem_setup(phba);
10428 if (error) {
10429 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10430 "1410 Failed to set up pci memory space.\n");
10431 goto out_disable_pci_dev;
10432 }
10433
10434
10435 error = lpfc_setup_driver_resource_phase1(phba);
10436 if (error) {
10437 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10438 "1411 Failed to set up driver resource.\n");
10439 goto out_unset_pci_mem_s4;
10440 }
10441
10442
10443 error = lpfc_sli4_driver_resource_setup(phba);
10444 if (error) {
10445 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10446 "1412 Failed to set up driver resource.\n");
10447 goto out_unset_pci_mem_s4;
10448 }
10449
10450
10451
10452 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10453 "2821 initialize iocb list %d.\n",
10454 phba->cfg_iocb_cnt*1024);
10455 error = lpfc_init_iocb_list(phba, phba->cfg_iocb_cnt*1024);
10456
10457 if (error) {
10458 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10459 "1413 Failed to initialize iocb list.\n");
10460 goto out_unset_driver_resource_s4;
10461 }
10462
10463 INIT_LIST_HEAD(&phba->active_rrq_list);
10464 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
10465
10466
10467 error = lpfc_setup_driver_resource_phase2(phba);
10468 if (error) {
10469 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10470 "1414 Failed to set up driver resource.\n");
10471 goto out_free_iocb_list;
10472 }
10473
10474
10475 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10476
10477
10478 error = lpfc_create_shost(phba);
10479 if (error) {
10480 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10481 "1415 Failed to create scsi host.\n");
10482 goto out_unset_driver_resource;
10483 }
10484
10485
10486 vport = phba->pport;
10487 error = lpfc_alloc_sysfs_attr(vport);
10488 if (error) {
10489 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10490 "1416 Failed to allocate sysfs attr\n");
10491 goto out_destroy_shost;
10492 }
10493
10494 shost = lpfc_shost_from_vport(vport);
10495
10496 cfg_mode = phba->cfg_use_msi;
10497
10498
10499 lpfc_stop_port(phba);
10500
10501 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
10502 if (intr_mode == LPFC_INTR_ERROR) {
10503 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10504 "0426 Failed to enable interrupt.\n");
10505 error = -ENODEV;
10506 goto out_free_sysfs_attr;
10507 }
10508
10509 if (phba->intr_type != MSIX)
10510 adjusted_fcp_io_channel = 1;
10511 else
10512 adjusted_fcp_io_channel = phba->cfg_fcp_io_channel;
10513 phba->cfg_fcp_io_channel = adjusted_fcp_io_channel;
10514
10515 if (lpfc_sli4_hba_setup(phba)) {
10516 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10517 "1421 Failed to set up hba\n");
10518 error = -ENODEV;
10519 goto out_disable_intr;
10520 }
10521
10522
10523 phba->intr_mode = intr_mode;
10524 lpfc_log_intr_mode(phba, intr_mode);
10525
10526
10527 lpfc_post_init_setup(phba);
10528
10529
10530 if (phba->cfg_request_firmware_upgrade)
10531 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
10532
10533
10534 lpfc_create_static_vport(phba);
10535 return 0;
10536
10537out_disable_intr:
10538 lpfc_sli4_disable_intr(phba);
10539out_free_sysfs_attr:
10540 lpfc_free_sysfs_attr(vport);
10541out_destroy_shost:
10542 lpfc_destroy_shost(phba);
10543out_unset_driver_resource:
10544 lpfc_unset_driver_resource_phase2(phba);
10545out_free_iocb_list:
10546 lpfc_free_iocb_list(phba);
10547out_unset_driver_resource_s4:
10548 lpfc_sli4_driver_resource_unset(phba);
10549out_unset_pci_mem_s4:
10550 lpfc_sli4_pci_mem_unset(phba);
10551out_disable_pci_dev:
10552 lpfc_disable_pci_dev(phba);
10553 if (shost)
10554 scsi_host_put(shost);
10555out_free_phba:
10556 lpfc_hba_free(phba);
10557 return error;
10558}
10559
10560
10561
10562
10563
10564
10565
10566
10567
10568
10569static void
10570lpfc_pci_remove_one_s4(struct pci_dev *pdev)
10571{
10572 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10573 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10574 struct lpfc_vport **vports;
10575 struct lpfc_hba *phba = vport->phba;
10576 int i;
10577
10578
10579 spin_lock_irq(&phba->hbalock);
10580 vport->load_flag |= FC_UNLOADING;
10581 spin_unlock_irq(&phba->hbalock);
10582
10583
10584 lpfc_free_sysfs_attr(vport);
10585
10586
10587 vports = lpfc_create_vport_work_array(phba);
10588 if (vports != NULL)
10589 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10590 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10591 continue;
10592 fc_vport_terminate(vports[i]->fc_vport);
10593 }
10594 lpfc_destroy_vport_work_array(phba, vports);
10595
10596
10597 fc_remove_host(shost);
10598 scsi_remove_host(shost);
10599
10600
10601 lpfc_cleanup(vport);
10602
10603
10604
10605
10606
10607
10608 lpfc_debugfs_terminate(vport);
10609 lpfc_sli4_hba_unset(phba);
10610
10611 spin_lock_irq(&phba->hbalock);
10612 list_del_init(&vport->listentry);
10613 spin_unlock_irq(&phba->hbalock);
10614
10615
10616
10617
10618 lpfc_scsi_free(phba);
10619
10620 lpfc_sli4_driver_resource_unset(phba);
10621
10622
10623 lpfc_sli4_pci_mem_unset(phba);
10624
10625
10626 scsi_host_put(shost);
10627 lpfc_disable_pci_dev(phba);
10628
10629
10630 lpfc_hba_free(phba);
10631
10632 return;
10633}
10634
10635
10636
10637
10638
10639
10640
10641
10642
10643
10644
10645
10646
10647
10648
10649
10650
10651
10652
10653
10654
10655
10656static int
10657lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
10658{
10659 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10660 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10661
10662 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10663 "2843 PCI device Power Management suspend.\n");
10664
10665
10666 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
10667 lpfc_offline(phba);
10668 kthread_stop(phba->worker_thread);
10669
10670
10671 lpfc_sli4_disable_intr(phba);
10672 lpfc_sli4_queue_destroy(phba);
10673
10674
10675 pci_save_state(pdev);
10676 pci_set_power_state(pdev, PCI_D3hot);
10677
10678 return 0;
10679}
10680
10681
10682
10683
10684
10685
10686
10687
10688
10689
10690
10691
10692
10693
10694
10695
10696
10697
10698
10699
10700static int
10701lpfc_pci_resume_one_s4(struct pci_dev *pdev)
10702{
10703 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10704 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10705 uint32_t intr_mode;
10706 int error;
10707
10708 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10709 "0292 PCI device Power Management resume.\n");
10710
10711
10712 pci_set_power_state(pdev, PCI_D0);
10713 pci_restore_state(pdev);
10714
10715
10716
10717
10718
10719 pci_save_state(pdev);
10720
10721 if (pdev->is_busmaster)
10722 pci_set_master(pdev);
10723
10724
10725 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10726 "lpfc_worker_%d", phba->brd_no);
10727 if (IS_ERR(phba->worker_thread)) {
10728 error = PTR_ERR(phba->worker_thread);
10729 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10730 "0293 PM resume failed to start worker "
10731 "thread: error=x%x.\n", error);
10732 return error;
10733 }
10734
10735
10736 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
10737 if (intr_mode == LPFC_INTR_ERROR) {
10738 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10739 "0294 PM resume Failed to enable interrupt\n");
10740 return -EIO;
10741 } else
10742 phba->intr_mode = intr_mode;
10743
10744
10745 lpfc_sli_brdrestart(phba);
10746 lpfc_online(phba);
10747
10748
10749 lpfc_log_intr_mode(phba, phba->intr_mode);
10750
10751 return 0;
10752}
10753
10754
10755
10756
10757
10758
10759
10760
10761static void
10762lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
10763{
10764 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10765 "2828 PCI channel I/O abort preparing for recovery\n");
10766
10767
10768
10769
10770 lpfc_sli_abort_fcp_rings(phba);
10771}
10772
10773
10774
10775
10776
10777
10778
10779
10780
10781static void
10782lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
10783{
10784 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10785 "2826 PCI channel disable preparing for reset\n");
10786
10787
10788 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
10789
10790
10791 lpfc_scsi_dev_block(phba);
10792
10793
10794 lpfc_sli_flush_fcp_rings(phba);
10795
10796
10797 lpfc_stop_hba_timers(phba);
10798
10799
10800 lpfc_sli4_disable_intr(phba);
10801 lpfc_sli4_queue_destroy(phba);
10802 pci_disable_device(phba->pcidev);
10803}
10804
10805
10806
10807
10808
10809
10810
10811
10812
10813static void
10814lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
10815{
10816 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10817 "2827 PCI channel permanent disable for failure\n");
10818
10819
10820 lpfc_scsi_dev_block(phba);
10821
10822
10823 lpfc_stop_hba_timers(phba);
10824
10825
10826 lpfc_sli_flush_fcp_rings(phba);
10827}
10828
10829
10830
10831
10832
10833
10834
10835
10836
10837
10838
10839
10840
10841
10842
10843
10844
10845static pci_ers_result_t
10846lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
10847{
10848 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10849 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10850
10851 switch (state) {
10852 case pci_channel_io_normal:
10853
10854 lpfc_sli4_prep_dev_for_recover(phba);
10855 return PCI_ERS_RESULT_CAN_RECOVER;
10856 case pci_channel_io_frozen:
10857
10858 lpfc_sli4_prep_dev_for_reset(phba);
10859 return PCI_ERS_RESULT_NEED_RESET;
10860 case pci_channel_io_perm_failure:
10861
10862 lpfc_sli4_prep_dev_for_perm_failure(phba);
10863 return PCI_ERS_RESULT_DISCONNECT;
10864 default:
10865
10866 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10867 "2825 Unknown PCI error state: x%x\n", state);
10868 lpfc_sli4_prep_dev_for_reset(phba);
10869 return PCI_ERS_RESULT_NEED_RESET;
10870 }
10871}
10872
10873
10874
10875
10876
10877
10878
10879
10880
10881
10882
10883
10884
10885
10886
10887
10888
10889
10890
10891static pci_ers_result_t
10892lpfc_io_slot_reset_s4(struct pci_dev *pdev)
10893{
10894 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10895 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10896 struct lpfc_sli *psli = &phba->sli;
10897 uint32_t intr_mode;
10898
10899 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10900 if (pci_enable_device_mem(pdev)) {
10901 printk(KERN_ERR "lpfc: Cannot re-enable "
10902 "PCI device after reset.\n");
10903 return PCI_ERS_RESULT_DISCONNECT;
10904 }
10905
10906 pci_restore_state(pdev);
10907
10908
10909
10910
10911
10912 pci_save_state(pdev);
10913
10914 if (pdev->is_busmaster)
10915 pci_set_master(pdev);
10916
10917 spin_lock_irq(&phba->hbalock);
10918 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10919 spin_unlock_irq(&phba->hbalock);
10920
10921
10922 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
10923 if (intr_mode == LPFC_INTR_ERROR) {
10924 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10925 "2824 Cannot re-enable interrupt after "
10926 "slot reset.\n");
10927 return PCI_ERS_RESULT_DISCONNECT;
10928 } else
10929 phba->intr_mode = intr_mode;
10930
10931
10932 lpfc_log_intr_mode(phba, phba->intr_mode);
10933
10934 return PCI_ERS_RESULT_RECOVERED;
10935}
10936
10937
10938
10939
10940
10941
10942
10943
10944
10945
10946
10947static void
10948lpfc_io_resume_s4(struct pci_dev *pdev)
10949{
10950 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10951 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10952
10953
10954
10955
10956
10957
10958
10959 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
10960
10961 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
10962 lpfc_offline(phba);
10963 lpfc_sli_brdrestart(phba);
10964
10965 lpfc_online(phba);
10966 }
10967
10968
10969 if (phba->hba_flag & HBA_AER_ENABLED)
10970 pci_cleanup_aer_uncorrect_error_status(pdev);
10971}
10972
10973
10974
10975
10976
10977
10978
10979
10980
10981
10982
10983
10984
10985
10986
10987
10988
10989
10990
10991static int
10992lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
10993{
10994 int rc;
10995 struct lpfc_sli_intf intf;
10996
10997 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
10998 return -ENODEV;
10999
11000 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
11001 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
11002 rc = lpfc_pci_probe_one_s4(pdev, pid);
11003 else
11004 rc = lpfc_pci_probe_one_s3(pdev, pid);
11005
11006 return rc;
11007}
11008
11009
11010
11011
11012
11013
11014
11015
11016
11017
11018
11019static void
11020lpfc_pci_remove_one(struct pci_dev *pdev)
11021{
11022 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11023 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11024
11025 switch (phba->pci_dev_grp) {
11026 case LPFC_PCI_DEV_LP:
11027 lpfc_pci_remove_one_s3(pdev);
11028 break;
11029 case LPFC_PCI_DEV_OC:
11030 lpfc_pci_remove_one_s4(pdev);
11031 break;
11032 default:
11033 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11034 "1424 Invalid PCI device group: 0x%x\n",
11035 phba->pci_dev_grp);
11036 break;
11037 }
11038 return;
11039}
11040
11041
11042
11043
11044
11045
11046
11047
11048
11049
11050
11051
11052
11053
11054
11055static int
11056lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11057{
11058 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11059 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11060 int rc = -ENODEV;
11061
11062 switch (phba->pci_dev_grp) {
11063 case LPFC_PCI_DEV_LP:
11064 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11065 break;
11066 case LPFC_PCI_DEV_OC:
11067 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11068 break;
11069 default:
11070 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11071 "1425 Invalid PCI device group: 0x%x\n",
11072 phba->pci_dev_grp);
11073 break;
11074 }
11075 return rc;
11076}
11077
11078
11079
11080
11081
11082
11083
11084
11085
11086
11087
11088
11089
11090
11091static int
11092lpfc_pci_resume_one(struct pci_dev *pdev)
11093{
11094 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11095 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11096 int rc = -ENODEV;
11097
11098 switch (phba->pci_dev_grp) {
11099 case LPFC_PCI_DEV_LP:
11100 rc = lpfc_pci_resume_one_s3(pdev);
11101 break;
11102 case LPFC_PCI_DEV_OC:
11103 rc = lpfc_pci_resume_one_s4(pdev);
11104 break;
11105 default:
11106 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11107 "1426 Invalid PCI device group: 0x%x\n",
11108 phba->pci_dev_grp);
11109 break;
11110 }
11111 return rc;
11112}
11113
11114
11115
11116
11117
11118
11119
11120
11121
11122
11123
11124
11125
11126
11127
11128
11129static pci_ers_result_t
11130lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11131{
11132 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11133 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11134 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11135
11136 switch (phba->pci_dev_grp) {
11137 case LPFC_PCI_DEV_LP:
11138 rc = lpfc_io_error_detected_s3(pdev, state);
11139 break;
11140 case LPFC_PCI_DEV_OC:
11141 rc = lpfc_io_error_detected_s4(pdev, state);
11142 break;
11143 default:
11144 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11145 "1427 Invalid PCI device group: 0x%x\n",
11146 phba->pci_dev_grp);
11147 break;
11148 }
11149 return rc;
11150}
11151
11152
11153
11154
11155
11156
11157
11158
11159
11160
11161
11162
11163
11164
11165
11166static pci_ers_result_t
11167lpfc_io_slot_reset(struct pci_dev *pdev)
11168{
11169 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11170 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11171 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11172
11173 switch (phba->pci_dev_grp) {
11174 case LPFC_PCI_DEV_LP:
11175 rc = lpfc_io_slot_reset_s3(pdev);
11176 break;
11177 case LPFC_PCI_DEV_OC:
11178 rc = lpfc_io_slot_reset_s4(pdev);
11179 break;
11180 default:
11181 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11182 "1428 Invalid PCI device group: 0x%x\n",
11183 phba->pci_dev_grp);
11184 break;
11185 }
11186 return rc;
11187}
11188
11189
11190
11191
11192
11193
11194
11195
11196
11197
11198
11199static void
11200lpfc_io_resume(struct pci_dev *pdev)
11201{
11202 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11203 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11204
11205 switch (phba->pci_dev_grp) {
11206 case LPFC_PCI_DEV_LP:
11207 lpfc_io_resume_s3(pdev);
11208 break;
11209 case LPFC_PCI_DEV_OC:
11210 lpfc_io_resume_s4(pdev);
11211 break;
11212 default:
11213 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11214 "1429 Invalid PCI device group: 0x%x\n",
11215 phba->pci_dev_grp);
11216 break;
11217 }
11218 return;
11219}
11220
11221
11222
11223
11224
11225
11226
11227
11228
11229
11230
11231void
11232lpfc_sli4_oas_verify(struct lpfc_hba *phba)
11233{
11234
11235 if (!phba->cfg_EnableXLane)
11236 return;
11237
11238 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
11239 phba->cfg_fof = 1;
11240 } else {
11241 phba->cfg_fof = 0;
11242 if (phba->device_data_mem_pool)
11243 mempool_destroy(phba->device_data_mem_pool);
11244 phba->device_data_mem_pool = NULL;
11245 }
11246
11247 return;
11248}
11249
11250
11251
11252
11253
11254
11255
11256
11257
11258
11259
11260
11261int
11262lpfc_fof_queue_setup(struct lpfc_hba *phba)
11263{
11264 struct lpfc_sli *psli = &phba->sli;
11265 int rc;
11266
11267 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
11268 if (rc)
11269 return -ENOMEM;
11270
11271 if (phba->cfg_fof) {
11272
11273 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
11274 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
11275 if (rc)
11276 goto out_oas_cq;
11277
11278 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
11279 phba->sli4_hba.oas_cq, LPFC_FCP);
11280 if (rc)
11281 goto out_oas_wq;
11282
11283 phba->sli4_hba.oas_cq->pring = &psli->ring[LPFC_FCP_OAS_RING];
11284 phba->sli4_hba.oas_ring = &psli->ring[LPFC_FCP_OAS_RING];
11285 }
11286
11287 return 0;
11288
11289out_oas_wq:
11290 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
11291out_oas_cq:
11292 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
11293 return rc;
11294
11295}
11296
11297
11298
11299
11300
11301
11302
11303
11304
11305
11306
11307
11308
11309
11310
11311int
11312lpfc_fof_queue_create(struct lpfc_hba *phba)
11313{
11314 struct lpfc_queue *qdesc;
11315
11316
11317 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
11318 phba->sli4_hba.eq_ecount);
11319 if (!qdesc)
11320 goto out_error;
11321
11322 phba->sli4_hba.fof_eq = qdesc;
11323
11324 if (phba->cfg_fof) {
11325
11326
11327 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
11328 phba->sli4_hba.cq_ecount);
11329 if (!qdesc)
11330 goto out_error;
11331
11332 phba->sli4_hba.oas_cq = qdesc;
11333
11334
11335 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
11336 phba->sli4_hba.wq_ecount);
11337 if (!qdesc)
11338 goto out_error;
11339
11340 phba->sli4_hba.oas_wq = qdesc;
11341
11342 }
11343 return 0;
11344
11345out_error:
11346 lpfc_fof_queue_destroy(phba);
11347 return -ENOMEM;
11348}
11349
11350
11351
11352
11353
11354
11355
11356
11357
11358
11359
11360int
11361lpfc_fof_queue_destroy(struct lpfc_hba *phba)
11362{
11363
11364 if (phba->sli4_hba.fof_eq != NULL) {
11365 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
11366 phba->sli4_hba.fof_eq = NULL;
11367 }
11368
11369
11370 if (phba->sli4_hba.oas_cq != NULL) {
11371 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
11372 phba->sli4_hba.oas_cq = NULL;
11373 }
11374
11375
11376 if (phba->sli4_hba.oas_wq != NULL) {
11377 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
11378 phba->sli4_hba.oas_wq = NULL;
11379 }
11380 return 0;
11381}
11382
11383MODULE_DEVICE_TABLE(pci, lpfc_id_table);
11384
11385static const struct pci_error_handlers lpfc_err_handler = {
11386 .error_detected = lpfc_io_error_detected,
11387 .slot_reset = lpfc_io_slot_reset,
11388 .resume = lpfc_io_resume,
11389};
11390
11391static struct pci_driver lpfc_driver = {
11392 .name = LPFC_DRIVER_NAME,
11393 .id_table = lpfc_id_table,
11394 .probe = lpfc_pci_probe_one,
11395 .remove = lpfc_pci_remove_one,
11396 .suspend = lpfc_pci_suspend_one,
11397 .resume = lpfc_pci_resume_one,
11398 .err_handler = &lpfc_err_handler,
11399};
11400
11401static const struct file_operations lpfc_mgmt_fop = {
11402 .owner = THIS_MODULE,
11403};
11404
11405static struct miscdevice lpfc_mgmt_dev = {
11406 .minor = MISC_DYNAMIC_MINOR,
11407 .name = "lpfcmgmt",
11408 .fops = &lpfc_mgmt_fop,
11409};
11410
11411
11412
11413
11414
11415
11416
11417
11418
11419
11420
11421
11422
11423static int __init
11424lpfc_init(void)
11425{
11426 int cpu;
11427 int error = 0;
11428
11429 printk(LPFC_MODULE_DESC "\n");
11430 printk(LPFC_COPYRIGHT "\n");
11431
11432 error = misc_register(&lpfc_mgmt_dev);
11433 if (error)
11434 printk(KERN_ERR "Could not register lpfcmgmt device, "
11435 "misc_register returned with status %d", error);
11436
11437 lpfc_transport_functions.vport_create = lpfc_vport_create;
11438 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
11439 lpfc_transport_template =
11440 fc_attach_transport(&lpfc_transport_functions);
11441 if (lpfc_transport_template == NULL)
11442 return -ENOMEM;
11443 lpfc_vport_transport_template =
11444 fc_attach_transport(&lpfc_vport_transport_functions);
11445 if (lpfc_vport_transport_template == NULL) {
11446 fc_release_transport(lpfc_transport_template);
11447 return -ENOMEM;
11448 }
11449
11450
11451 lpfc_used_cpu = NULL;
11452 lpfc_present_cpu = 0;
11453 for_each_present_cpu(cpu)
11454 lpfc_present_cpu++;
11455
11456 error = pci_register_driver(&lpfc_driver);
11457 if (error) {
11458 fc_release_transport(lpfc_transport_template);
11459 fc_release_transport(lpfc_vport_transport_template);
11460 }
11461
11462 return error;
11463}
11464
11465
11466
11467
11468
11469
11470
11471
11472static void __exit
11473lpfc_exit(void)
11474{
11475 misc_deregister(&lpfc_mgmt_dev);
11476 pci_unregister_driver(&lpfc_driver);
11477 fc_release_transport(lpfc_transport_template);
11478 fc_release_transport(lpfc_vport_transport_template);
11479 if (_dump_buf_data) {
11480 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
11481 "_dump_buf_data at 0x%p\n",
11482 (1L << _dump_buf_data_order), _dump_buf_data);
11483 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
11484 }
11485
11486 if (_dump_buf_dif) {
11487 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
11488 "_dump_buf_dif at 0x%p\n",
11489 (1L << _dump_buf_dif_order), _dump_buf_dif);
11490 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
11491 }
11492 kfree(lpfc_used_cpu);
11493 idr_destroy(&lpfc_hba_index);
11494}
11495
11496module_init(lpfc_init);
11497module_exit(lpfc_exit);
11498MODULE_LICENSE("GPL");
11499MODULE_DESCRIPTION(LPFC_MODULE_DESC);
11500MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
11501MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
11502