1/****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20#ifndef __RTL8712_CMDCTRL_BITDEF_H__ 21#define __RTL8712_CMDCTRL_BITDEF_H__ 22 23/* 24 * 2. Command Control Registers (Offset: 0x0040 - 0x004F) 25 */ 26/*--------------------------------------------------------------------------*/ 27/* 8192S (CMD) command register bits (Offset 0x40, 16 bits)*/ 28/*--------------------------------------------------------------------------*/ 29#define _APSDOFF_STATUS BIT(15) 30#define _APSDOFF BIT(14) 31#define _BBRSTn BIT(13) /*Enable OFDM/CCK*/ 32#define _BB_GLB_RSTn BIT(12) /*Enable BB*/ 33#define _SCHEDULE_EN BIT(10) /*Enable MAC scheduler*/ 34#define _MACRXEN BIT(9) 35#define _MACTXEN BIT(8) 36#define _DDMA_EN BIT(7) /*FW off load function enable*/ 37#define _FW2HW_EN BIT(6) /*MAC every module reset */ 38#define _RXDMA_EN BIT(5) 39#define _TXDMA_EN BIT(4) 40#define _HCI_RXDMA_EN BIT(3) 41#define _HCI_TXDMA_EN BIT(2) 42 43/*TXPAUSE*/ 44#define _STOPHCCA BIT(6) 45#define _STOPHIGH BIT(5) 46#define _STOPMGT BIT(4) 47#define _STOPVO BIT(3) 48#define _STOPVI BIT(2) 49#define _STOPBE BIT(1) 50#define _STOPBK BIT(0) 51 52/*TCR*/ 53#define _DISCW BIT(20) 54#define _ICV BIT(19) 55#define _CFEND_FMT BIT(17) 56#define _CRC BIT(16) 57#define _FWRDY BIT(7) 58#define _BASECHG BIT(6) 59#define _IMEM_RDY BIT(5) 60#define _DMEM_CODE_DONE BIT(4) 61#define _EMEM_CHK_RPT BIT(3) 62#define _EMEM_CODE_DONE BIT(2) 63#define _IMEM_CHK_RPT BIT(1) 64#define _IMEM_CODE_DONE BIT(0) 65 66#define _TXDMA_INIT_VALUE (_IMEM_CHK_RPT|_EMEM_CHK_RPT) 67 68/*RCR*/ 69#define _ENMBID BIT(27) 70#define _APP_PHYST_RXFF BIT(25) 71#define _APP_PHYST_STAFF BIT(24) 72#define _CBSSID BIT(23) 73#define _APWRMGT BIT(22) 74#define _ADD3 BIT(21) 75#define _AMF BIT(20) 76#define _ACF BIT(19) 77#define _ADF BIT(18) 78#define _APP_MIC BIT(17) 79#define _APP_ICV BIT(16) 80#define _RXFTH_MSK 0x0000E000 81#define _RXFTH_SHT 13 82#define _AICV BIT(12) 83#define _RXPKTLMT_MSK 0x00000FC0 84#define _RXPKTLMT_SHT 6 85#define _ACRC32 BIT(5) 86#define _AB BIT(3) 87#define _AM BIT(2) 88#define _APM BIT(1) 89#define _AAP BIT(0) 90 91/*MSR*/ 92#define _NETTYPE_MSK 0x03 93#define _NETTYPE_SHT 0 94 95/*BT*/ 96#define _BTMODE_MSK 0x06 97#define _BTMODE_SHT 1 98#define _ENBT BIT(0) 99 100/*MBIDCTRL*/ 101#define _ENMBID_MODE BIT(15) 102#define _BCNNO_MSK 0x7000 103#define _BCNNO_SHT 12 104#define _BCNSPACE_MSK 0x0FFF 105#define _BCNSPACE_SHT 0 106 107 108#endif /* __RTL8712_CMDCTRL_BITDEF_H__*/ 109 110