1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39#include "device.h"
40#include "card.h"
41#include "baseband.h"
42#include "mac.h"
43#include "desc.h"
44#include "rf.h"
45#include "power.h"
46#include "key.h"
47#include "usbpipe.h"
48
49
50
51
52
53static const u16 cw_rxbcntsf_off[MAX_RATE] = {
54 192, 96, 34, 17, 34, 23, 17, 11, 8, 5, 4, 3
55};
56
57
58
59
60
61
62
63
64
65
66
67void vnt_set_channel(struct vnt_private *priv, u32 connection_channel)
68{
69 if (connection_channel > CB_MAX_CHANNEL || !connection_channel)
70 return;
71
72
73 vnt_mac_reg_bits_on(priv, MAC_REG_MACCR, MACCR_CLRNAV);
74
75
76 vnt_mac_reg_bits_off(priv, MAC_REG_CHANNEL, 0xb0);
77
78 vnt_control_out(priv, MESSAGE_TYPE_SELECT_CHANNEL,
79 connection_channel, 0, 0, NULL);
80
81 vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG, MAC_REG_CHANNEL,
82 (u8)(connection_channel | 0x80));
83}
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98static u16 vnt_get_cck_rate(struct vnt_private *priv, u16 rate_idx)
99{
100 u16 ui = rate_idx;
101
102 while (ui > RATE_1M) {
103 if (priv->basic_rates & (1 << ui))
104 return ui;
105 ui--;
106 }
107
108 return RATE_1M;
109}
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124static u16 vnt_get_ofdm_rate(struct vnt_private *priv, u16 rate_idx)
125{
126 u16 ui = rate_idx;
127
128 dev_dbg(&priv->usb->dev, "%s basic rate: %d\n",
129 __func__, priv->basic_rates);
130
131 if (!vnt_ofdm_min_rate(priv)) {
132 dev_dbg(&priv->usb->dev, "%s (NO OFDM) %d\n",
133 __func__, rate_idx);
134 if (rate_idx > RATE_24M)
135 rate_idx = RATE_24M;
136 return rate_idx;
137 }
138
139 while (ui > RATE_11M) {
140 if (priv->basic_rates & (1 << ui)) {
141 dev_dbg(&priv->usb->dev, "%s rate: %d\n",
142 __func__, ui);
143 return ui;
144 }
145 ui--;
146 }
147
148 dev_dbg(&priv->usb->dev, "%s basic rate: 24M\n", __func__);
149
150 return RATE_24M;
151}
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167static void vnt_calculate_ofdm_rate(u16 rate, u8 bb_type,
168 u8 *tx_rate, u8 *rsv_time)
169{
170 switch (rate) {
171 case RATE_6M:
172 if (bb_type == BB_TYPE_11A) {
173 *tx_rate = 0x9b;
174 *rsv_time = 24;
175 } else {
176 *tx_rate = 0x8b;
177 *rsv_time = 30;
178 }
179 break;
180 case RATE_9M:
181 if (bb_type == BB_TYPE_11A) {
182 *tx_rate = 0x9f;
183 *rsv_time = 16;
184 } else {
185 *tx_rate = 0x8f;
186 *rsv_time = 22;
187 }
188 break;
189 case RATE_12M:
190 if (bb_type == BB_TYPE_11A) {
191 *tx_rate = 0x9a;
192 *rsv_time = 12;
193 } else {
194 *tx_rate = 0x8a;
195 *rsv_time = 18;
196 }
197 break;
198 case RATE_18M:
199 if (bb_type == BB_TYPE_11A) {
200 *tx_rate = 0x9e;
201 *rsv_time = 8;
202 } else {
203 *tx_rate = 0x8e;
204 *rsv_time = 14;
205 }
206 break;
207 case RATE_36M:
208 if (bb_type == BB_TYPE_11A) {
209 *tx_rate = 0x9d;
210 *rsv_time = 4;
211 } else {
212 *tx_rate = 0x8d;
213 *rsv_time = 10;
214 }
215 break;
216 case RATE_48M:
217 if (bb_type == BB_TYPE_11A) {
218 *tx_rate = 0x98;
219 *rsv_time = 4;
220 } else {
221 *tx_rate = 0x88;
222 *rsv_time = 10;
223 }
224 break;
225 case RATE_54M:
226 if (bb_type == BB_TYPE_11A) {
227 *tx_rate = 0x9c;
228 *rsv_time = 4;
229 } else {
230 *tx_rate = 0x8c;
231 *rsv_time = 10;
232 }
233 break;
234 case RATE_24M:
235 default:
236 if (bb_type == BB_TYPE_11A) {
237 *tx_rate = 0x99;
238 *rsv_time = 8;
239 } else {
240 *tx_rate = 0x89;
241 *rsv_time = 14;
242 }
243 break;
244 }
245}
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260void vnt_set_rspinf(struct vnt_private *priv, u8 bb_type)
261{
262 struct vnt_phy_field phy[4];
263 u8 tx_rate[9] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
264 u8 rsv_time[9] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
265 u8 data[34];
266 int i;
267
268
269 vnt_get_phy_field(priv, 14, vnt_get_cck_rate(priv, RATE_1M),
270 PK_TYPE_11B, &phy[0]);
271
272
273 vnt_get_phy_field(priv, 14, vnt_get_cck_rate(priv, RATE_2M),
274 PK_TYPE_11B, &phy[1]);
275
276
277 vnt_get_phy_field(priv, 14, vnt_get_cck_rate(priv, RATE_5M),
278 PK_TYPE_11B, &phy[2]);
279
280
281 vnt_get_phy_field(priv, 14, vnt_get_cck_rate(priv, RATE_11M),
282 PK_TYPE_11B, &phy[3]);
283
284
285 vnt_calculate_ofdm_rate(RATE_6M, bb_type, &tx_rate[0], &rsv_time[0]);
286
287
288 vnt_calculate_ofdm_rate(RATE_9M, bb_type, &tx_rate[1], &rsv_time[1]);
289
290
291 vnt_calculate_ofdm_rate(RATE_12M, bb_type, &tx_rate[2], &rsv_time[2]);
292
293
294 vnt_calculate_ofdm_rate(RATE_18M, bb_type, &tx_rate[3], &rsv_time[3]);
295
296
297 vnt_calculate_ofdm_rate(RATE_24M, bb_type, &tx_rate[4], &rsv_time[4]);
298
299
300 vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_36M),
301 bb_type, &tx_rate[5], &rsv_time[5]);
302
303
304 vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_48M),
305 bb_type, &tx_rate[6], &rsv_time[6]);
306
307
308 vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_54M),
309 bb_type, &tx_rate[7], &rsv_time[7]);
310
311
312 vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_54M),
313 bb_type, &tx_rate[8], &rsv_time[8]);
314
315 put_unaligned(phy[0].len, (u16 *)&data[0]);
316 data[2] = phy[0].signal;
317 data[3] = phy[0].service;
318
319 put_unaligned(phy[1].len, (u16 *)&data[4]);
320 data[6] = phy[1].signal;
321 data[7] = phy[1].service;
322
323 put_unaligned(phy[2].len, (u16 *)&data[8]);
324 data[10] = phy[2].signal;
325 data[11] = phy[2].service;
326
327 put_unaligned(phy[3].len, (u16 *)&data[12]);
328 data[14] = phy[3].signal;
329 data[15] = phy[3].service;
330
331 for (i = 0; i < 9; i++) {
332 data[16 + i * 2] = tx_rate[i];
333 data[16 + i * 2 + 1] = rsv_time[i];
334 }
335
336 vnt_control_out(priv, MESSAGE_TYPE_WRITE, MAC_REG_RSPINF_B_1,
337 MESSAGE_REQUEST_MACREG, 34, &data[0]);
338}
339
340
341
342
343
344
345
346
347
348
349
350
351
352void vnt_update_ifs(struct vnt_private *priv)
353{
354 u8 max_min = 0;
355 u8 data[4];
356
357 if (priv->packet_type == PK_TYPE_11A) {
358 priv->slot = C_SLOT_SHORT;
359 priv->sifs = C_SIFS_A;
360 priv->difs = C_SIFS_A + 2 * C_SLOT_SHORT;
361 max_min = 4;
362 } else if (priv->packet_type == PK_TYPE_11B) {
363 priv->slot = C_SLOT_LONG;
364 priv->sifs = C_SIFS_BG;
365 priv->difs = C_SIFS_BG + 2 * C_SLOT_LONG;
366 max_min = 5;
367 } else {
368 bool ofdm_rate = false;
369 unsigned int ii = 0;
370
371 priv->sifs = C_SIFS_BG;
372
373 if (priv->short_slot_time)
374 priv->slot = C_SLOT_SHORT;
375 else
376 priv->slot = C_SLOT_LONG;
377
378 priv->difs = C_SIFS_BG + 2 * priv->slot;
379
380 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
381 if (priv->basic_rates & ((u32)(0x1 << ii))) {
382 ofdm_rate = true;
383 break;
384 }
385 }
386
387 if (ofdm_rate)
388 max_min = 4;
389 else
390 max_min = 5;
391 }
392
393 priv->eifs = C_EIFS;
394
395 switch (priv->rf_type) {
396 case RF_VT3226D0:
397 if (priv->bb_type != BB_TYPE_11B) {
398 priv->sifs -= 1;
399 priv->difs -= 1;
400 break;
401 }
402 case RF_AIROHA7230:
403 case RF_AL2230:
404 case RF_AL2230S:
405 if (priv->bb_type != BB_TYPE_11B)
406 break;
407 case RF_RFMD2959:
408 case RF_VT3226:
409 case RF_VT3342A0:
410 priv->sifs -= 3;
411 priv->difs -= 3;
412 break;
413 case RF_MAXIM2829:
414 if (priv->bb_type == BB_TYPE_11A) {
415 priv->sifs -= 5;
416 priv->difs -= 5;
417 } else {
418 priv->sifs -= 2;
419 priv->difs -= 2;
420 }
421
422 break;
423 }
424
425 data[0] = (u8)priv->sifs;
426 data[1] = (u8)priv->difs;
427 data[2] = (u8)priv->eifs;
428 data[3] = (u8)priv->slot;
429
430 vnt_control_out(priv, MESSAGE_TYPE_WRITE, MAC_REG_SIFS,
431 MESSAGE_REQUEST_MACREG, 4, &data[0]);
432
433 max_min |= 0xa0;
434
435 vnt_control_out(priv, MESSAGE_TYPE_WRITE, MAC_REG_CWMAXMIN0,
436 MESSAGE_REQUEST_MACREG, 1, &max_min);
437}
438
439void vnt_update_top_rates(struct vnt_private *priv)
440{
441 u8 top_ofdm = RATE_24M, top_cck = RATE_1M;
442 u8 i;
443
444
445 for (i = RATE_54M; i >= RATE_6M; i--) {
446 if (priv->basic_rates & (u16)(1 << i)) {
447 top_ofdm = i;
448 break;
449 }
450 }
451
452 priv->top_ofdm_basic_rate = top_ofdm;
453
454 for (i = RATE_11M;; i--) {
455 if (priv->basic_rates & (u16)(1 << i)) {
456 top_cck = i;
457 break;
458 }
459 if (i == RATE_1M)
460 break;
461 }
462
463 priv->top_cck_basic_rate = top_cck;
464}
465
466int vnt_ofdm_min_rate(struct vnt_private *priv)
467{
468 int ii;
469
470 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
471 if ((priv->basic_rates) & ((u16)BIT(ii)))
472 return true;
473 }
474
475 return false;
476}
477
478u8 vnt_get_pkt_type(struct vnt_private *priv)
479{
480 if (priv->bb_type == BB_TYPE_11A || priv->bb_type == BB_TYPE_11B)
481 return (u8)priv->bb_type;
482 else if (vnt_ofdm_min_rate(priv))
483 return PK_TYPE_11GA;
484 return PK_TYPE_11GB;
485}
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502u64 vnt_get_tsf_offset(u8 rx_rate, u64 tsf1, u64 tsf2)
503{
504 u64 tsf_offset = 0;
505 u16 rx_bcn_offset;
506
507 rx_bcn_offset = cw_rxbcntsf_off[rx_rate % MAX_RATE];
508
509 tsf2 += (u64)rx_bcn_offset;
510
511 tsf_offset = tsf1 - tsf2;
512
513 return tsf_offset;
514}
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531void vnt_adjust_tsf(struct vnt_private *priv, u8 rx_rate,
532 u64 time_stamp, u64 local_tsf)
533{
534 u64 tsf_offset = 0;
535 u8 data[8];
536
537 tsf_offset = vnt_get_tsf_offset(rx_rate, time_stamp, local_tsf);
538
539 data[0] = (u8)tsf_offset;
540 data[1] = (u8)(tsf_offset >> 8);
541 data[2] = (u8)(tsf_offset >> 16);
542 data[3] = (u8)(tsf_offset >> 24);
543 data[4] = (u8)(tsf_offset >> 32);
544 data[5] = (u8)(tsf_offset >> 40);
545 data[6] = (u8)(tsf_offset >> 48);
546 data[7] = (u8)(tsf_offset >> 56);
547
548 vnt_control_out(priv, MESSAGE_TYPE_SET_TSFTBTT,
549 MESSAGE_REQUEST_TSF, 0, 8, data);
550}
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565bool vnt_get_current_tsf(struct vnt_private *priv, u64 *current_tsf)
566{
567 *current_tsf = priv->current_tsf;
568
569 return true;
570}
571
572
573
574
575
576
577
578
579
580
581
582
583bool vnt_clear_current_tsf(struct vnt_private *priv)
584{
585 vnt_mac_reg_bits_on(priv, MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
586
587 priv->current_tsf = 0;
588
589 return true;
590}
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606u64 vnt_get_next_tbtt(u64 tsf, u16 beacon_interval)
607{
608 u32 beacon_int;
609
610 beacon_int = beacon_interval * 1024;
611
612
613
614
615 if (beacon_int) {
616 do_div(tsf, beacon_int);
617 tsf += 1;
618 tsf *= beacon_int;
619 }
620
621 return tsf;
622}
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638void vnt_reset_next_tbtt(struct vnt_private *priv, u16 beacon_interval)
639{
640 u64 next_tbtt = 0;
641 u8 data[8];
642
643 vnt_clear_current_tsf(priv);
644
645 next_tbtt = vnt_get_next_tbtt(next_tbtt, beacon_interval);
646
647 data[0] = (u8)next_tbtt;
648 data[1] = (u8)(next_tbtt >> 8);
649 data[2] = (u8)(next_tbtt >> 16);
650 data[3] = (u8)(next_tbtt >> 24);
651 data[4] = (u8)(next_tbtt >> 32);
652 data[5] = (u8)(next_tbtt >> 40);
653 data[6] = (u8)(next_tbtt >> 48);
654 data[7] = (u8)(next_tbtt >> 56);
655
656 vnt_control_out(priv, MESSAGE_TYPE_SET_TSFTBTT,
657 MESSAGE_REQUEST_TBTT, 0, 8, data);
658}
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675void vnt_update_next_tbtt(struct vnt_private *priv, u64 tsf,
676 u16 beacon_interval)
677{
678 u8 data[8];
679
680 tsf = vnt_get_next_tbtt(tsf, beacon_interval);
681
682 data[0] = (u8)tsf;
683 data[1] = (u8)(tsf >> 8);
684 data[2] = (u8)(tsf >> 16);
685 data[3] = (u8)(tsf >> 24);
686 data[4] = (u8)(tsf >> 32);
687 data[5] = (u8)(tsf >> 40);
688 data[6] = (u8)(tsf >> 48);
689 data[7] = (u8)(tsf >> 56);
690
691 vnt_control_out(priv, MESSAGE_TYPE_SET_TSFTBTT,
692 MESSAGE_REQUEST_TBTT, 0, 8, data);
693
694 dev_dbg(&priv->usb->dev, "%s TBTT: %8llx\n", __func__, tsf);
695}
696
697
698
699
700
701
702
703
704
705
706
707
708
709int vnt_radio_power_off(struct vnt_private *priv)
710{
711 int ret = true;
712
713 switch (priv->rf_type) {
714 case RF_AL2230:
715 case RF_AL2230S:
716 case RF_AIROHA7230:
717 case RF_VT3226:
718 case RF_VT3226D0:
719 case RF_VT3342A0:
720 vnt_mac_reg_bits_off(priv, MAC_REG_SOFTPWRCTL,
721 (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3));
722 break;
723 }
724
725 vnt_mac_reg_bits_off(priv, MAC_REG_HOSTCR, HOSTCR_RXON);
726
727 vnt_set_deep_sleep(priv);
728
729 vnt_mac_reg_bits_on(priv, MAC_REG_GPIOCTL1, GPIO3_INTMD);
730
731 return ret;
732}
733
734
735
736
737
738
739
740
741
742
743
744
745
746int vnt_radio_power_on(struct vnt_private *priv)
747{
748 int ret = true;
749
750 vnt_exit_deep_sleep(priv);
751
752 vnt_mac_reg_bits_on(priv, MAC_REG_HOSTCR, HOSTCR_RXON);
753
754 switch (priv->rf_type) {
755 case RF_AL2230:
756 case RF_AL2230S:
757 case RF_AIROHA7230:
758 case RF_VT3226:
759 case RF_VT3226D0:
760 case RF_VT3342A0:
761 vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL,
762 (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3));
763 break;
764 }
765
766 vnt_mac_reg_bits_off(priv, MAC_REG_GPIOCTL1, GPIO3_INTMD);
767
768 return ret;
769}
770
771void vnt_set_bss_mode(struct vnt_private *priv)
772{
773 if (priv->rf_type == RF_AIROHA7230 && priv->bb_type == BB_TYPE_11A)
774 vnt_mac_set_bb_type(priv, BB_TYPE_11G);
775 else
776 vnt_mac_set_bb_type(priv, priv->bb_type);
777
778 priv->packet_type = vnt_get_pkt_type(priv);
779
780 if (priv->bb_type == BB_TYPE_11A)
781 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x03);
782 else if (priv->bb_type == BB_TYPE_11B)
783 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x02);
784 else if (priv->bb_type == BB_TYPE_11G)
785 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x08);
786
787 vnt_update_ifs(priv);
788 vnt_set_rspinf(priv, (u8)priv->bb_type);
789
790 if (priv->bb_type == BB_TYPE_11A) {
791 if (priv->rf_type == RF_AIROHA7230) {
792 priv->bb_vga[0] = 0x20;
793
794 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG,
795 0xe7, priv->bb_vga[0]);
796 }
797
798 priv->bb_vga[2] = 0x10;
799 priv->bb_vga[3] = 0x10;
800 } else {
801 if (priv->rf_type == RF_AIROHA7230) {
802 priv->bb_vga[0] = 0x1c;
803
804 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG,
805 0xe7, priv->bb_vga[0]);
806 }
807
808 priv->bb_vga[2] = 0x0;
809 priv->bb_vga[3] = 0x0;
810 }
811
812 vnt_set_vga_gain_offset(priv, priv->bb_vga[0]);
813}
814