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21#ifndef __OMAP2_DISPC_REG_H
22#define __OMAP2_DISPC_REG_H
23
24
25#define DISPC_REVISION 0x0000
26#define DISPC_SYSCONFIG 0x0010
27#define DISPC_SYSSTATUS 0x0014
28#define DISPC_IRQSTATUS 0x0018
29#define DISPC_IRQENABLE 0x001C
30#define DISPC_CONTROL 0x0040
31#define DISPC_CONFIG 0x0044
32#define DISPC_CAPABLE 0x0048
33#define DISPC_LINE_STATUS 0x005C
34#define DISPC_LINE_NUMBER 0x0060
35#define DISPC_GLOBAL_ALPHA 0x0074
36#define DISPC_CONTROL2 0x0238
37#define DISPC_CONFIG2 0x0620
38#define DISPC_DIVISOR 0x0804
39#define DISPC_GLOBAL_BUFFER 0x0800
40#define DISPC_CONTROL3 0x0848
41#define DISPC_CONFIG3 0x084C
42#define DISPC_MSTANDBY_CTRL 0x0858
43#define DISPC_GLOBAL_MFLAG_ATTRIBUTE 0x085C
44
45
46#define DISPC_OVL_BA0(n) (DISPC_OVL_BASE(n) + \
47 DISPC_BA0_OFFSET(n))
48#define DISPC_OVL_BA1(n) (DISPC_OVL_BASE(n) + \
49 DISPC_BA1_OFFSET(n))
50#define DISPC_OVL_BA0_UV(n) (DISPC_OVL_BASE(n) + \
51 DISPC_BA0_UV_OFFSET(n))
52#define DISPC_OVL_BA1_UV(n) (DISPC_OVL_BASE(n) + \
53 DISPC_BA1_UV_OFFSET(n))
54#define DISPC_OVL_POSITION(n) (DISPC_OVL_BASE(n) + \
55 DISPC_POS_OFFSET(n))
56#define DISPC_OVL_SIZE(n) (DISPC_OVL_BASE(n) + \
57 DISPC_SIZE_OFFSET(n))
58#define DISPC_OVL_ATTRIBUTES(n) (DISPC_OVL_BASE(n) + \
59 DISPC_ATTR_OFFSET(n))
60#define DISPC_OVL_ATTRIBUTES2(n) (DISPC_OVL_BASE(n) + \
61 DISPC_ATTR2_OFFSET(n))
62#define DISPC_OVL_FIFO_THRESHOLD(n) (DISPC_OVL_BASE(n) + \
63 DISPC_FIFO_THRESH_OFFSET(n))
64#define DISPC_OVL_FIFO_SIZE_STATUS(n) (DISPC_OVL_BASE(n) + \
65 DISPC_FIFO_SIZE_STATUS_OFFSET(n))
66#define DISPC_OVL_ROW_INC(n) (DISPC_OVL_BASE(n) + \
67 DISPC_ROW_INC_OFFSET(n))
68#define DISPC_OVL_PIXEL_INC(n) (DISPC_OVL_BASE(n) + \
69 DISPC_PIX_INC_OFFSET(n))
70#define DISPC_OVL_WINDOW_SKIP(n) (DISPC_OVL_BASE(n) + \
71 DISPC_WINDOW_SKIP_OFFSET(n))
72#define DISPC_OVL_TABLE_BA(n) (DISPC_OVL_BASE(n) + \
73 DISPC_TABLE_BA_OFFSET(n))
74#define DISPC_OVL_FIR(n) (DISPC_OVL_BASE(n) + \
75 DISPC_FIR_OFFSET(n))
76#define DISPC_OVL_FIR2(n) (DISPC_OVL_BASE(n) + \
77 DISPC_FIR2_OFFSET(n))
78#define DISPC_OVL_PICTURE_SIZE(n) (DISPC_OVL_BASE(n) + \
79 DISPC_PIC_SIZE_OFFSET(n))
80#define DISPC_OVL_ACCU0(n) (DISPC_OVL_BASE(n) + \
81 DISPC_ACCU0_OFFSET(n))
82#define DISPC_OVL_ACCU1(n) (DISPC_OVL_BASE(n) + \
83 DISPC_ACCU1_OFFSET(n))
84#define DISPC_OVL_ACCU2_0(n) (DISPC_OVL_BASE(n) + \
85 DISPC_ACCU2_0_OFFSET(n))
86#define DISPC_OVL_ACCU2_1(n) (DISPC_OVL_BASE(n) + \
87 DISPC_ACCU2_1_OFFSET(n))
88#define DISPC_OVL_FIR_COEF_H(n, i) (DISPC_OVL_BASE(n) + \
89 DISPC_FIR_COEF_H_OFFSET(n, i))
90#define DISPC_OVL_FIR_COEF_HV(n, i) (DISPC_OVL_BASE(n) + \
91 DISPC_FIR_COEF_HV_OFFSET(n, i))
92#define DISPC_OVL_FIR_COEF_H2(n, i) (DISPC_OVL_BASE(n) + \
93 DISPC_FIR_COEF_H2_OFFSET(n, i))
94#define DISPC_OVL_FIR_COEF_HV2(n, i) (DISPC_OVL_BASE(n) + \
95 DISPC_FIR_COEF_HV2_OFFSET(n, i))
96#define DISPC_OVL_CONV_COEF(n, i) (DISPC_OVL_BASE(n) + \
97 DISPC_CONV_COEF_OFFSET(n, i))
98#define DISPC_OVL_FIR_COEF_V(n, i) (DISPC_OVL_BASE(n) + \
99 DISPC_FIR_COEF_V_OFFSET(n, i))
100#define DISPC_OVL_FIR_COEF_V2(n, i) (DISPC_OVL_BASE(n) + \
101 DISPC_FIR_COEF_V2_OFFSET(n, i))
102#define DISPC_OVL_PRELOAD(n) (DISPC_OVL_BASE(n) + \
103 DISPC_PRELOAD_OFFSET(n))
104#define DISPC_OVL_MFLAG_THRESHOLD(n) DISPC_MFLAG_THRESHOLD_OFFSET(n)
105
106
107struct dispc_coef {
108 s8 hc4_vc22;
109 s8 hc3_vc2;
110 u8 hc2_vc1;
111 s8 hc1_vc0;
112 s8 hc0_vc00;
113};
114
115const struct dispc_coef *dispc_ovl_get_scale_coef(int inc, int five_taps);
116
117
118static inline u16 DISPC_DEFAULT_COLOR(enum omap_channel channel)
119{
120 switch (channel) {
121 case OMAP_DSS_CHANNEL_LCD:
122 return 0x004C;
123 case OMAP_DSS_CHANNEL_DIGIT:
124 return 0x0050;
125 case OMAP_DSS_CHANNEL_LCD2:
126 return 0x03AC;
127 case OMAP_DSS_CHANNEL_LCD3:
128 return 0x0814;
129 default:
130 BUG();
131 return 0;
132 }
133}
134
135static inline u16 DISPC_TRANS_COLOR(enum omap_channel channel)
136{
137 switch (channel) {
138 case OMAP_DSS_CHANNEL_LCD:
139 return 0x0054;
140 case OMAP_DSS_CHANNEL_DIGIT:
141 return 0x0058;
142 case OMAP_DSS_CHANNEL_LCD2:
143 return 0x03B0;
144 case OMAP_DSS_CHANNEL_LCD3:
145 return 0x0818;
146 default:
147 BUG();
148 return 0;
149 }
150}
151
152static inline u16 DISPC_TIMING_H(enum omap_channel channel)
153{
154 switch (channel) {
155 case OMAP_DSS_CHANNEL_LCD:
156 return 0x0064;
157 case OMAP_DSS_CHANNEL_DIGIT:
158 BUG();
159 return 0;
160 case OMAP_DSS_CHANNEL_LCD2:
161 return 0x0400;
162 case OMAP_DSS_CHANNEL_LCD3:
163 return 0x0840;
164 default:
165 BUG();
166 return 0;
167 }
168}
169
170static inline u16 DISPC_TIMING_V(enum omap_channel channel)
171{
172 switch (channel) {
173 case OMAP_DSS_CHANNEL_LCD:
174 return 0x0068;
175 case OMAP_DSS_CHANNEL_DIGIT:
176 BUG();
177 return 0;
178 case OMAP_DSS_CHANNEL_LCD2:
179 return 0x0404;
180 case OMAP_DSS_CHANNEL_LCD3:
181 return 0x0844;
182 default:
183 BUG();
184 return 0;
185 }
186}
187
188static inline u16 DISPC_POL_FREQ(enum omap_channel channel)
189{
190 switch (channel) {
191 case OMAP_DSS_CHANNEL_LCD:
192 return 0x006C;
193 case OMAP_DSS_CHANNEL_DIGIT:
194 BUG();
195 return 0;
196 case OMAP_DSS_CHANNEL_LCD2:
197 return 0x0408;
198 case OMAP_DSS_CHANNEL_LCD3:
199 return 0x083C;
200 default:
201 BUG();
202 return 0;
203 }
204}
205
206static inline u16 DISPC_DIVISORo(enum omap_channel channel)
207{
208 switch (channel) {
209 case OMAP_DSS_CHANNEL_LCD:
210 return 0x0070;
211 case OMAP_DSS_CHANNEL_DIGIT:
212 BUG();
213 return 0;
214 case OMAP_DSS_CHANNEL_LCD2:
215 return 0x040C;
216 case OMAP_DSS_CHANNEL_LCD3:
217 return 0x0838;
218 default:
219 BUG();
220 return 0;
221 }
222}
223
224
225static inline u16 DISPC_SIZE_MGR(enum omap_channel channel)
226{
227 switch (channel) {
228 case OMAP_DSS_CHANNEL_LCD:
229 return 0x007C;
230 case OMAP_DSS_CHANNEL_DIGIT:
231 return 0x0078;
232 case OMAP_DSS_CHANNEL_LCD2:
233 return 0x03CC;
234 case OMAP_DSS_CHANNEL_LCD3:
235 return 0x0834;
236 default:
237 BUG();
238 return 0;
239 }
240}
241
242static inline u16 DISPC_DATA_CYCLE1(enum omap_channel channel)
243{
244 switch (channel) {
245 case OMAP_DSS_CHANNEL_LCD:
246 return 0x01D4;
247 case OMAP_DSS_CHANNEL_DIGIT:
248 BUG();
249 return 0;
250 case OMAP_DSS_CHANNEL_LCD2:
251 return 0x03C0;
252 case OMAP_DSS_CHANNEL_LCD3:
253 return 0x0828;
254 default:
255 BUG();
256 return 0;
257 }
258}
259
260static inline u16 DISPC_DATA_CYCLE2(enum omap_channel channel)
261{
262 switch (channel) {
263 case OMAP_DSS_CHANNEL_LCD:
264 return 0x01D8;
265 case OMAP_DSS_CHANNEL_DIGIT:
266 BUG();
267 return 0;
268 case OMAP_DSS_CHANNEL_LCD2:
269 return 0x03C4;
270 case OMAP_DSS_CHANNEL_LCD3:
271 return 0x082C;
272 default:
273 BUG();
274 return 0;
275 }
276}
277
278static inline u16 DISPC_DATA_CYCLE3(enum omap_channel channel)
279{
280 switch (channel) {
281 case OMAP_DSS_CHANNEL_LCD:
282 return 0x01DC;
283 case OMAP_DSS_CHANNEL_DIGIT:
284 BUG();
285 return 0;
286 case OMAP_DSS_CHANNEL_LCD2:
287 return 0x03C8;
288 case OMAP_DSS_CHANNEL_LCD3:
289 return 0x0830;
290 default:
291 BUG();
292 return 0;
293 }
294}
295
296static inline u16 DISPC_CPR_COEF_R(enum omap_channel channel)
297{
298 switch (channel) {
299 case OMAP_DSS_CHANNEL_LCD:
300 return 0x0220;
301 case OMAP_DSS_CHANNEL_DIGIT:
302 BUG();
303 return 0;
304 case OMAP_DSS_CHANNEL_LCD2:
305 return 0x03BC;
306 case OMAP_DSS_CHANNEL_LCD3:
307 return 0x0824;
308 default:
309 BUG();
310 return 0;
311 }
312}
313
314static inline u16 DISPC_CPR_COEF_G(enum omap_channel channel)
315{
316 switch (channel) {
317 case OMAP_DSS_CHANNEL_LCD:
318 return 0x0224;
319 case OMAP_DSS_CHANNEL_DIGIT:
320 BUG();
321 return 0;
322 case OMAP_DSS_CHANNEL_LCD2:
323 return 0x03B8;
324 case OMAP_DSS_CHANNEL_LCD3:
325 return 0x0820;
326 default:
327 BUG();
328 return 0;
329 }
330}
331
332static inline u16 DISPC_CPR_COEF_B(enum omap_channel channel)
333{
334 switch (channel) {
335 case OMAP_DSS_CHANNEL_LCD:
336 return 0x0228;
337 case OMAP_DSS_CHANNEL_DIGIT:
338 BUG();
339 return 0;
340 case OMAP_DSS_CHANNEL_LCD2:
341 return 0x03B4;
342 case OMAP_DSS_CHANNEL_LCD3:
343 return 0x081C;
344 default:
345 BUG();
346 return 0;
347 }
348}
349
350
351static inline u16 DISPC_OVL_BASE(enum omap_plane plane)
352{
353 switch (plane) {
354 case OMAP_DSS_GFX:
355 return 0x0080;
356 case OMAP_DSS_VIDEO1:
357 return 0x00BC;
358 case OMAP_DSS_VIDEO2:
359 return 0x014C;
360 case OMAP_DSS_VIDEO3:
361 return 0x0300;
362 case OMAP_DSS_WB:
363 return 0x0500;
364 default:
365 BUG();
366 return 0;
367 }
368}
369
370
371static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane)
372{
373 switch (plane) {
374 case OMAP_DSS_GFX:
375 case OMAP_DSS_VIDEO1:
376 case OMAP_DSS_VIDEO2:
377 return 0x0000;
378 case OMAP_DSS_VIDEO3:
379 case OMAP_DSS_WB:
380 return 0x0008;
381 default:
382 BUG();
383 return 0;
384 }
385}
386
387static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane)
388{
389 switch (plane) {
390 case OMAP_DSS_GFX:
391 case OMAP_DSS_VIDEO1:
392 case OMAP_DSS_VIDEO2:
393 return 0x0004;
394 case OMAP_DSS_VIDEO3:
395 case OMAP_DSS_WB:
396 return 0x000C;
397 default:
398 BUG();
399 return 0;
400 }
401}
402
403static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane)
404{
405 switch (plane) {
406 case OMAP_DSS_GFX:
407 BUG();
408 return 0;
409 case OMAP_DSS_VIDEO1:
410 return 0x0544;
411 case OMAP_DSS_VIDEO2:
412 return 0x04BC;
413 case OMAP_DSS_VIDEO3:
414 return 0x0310;
415 case OMAP_DSS_WB:
416 return 0x0118;
417 default:
418 BUG();
419 return 0;
420 }
421}
422
423static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane)
424{
425 switch (plane) {
426 case OMAP_DSS_GFX:
427 BUG();
428 return 0;
429 case OMAP_DSS_VIDEO1:
430 return 0x0548;
431 case OMAP_DSS_VIDEO2:
432 return 0x04C0;
433 case OMAP_DSS_VIDEO3:
434 return 0x0314;
435 case OMAP_DSS_WB:
436 return 0x011C;
437 default:
438 BUG();
439 return 0;
440 }
441}
442
443static inline u16 DISPC_POS_OFFSET(enum omap_plane plane)
444{
445 switch (plane) {
446 case OMAP_DSS_GFX:
447 case OMAP_DSS_VIDEO1:
448 case OMAP_DSS_VIDEO2:
449 return 0x0008;
450 case OMAP_DSS_VIDEO3:
451 return 0x009C;
452 default:
453 BUG();
454 return 0;
455 }
456}
457
458static inline u16 DISPC_SIZE_OFFSET(enum omap_plane plane)
459{
460 switch (plane) {
461 case OMAP_DSS_GFX:
462 case OMAP_DSS_VIDEO1:
463 case OMAP_DSS_VIDEO2:
464 return 0x000C;
465 case OMAP_DSS_VIDEO3:
466 case OMAP_DSS_WB:
467 return 0x00A8;
468 default:
469 BUG();
470 return 0;
471 }
472}
473
474static inline u16 DISPC_ATTR_OFFSET(enum omap_plane plane)
475{
476 switch (plane) {
477 case OMAP_DSS_GFX:
478 return 0x0020;
479 case OMAP_DSS_VIDEO1:
480 case OMAP_DSS_VIDEO2:
481 return 0x0010;
482 case OMAP_DSS_VIDEO3:
483 case OMAP_DSS_WB:
484 return 0x0070;
485 default:
486 BUG();
487 return 0;
488 }
489}
490
491static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane)
492{
493 switch (plane) {
494 case OMAP_DSS_GFX:
495 BUG();
496 return 0;
497 case OMAP_DSS_VIDEO1:
498 return 0x0568;
499 case OMAP_DSS_VIDEO2:
500 return 0x04DC;
501 case OMAP_DSS_VIDEO3:
502 return 0x032C;
503 case OMAP_DSS_WB:
504 return 0x0310;
505 default:
506 BUG();
507 return 0;
508 }
509}
510
511static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane)
512{
513 switch (plane) {
514 case OMAP_DSS_GFX:
515 return 0x0024;
516 case OMAP_DSS_VIDEO1:
517 case OMAP_DSS_VIDEO2:
518 return 0x0014;
519 case OMAP_DSS_VIDEO3:
520 case OMAP_DSS_WB:
521 return 0x008C;
522 default:
523 BUG();
524 return 0;
525 }
526}
527
528static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane)
529{
530 switch (plane) {
531 case OMAP_DSS_GFX:
532 return 0x0028;
533 case OMAP_DSS_VIDEO1:
534 case OMAP_DSS_VIDEO2:
535 return 0x0018;
536 case OMAP_DSS_VIDEO3:
537 case OMAP_DSS_WB:
538 return 0x0088;
539 default:
540 BUG();
541 return 0;
542 }
543}
544
545static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane plane)
546{
547 switch (plane) {
548 case OMAP_DSS_GFX:
549 return 0x002C;
550 case OMAP_DSS_VIDEO1:
551 case OMAP_DSS_VIDEO2:
552 return 0x001C;
553 case OMAP_DSS_VIDEO3:
554 case OMAP_DSS_WB:
555 return 0x00A4;
556 default:
557 BUG();
558 return 0;
559 }
560}
561
562static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane plane)
563{
564 switch (plane) {
565 case OMAP_DSS_GFX:
566 return 0x0030;
567 case OMAP_DSS_VIDEO1:
568 case OMAP_DSS_VIDEO2:
569 return 0x0020;
570 case OMAP_DSS_VIDEO3:
571 case OMAP_DSS_WB:
572 return 0x0098;
573 default:
574 BUG();
575 return 0;
576 }
577}
578
579static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane)
580{
581 switch (plane) {
582 case OMAP_DSS_GFX:
583 return 0x0034;
584 case OMAP_DSS_VIDEO1:
585 case OMAP_DSS_VIDEO2:
586 case OMAP_DSS_VIDEO3:
587 BUG();
588 return 0;
589 default:
590 BUG();
591 return 0;
592 }
593}
594
595static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane plane)
596{
597 switch (plane) {
598 case OMAP_DSS_GFX:
599 return 0x0038;
600 case OMAP_DSS_VIDEO1:
601 case OMAP_DSS_VIDEO2:
602 case OMAP_DSS_VIDEO3:
603 BUG();
604 return 0;
605 default:
606 BUG();
607 return 0;
608 }
609}
610
611static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane)
612{
613 switch (plane) {
614 case OMAP_DSS_GFX:
615 BUG();
616 return 0;
617 case OMAP_DSS_VIDEO1:
618 case OMAP_DSS_VIDEO2:
619 return 0x0024;
620 case OMAP_DSS_VIDEO3:
621 case OMAP_DSS_WB:
622 return 0x0090;
623 default:
624 BUG();
625 return 0;
626 }
627}
628
629static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane)
630{
631 switch (plane) {
632 case OMAP_DSS_GFX:
633 BUG();
634 return 0;
635 case OMAP_DSS_VIDEO1:
636 return 0x0580;
637 case OMAP_DSS_VIDEO2:
638 return 0x055C;
639 case OMAP_DSS_VIDEO3:
640 return 0x0424;
641 case OMAP_DSS_WB:
642 return 0x290;
643 default:
644 BUG();
645 return 0;
646 }
647}
648
649static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane)
650{
651 switch (plane) {
652 case OMAP_DSS_GFX:
653 BUG();
654 return 0;
655 case OMAP_DSS_VIDEO1:
656 case OMAP_DSS_VIDEO2:
657 return 0x0028;
658 case OMAP_DSS_VIDEO3:
659 case OMAP_DSS_WB:
660 return 0x0094;
661 default:
662 BUG();
663 return 0;
664 }
665}
666
667
668static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane)
669{
670 switch (plane) {
671 case OMAP_DSS_GFX:
672 BUG();
673 return 0;
674 case OMAP_DSS_VIDEO1:
675 case OMAP_DSS_VIDEO2:
676 return 0x002C;
677 case OMAP_DSS_VIDEO3:
678 case OMAP_DSS_WB:
679 return 0x0000;
680 default:
681 BUG();
682 return 0;
683 }
684}
685
686static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane)
687{
688 switch (plane) {
689 case OMAP_DSS_GFX:
690 BUG();
691 return 0;
692 case OMAP_DSS_VIDEO1:
693 return 0x0584;
694 case OMAP_DSS_VIDEO2:
695 return 0x0560;
696 case OMAP_DSS_VIDEO3:
697 return 0x0428;
698 case OMAP_DSS_WB:
699 return 0x0294;
700 default:
701 BUG();
702 return 0;
703 }
704}
705
706static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane)
707{
708 switch (plane) {
709 case OMAP_DSS_GFX:
710 BUG();
711 return 0;
712 case OMAP_DSS_VIDEO1:
713 case OMAP_DSS_VIDEO2:
714 return 0x0030;
715 case OMAP_DSS_VIDEO3:
716 case OMAP_DSS_WB:
717 return 0x0004;
718 default:
719 BUG();
720 return 0;
721 }
722}
723
724static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane)
725{
726 switch (plane) {
727 case OMAP_DSS_GFX:
728 BUG();
729 return 0;
730 case OMAP_DSS_VIDEO1:
731 return 0x0588;
732 case OMAP_DSS_VIDEO2:
733 return 0x0564;
734 case OMAP_DSS_VIDEO3:
735 return 0x042C;
736 case OMAP_DSS_WB:
737 return 0x0298;
738 default:
739 BUG();
740 return 0;
741 }
742}
743
744
745static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i)
746{
747 switch (plane) {
748 case OMAP_DSS_GFX:
749 BUG();
750 return 0;
751 case OMAP_DSS_VIDEO1:
752 case OMAP_DSS_VIDEO2:
753 return 0x0034 + i * 0x8;
754 case OMAP_DSS_VIDEO3:
755 case OMAP_DSS_WB:
756 return 0x0010 + i * 0x8;
757 default:
758 BUG();
759 return 0;
760 }
761}
762
763
764static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i)
765{
766 switch (plane) {
767 case OMAP_DSS_GFX:
768 BUG();
769 return 0;
770 case OMAP_DSS_VIDEO1:
771 return 0x058C + i * 0x8;
772 case OMAP_DSS_VIDEO2:
773 return 0x0568 + i * 0x8;
774 case OMAP_DSS_VIDEO3:
775 return 0x0430 + i * 0x8;
776 case OMAP_DSS_WB:
777 return 0x02A0 + i * 0x8;
778 default:
779 BUG();
780 return 0;
781 }
782}
783
784
785static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i)
786{
787 switch (plane) {
788 case OMAP_DSS_GFX:
789 BUG();
790 return 0;
791 case OMAP_DSS_VIDEO1:
792 case OMAP_DSS_VIDEO2:
793 return 0x0038 + i * 0x8;
794 case OMAP_DSS_VIDEO3:
795 case OMAP_DSS_WB:
796 return 0x0014 + i * 0x8;
797 default:
798 BUG();
799 return 0;
800 }
801}
802
803
804static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i)
805{
806 switch (plane) {
807 case OMAP_DSS_GFX:
808 BUG();
809 return 0;
810 case OMAP_DSS_VIDEO1:
811 return 0x0590 + i * 8;
812 case OMAP_DSS_VIDEO2:
813 return 0x056C + i * 0x8;
814 case OMAP_DSS_VIDEO3:
815 return 0x0434 + i * 0x8;
816 case OMAP_DSS_WB:
817 return 0x02A4 + i * 0x8;
818 default:
819 BUG();
820 return 0;
821 }
822}
823
824
825static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i)
826{
827 switch (plane) {
828 case OMAP_DSS_GFX:
829 BUG();
830 return 0;
831 case OMAP_DSS_VIDEO1:
832 case OMAP_DSS_VIDEO2:
833 case OMAP_DSS_VIDEO3:
834 case OMAP_DSS_WB:
835 return 0x0074 + i * 0x4;
836 default:
837 BUG();
838 return 0;
839 }
840}
841
842
843static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i)
844{
845 switch (plane) {
846 case OMAP_DSS_GFX:
847 BUG();
848 return 0;
849 case OMAP_DSS_VIDEO1:
850 return 0x0124 + i * 0x4;
851 case OMAP_DSS_VIDEO2:
852 return 0x00B4 + i * 0x4;
853 case OMAP_DSS_VIDEO3:
854 case OMAP_DSS_WB:
855 return 0x0050 + i * 0x4;
856 default:
857 BUG();
858 return 0;
859 }
860}
861
862
863static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i)
864{
865 switch (plane) {
866 case OMAP_DSS_GFX:
867 BUG();
868 return 0;
869 case OMAP_DSS_VIDEO1:
870 return 0x05CC + i * 0x4;
871 case OMAP_DSS_VIDEO2:
872 return 0x05A8 + i * 0x4;
873 case OMAP_DSS_VIDEO3:
874 return 0x0470 + i * 0x4;
875 case OMAP_DSS_WB:
876 return 0x02E0 + i * 0x4;
877 default:
878 BUG();
879 return 0;
880 }
881}
882
883static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane)
884{
885 switch (plane) {
886 case OMAP_DSS_GFX:
887 return 0x01AC;
888 case OMAP_DSS_VIDEO1:
889 return 0x0174;
890 case OMAP_DSS_VIDEO2:
891 return 0x00E8;
892 case OMAP_DSS_VIDEO3:
893 return 0x00A0;
894 default:
895 BUG();
896 return 0;
897 }
898}
899
900static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane)
901{
902 switch (plane) {
903 case OMAP_DSS_GFX:
904 return 0x0860;
905 case OMAP_DSS_VIDEO1:
906 return 0x0864;
907 case OMAP_DSS_VIDEO2:
908 return 0x0868;
909 case OMAP_DSS_VIDEO3:
910 return 0x086c;
911 case OMAP_DSS_WB:
912 return 0x0870;
913 default:
914 BUG();
915 return 0;
916 }
917}
918
919#endif
920
