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33#ifndef __R128_DRM_H__
34#define __R128_DRM_H__
35
36#include "drm.h"
37
38#if defined(__cplusplus)
39extern "C" {
40#endif
41
42
43
44
45#ifndef __R128_SAREA_DEFINES__
46#define __R128_SAREA_DEFINES__
47
48
49
50#define R128_UPLOAD_CONTEXT 0x001
51#define R128_UPLOAD_SETUP 0x002
52#define R128_UPLOAD_TEX0 0x004
53#define R128_UPLOAD_TEX1 0x008
54#define R128_UPLOAD_TEX0IMAGES 0x010
55#define R128_UPLOAD_TEX1IMAGES 0x020
56#define R128_UPLOAD_CORE 0x040
57#define R128_UPLOAD_MASKS 0x080
58#define R128_UPLOAD_WINDOW 0x100
59#define R128_UPLOAD_CLIPRECTS 0x200
60#define R128_REQUIRE_QUIESCENCE 0x400
61#define R128_UPLOAD_ALL 0x7ff
62
63#define R128_FRONT 0x1
64#define R128_BACK 0x2
65#define R128_DEPTH 0x4
66
67
68
69#define R128_POINTS 0x1
70#define R128_LINES 0x2
71#define R128_LINE_STRIP 0x3
72#define R128_TRIANGLES 0x4
73#define R128_TRIANGLE_FAN 0x5
74#define R128_TRIANGLE_STRIP 0x6
75
76
77
78#define R128_BUFFER_SIZE 16384
79
80
81
82#define R128_INDEX_PRIM_OFFSET 20
83#define R128_HOSTDATA_BLIT_OFFSET 32
84
85
86
87#define R128_NR_SAREA_CLIPRECTS 12
88
89
90
91
92#define R128_LOCAL_TEX_HEAP 0
93#define R128_AGP_TEX_HEAP 1
94#define R128_NR_TEX_HEAPS 2
95#define R128_NR_TEX_REGIONS 64
96#define R128_LOG_TEX_GRANULARITY 16
97
98#define R128_NR_CONTEXT_REGS 12
99
100#define R128_MAX_TEXTURE_LEVELS 11
101#define R128_MAX_TEXTURE_UNITS 2
102
103#endif
104
105typedef struct {
106
107 unsigned int dst_pitch_offset_c;
108 unsigned int dp_gui_master_cntl_c;
109 unsigned int sc_top_left_c;
110 unsigned int sc_bottom_right_c;
111 unsigned int z_offset_c;
112 unsigned int z_pitch_c;
113 unsigned int z_sten_cntl_c;
114 unsigned int tex_cntl_c;
115 unsigned int misc_3d_state_cntl_reg;
116 unsigned int texture_clr_cmp_clr_c;
117 unsigned int texture_clr_cmp_msk_c;
118 unsigned int fog_color_c;
119
120
121 unsigned int tex_size_pitch_c;
122 unsigned int constant_color_c;
123
124
125 unsigned int pm4_vc_fpu_setup;
126 unsigned int setup_cntl;
127
128
129 unsigned int dp_write_mask;
130 unsigned int sten_ref_mask_c;
131 unsigned int plane_3d_mask_c;
132
133
134 unsigned int window_xy_offset;
135
136
137 unsigned int scale_3d_cntl;
138} drm_r128_context_regs_t;
139
140
141
142typedef struct {
143 unsigned int tex_cntl;
144 unsigned int tex_combine_cntl;
145 unsigned int tex_size_pitch;
146 unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
147 unsigned int tex_border_color;
148} drm_r128_texture_regs_t;
149
150typedef struct drm_r128_sarea {
151
152
153
154 drm_r128_context_regs_t context_state;
155 drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
156 unsigned int dirty;
157 unsigned int vertsize;
158 unsigned int vc_format;
159
160
161
162 struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
163 unsigned int nbox;
164
165
166
167 unsigned int last_frame;
168 unsigned int last_dispatch;
169
170 struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
171 unsigned int tex_age[R128_NR_TEX_HEAPS];
172 int ctx_owner;
173 int pfAllowPageFlip;
174 int pfCurrentPage;
175} drm_r128_sarea_t;
176
177
178
179
180
181
182
183
184#define DRM_R128_INIT 0x00
185#define DRM_R128_CCE_START 0x01
186#define DRM_R128_CCE_STOP 0x02
187#define DRM_R128_CCE_RESET 0x03
188#define DRM_R128_CCE_IDLE 0x04
189
190#define DRM_R128_RESET 0x06
191#define DRM_R128_SWAP 0x07
192#define DRM_R128_CLEAR 0x08
193#define DRM_R128_VERTEX 0x09
194#define DRM_R128_INDICES 0x0a
195#define DRM_R128_BLIT 0x0b
196#define DRM_R128_DEPTH 0x0c
197#define DRM_R128_STIPPLE 0x0d
198
199#define DRM_R128_INDIRECT 0x0f
200#define DRM_R128_FULLSCREEN 0x10
201#define DRM_R128_CLEAR2 0x11
202#define DRM_R128_GETPARAM 0x12
203#define DRM_R128_FLIP 0x13
204
205#define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
206#define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START)
207#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
208#define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
209#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
210
211#define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET)
212#define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP)
213#define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
214#define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
215#define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
216#define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
217#define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
218#define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
219
220#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
221#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
222#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
223#define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
224#define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP)
225
226typedef struct drm_r128_init {
227 enum {
228 R128_INIT_CCE = 0x01,
229 R128_CLEANUP_CCE = 0x02
230 } func;
231 unsigned long sarea_priv_offset;
232 int is_pci;
233 int cce_mode;
234 int cce_secure;
235 int ring_size;
236 int usec_timeout;
237
238 unsigned int fb_bpp;
239 unsigned int front_offset, front_pitch;
240 unsigned int back_offset, back_pitch;
241 unsigned int depth_bpp;
242 unsigned int depth_offset, depth_pitch;
243 unsigned int span_offset;
244
245 unsigned long fb_offset;
246 unsigned long mmio_offset;
247 unsigned long ring_offset;
248 unsigned long ring_rptr_offset;
249 unsigned long buffers_offset;
250 unsigned long agp_textures_offset;
251} drm_r128_init_t;
252
253typedef struct drm_r128_cce_stop {
254 int flush;
255 int idle;
256} drm_r128_cce_stop_t;
257
258typedef struct drm_r128_clear {
259 unsigned int flags;
260 unsigned int clear_color;
261 unsigned int clear_depth;
262 unsigned int color_mask;
263 unsigned int depth_mask;
264} drm_r128_clear_t;
265
266typedef struct drm_r128_vertex {
267 int prim;
268 int idx;
269 int count;
270 int discard;
271} drm_r128_vertex_t;
272
273typedef struct drm_r128_indices {
274 int prim;
275 int idx;
276 int start;
277 int end;
278 int discard;
279} drm_r128_indices_t;
280
281typedef struct drm_r128_blit {
282 int idx;
283 int pitch;
284 int offset;
285 int format;
286 unsigned short x, y;
287 unsigned short width, height;
288} drm_r128_blit_t;
289
290typedef struct drm_r128_depth {
291 enum {
292 R128_WRITE_SPAN = 0x01,
293 R128_WRITE_PIXELS = 0x02,
294 R128_READ_SPAN = 0x03,
295 R128_READ_PIXELS = 0x04
296 } func;
297 int n;
298 int __user *x;
299 int __user *y;
300 unsigned int __user *buffer;
301 unsigned char __user *mask;
302} drm_r128_depth_t;
303
304typedef struct drm_r128_stipple {
305 unsigned int __user *mask;
306} drm_r128_stipple_t;
307
308typedef struct drm_r128_indirect {
309 int idx;
310 int start;
311 int end;
312 int discard;
313} drm_r128_indirect_t;
314
315typedef struct drm_r128_fullscreen {
316 enum {
317 R128_INIT_FULLSCREEN = 0x01,
318 R128_CLEANUP_FULLSCREEN = 0x02
319 } func;
320} drm_r128_fullscreen_t;
321
322
323
324
325#define R128_PARAM_IRQ_NR 1
326
327typedef struct drm_r128_getparam {
328 int param;
329 void __user *value;
330} drm_r128_getparam_t;
331
332#if defined(__cplusplus)
333}
334#endif
335
336#endif
337