linux/arch/arm/mach-imx/ehci-imx27.c
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   1/*
   2 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
   3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of the GNU General Public License as published by the
   7 * Free Software Foundation; either version 2 of the License, or (at your
   8 * option) any later version.
   9 *
  10 * This program is distributed in the hope that it will be useful, but
  11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13 * for more details.
  14 */
  15
  16#include <linux/platform_device.h>
  17#include <linux/io.h>
  18#include <linux/platform_data/usb-ehci-mxc.h>
  19
  20#include "ehci.h"
  21#include "hardware.h"
  22
  23#define USBCTRL_OTGBASE_OFFSET  0x600
  24
  25#define MX27_OTG_SIC_SHIFT      29
  26#define MX27_OTG_SIC_MASK       (0x3 << MX27_OTG_SIC_SHIFT)
  27#define MX27_OTG_PM_BIT         (1 << 24)
  28
  29#define MX27_H2_SIC_SHIFT       21
  30#define MX27_H2_SIC_MASK        (0x3 << MX27_H2_SIC_SHIFT)
  31#define MX27_H2_PM_BIT          (1 << 16)
  32#define MX27_H2_DT_BIT          (1 << 5)
  33
  34#define MX27_H1_SIC_SHIFT       13
  35#define MX27_H1_SIC_MASK        (0x3 << MX27_H1_SIC_SHIFT)
  36#define MX27_H1_PM_BIT          (1 << 8)
  37#define MX27_H1_DT_BIT          (1 << 4)
  38
  39int mx27_initialize_usb_hw(int port, unsigned int flags)
  40{
  41        unsigned int v;
  42
  43        v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
  44
  45        switch (port) {
  46        case 0: /* OTG port */
  47                v &= ~(MX27_OTG_SIC_MASK | MX27_OTG_PM_BIT);
  48                v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_OTG_SIC_SHIFT;
  49
  50                if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  51                        v |= MX27_OTG_PM_BIT;
  52                break;
  53        case 1: /* H1 port */
  54                v &= ~(MX27_H1_SIC_MASK | MX27_H1_PM_BIT | MX27_H1_DT_BIT);
  55                v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H1_SIC_SHIFT;
  56
  57                if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  58                        v |= MX27_H1_PM_BIT;
  59
  60                if (!(flags & MXC_EHCI_TTL_ENABLED))
  61                        v |= MX27_H1_DT_BIT;
  62
  63                break;
  64        case 2: /* H2 port */
  65                v &= ~(MX27_H2_SIC_MASK | MX27_H2_PM_BIT | MX27_H2_DT_BIT);
  66                v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H2_SIC_SHIFT;
  67
  68                if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  69                        v |= MX27_H2_PM_BIT;
  70
  71                if (!(flags & MXC_EHCI_TTL_ENABLED))
  72                        v |= MX27_H2_DT_BIT;
  73
  74                break;
  75        default:
  76                return -EINVAL;
  77        }
  78
  79        writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
  80
  81        return 0;
  82}
  83
  84