1
2
3
4
5
6
7
8
9
10
11
12
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/gpio.h>
17#include <linux/interrupt.h>
18#include <linux/i2c.h>
19#include <linux/platform_data/pca953x.h>
20#include <linux/slab.h>
21#include <asm/unaligned.h>
22#include <linux/of_platform.h>
23#include <linux/acpi.h>
24#include <linux/regulator/consumer.h>
25
26#define PCA953X_INPUT 0
27#define PCA953X_OUTPUT 1
28#define PCA953X_INVERT 2
29#define PCA953X_DIRECTION 3
30
31#define REG_ADDR_AI 0x80
32
33#define PCA957X_IN 0
34#define PCA957X_INVRT 1
35#define PCA957X_BKEN 2
36#define PCA957X_PUPD 3
37#define PCA957X_CFG 4
38#define PCA957X_OUT 5
39#define PCA957X_MSK 6
40#define PCA957X_INTS 7
41
42#define PCAL953X_IN_LATCH 34
43#define PCAL953X_INT_MASK 37
44#define PCAL953X_INT_STAT 38
45
46#define PCA_GPIO_MASK 0x00FF
47#define PCA_INT 0x0100
48#define PCA_PCAL 0x0200
49#define PCA953X_TYPE 0x1000
50#define PCA957X_TYPE 0x2000
51#define PCA_TYPE_MASK 0xF000
52
53#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
54
55static const struct i2c_device_id pca953x_id[] = {
56 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
57 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
58 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
59 { "pca9536", 4 | PCA953X_TYPE, },
60 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
61 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
62 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
63 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
64 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
65 { "pca9556", 8 | PCA953X_TYPE, },
66 { "pca9557", 8 | PCA953X_TYPE, },
67 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
68 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
69 { "pca9698", 40 | PCA953X_TYPE, },
70
71 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
72
73 { "max7310", 8 | PCA953X_TYPE, },
74 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
75 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
76 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
77 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
78 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
79 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
80 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
81 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
82 { "xra1202", 8 | PCA953X_TYPE },
83 { }
84};
85MODULE_DEVICE_TABLE(i2c, pca953x_id);
86
87static const struct acpi_device_id pca953x_acpi_ids[] = {
88 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
89 { }
90};
91MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
92
93#define MAX_BANK 5
94#define BANK_SZ 8
95
96#define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
97
98struct pca953x_reg_config {
99 int direction;
100 int output;
101 int input;
102};
103
104static const struct pca953x_reg_config pca953x_regs = {
105 .direction = PCA953X_DIRECTION,
106 .output = PCA953X_OUTPUT,
107 .input = PCA953X_INPUT,
108};
109
110static const struct pca953x_reg_config pca957x_regs = {
111 .direction = PCA957X_CFG,
112 .output = PCA957X_OUT,
113 .input = PCA957X_IN,
114};
115
116struct pca953x_chip {
117 unsigned gpio_start;
118 u8 reg_output[MAX_BANK];
119 u8 reg_direction[MAX_BANK];
120 struct mutex i2c_lock;
121
122#ifdef CONFIG_GPIO_PCA953X_IRQ
123 struct mutex irq_lock;
124 u8 irq_mask[MAX_BANK];
125 u8 irq_stat[MAX_BANK];
126 u8 irq_trig_raise[MAX_BANK];
127 u8 irq_trig_fall[MAX_BANK];
128#endif
129
130 struct i2c_client *client;
131 struct gpio_chip gpio_chip;
132 const char *const *names;
133 unsigned long driver_data;
134 struct regulator *regulator;
135
136 const struct pca953x_reg_config *regs;
137
138 int (*write_regs)(struct pca953x_chip *, int, u8 *);
139 int (*read_regs)(struct pca953x_chip *, int, u8 *);
140};
141
142static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
143 int off)
144{
145 int ret;
146 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
147 int offset = off / BANK_SZ;
148
149 ret = i2c_smbus_read_byte_data(chip->client,
150 (reg << bank_shift) + offset);
151 *val = ret;
152
153 if (ret < 0) {
154 dev_err(&chip->client->dev, "failed reading register\n");
155 return ret;
156 }
157
158 return 0;
159}
160
161static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
162 int off)
163{
164 int ret;
165 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
166 int offset = off / BANK_SZ;
167
168 ret = i2c_smbus_write_byte_data(chip->client,
169 (reg << bank_shift) + offset, val);
170
171 if (ret < 0) {
172 dev_err(&chip->client->dev, "failed writing register\n");
173 return ret;
174 }
175
176 return 0;
177}
178
179static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
180{
181 return i2c_smbus_write_byte_data(chip->client, reg, *val);
182}
183
184static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
185{
186 __le16 word = cpu_to_le16(get_unaligned((u16 *)val));
187
188 return i2c_smbus_write_word_data(chip->client,
189 reg << 1, (__force u16)word);
190}
191
192static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
193{
194 int ret;
195
196 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
197 if (ret < 0)
198 return ret;
199
200 return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
201}
202
203static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
204{
205 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
206
207 return i2c_smbus_write_i2c_block_data(chip->client,
208 (reg << bank_shift) | REG_ADDR_AI,
209 NBANK(chip), val);
210}
211
212static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
213{
214 int ret = 0;
215
216 ret = chip->write_regs(chip, reg, val);
217 if (ret < 0) {
218 dev_err(&chip->client->dev, "failed writing register\n");
219 return ret;
220 }
221
222 return 0;
223}
224
225static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
226{
227 int ret;
228
229 ret = i2c_smbus_read_byte_data(chip->client, reg);
230 *val = ret;
231
232 return ret;
233}
234
235static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
236{
237 int ret;
238
239 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
240 val[0] = (u16)ret & 0xFF;
241 val[1] = (u16)ret >> 8;
242
243 return ret;
244}
245
246static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
247{
248 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
249
250 return i2c_smbus_read_i2c_block_data(chip->client,
251 (reg << bank_shift) | REG_ADDR_AI,
252 NBANK(chip), val);
253}
254
255static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
256{
257 int ret;
258
259 ret = chip->read_regs(chip, reg, val);
260 if (ret < 0) {
261 dev_err(&chip->client->dev, "failed reading register\n");
262 return ret;
263 }
264
265 return 0;
266}
267
268static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
269{
270 struct pca953x_chip *chip = gpiochip_get_data(gc);
271 u8 reg_val;
272 int ret;
273
274 mutex_lock(&chip->i2c_lock);
275 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
276
277 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
278 if (ret)
279 goto exit;
280
281 chip->reg_direction[off / BANK_SZ] = reg_val;
282exit:
283 mutex_unlock(&chip->i2c_lock);
284 return ret;
285}
286
287static int pca953x_gpio_direction_output(struct gpio_chip *gc,
288 unsigned off, int val)
289{
290 struct pca953x_chip *chip = gpiochip_get_data(gc);
291 u8 reg_val;
292 int ret;
293
294 mutex_lock(&chip->i2c_lock);
295
296 if (val)
297 reg_val = chip->reg_output[off / BANK_SZ]
298 | (1u << (off % BANK_SZ));
299 else
300 reg_val = chip->reg_output[off / BANK_SZ]
301 & ~(1u << (off % BANK_SZ));
302
303 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
304 if (ret)
305 goto exit;
306
307 chip->reg_output[off / BANK_SZ] = reg_val;
308
309
310 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
311 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
312 if (ret)
313 goto exit;
314
315 chip->reg_direction[off / BANK_SZ] = reg_val;
316exit:
317 mutex_unlock(&chip->i2c_lock);
318 return ret;
319}
320
321static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
322{
323 struct pca953x_chip *chip = gpiochip_get_data(gc);
324 u32 reg_val;
325 int ret;
326
327 mutex_lock(&chip->i2c_lock);
328 ret = pca953x_read_single(chip, chip->regs->input, ®_val, off);
329 mutex_unlock(&chip->i2c_lock);
330 if (ret < 0) {
331
332
333
334
335 return 0;
336 }
337
338 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
339}
340
341static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
342{
343 struct pca953x_chip *chip = gpiochip_get_data(gc);
344 u8 reg_val;
345 int ret;
346
347 mutex_lock(&chip->i2c_lock);
348 if (val)
349 reg_val = chip->reg_output[off / BANK_SZ]
350 | (1u << (off % BANK_SZ));
351 else
352 reg_val = chip->reg_output[off / BANK_SZ]
353 & ~(1u << (off % BANK_SZ));
354
355 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
356 if (ret)
357 goto exit;
358
359 chip->reg_output[off / BANK_SZ] = reg_val;
360exit:
361 mutex_unlock(&chip->i2c_lock);
362}
363
364static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
365 unsigned long *mask, unsigned long *bits)
366{
367 struct pca953x_chip *chip = gpiochip_get_data(gc);
368 unsigned int bank_mask, bank_val;
369 int bank_shift, bank;
370 u8 reg_val[MAX_BANK];
371 int ret;
372
373 bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
374
375 mutex_lock(&chip->i2c_lock);
376 memcpy(reg_val, chip->reg_output, NBANK(chip));
377 for (bank = 0; bank < NBANK(chip); bank++) {
378 bank_mask = mask[bank / sizeof(*mask)] >>
379 ((bank % sizeof(*mask)) * 8);
380 if (bank_mask) {
381 bank_val = bits[bank / sizeof(*bits)] >>
382 ((bank % sizeof(*bits)) * 8);
383 bank_val &= bank_mask;
384 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
385 }
386 }
387
388 ret = i2c_smbus_write_i2c_block_data(chip->client,
389 chip->regs->output << bank_shift,
390 NBANK(chip), reg_val);
391 if (ret)
392 goto exit;
393
394 memcpy(chip->reg_output, reg_val, NBANK(chip));
395exit:
396 mutex_unlock(&chip->i2c_lock);
397}
398
399static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
400{
401 struct gpio_chip *gc;
402
403 gc = &chip->gpio_chip;
404
405 gc->direction_input = pca953x_gpio_direction_input;
406 gc->direction_output = pca953x_gpio_direction_output;
407 gc->get = pca953x_gpio_get_value;
408 gc->set = pca953x_gpio_set_value;
409 gc->set_multiple = pca953x_gpio_set_multiple;
410 gc->can_sleep = true;
411
412 gc->base = chip->gpio_start;
413 gc->ngpio = gpios;
414 gc->label = chip->client->name;
415 gc->parent = &chip->client->dev;
416 gc->owner = THIS_MODULE;
417 gc->names = chip->names;
418}
419
420#ifdef CONFIG_GPIO_PCA953X_IRQ
421static void pca953x_irq_mask(struct irq_data *d)
422{
423 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
424 struct pca953x_chip *chip = gpiochip_get_data(gc);
425
426 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
427}
428
429static void pca953x_irq_unmask(struct irq_data *d)
430{
431 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
432 struct pca953x_chip *chip = gpiochip_get_data(gc);
433
434 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
435}
436
437static void pca953x_irq_bus_lock(struct irq_data *d)
438{
439 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
440 struct pca953x_chip *chip = gpiochip_get_data(gc);
441
442 mutex_lock(&chip->irq_lock);
443}
444
445static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
446{
447 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
448 struct pca953x_chip *chip = gpiochip_get_data(gc);
449 u8 new_irqs;
450 int level, i;
451 u8 invert_irq_mask[MAX_BANK];
452
453 if (chip->driver_data & PCA_PCAL) {
454
455 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
456
457 for (i = 0; i < NBANK(chip); i++)
458 invert_irq_mask[i] = ~chip->irq_mask[i];
459
460
461 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
462 }
463
464
465 for (i = 0; i < NBANK(chip); i++) {
466 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
467 new_irqs &= ~chip->reg_direction[i];
468
469 while (new_irqs) {
470 level = __ffs(new_irqs);
471 pca953x_gpio_direction_input(&chip->gpio_chip,
472 level + (BANK_SZ * i));
473 new_irqs &= ~(1 << level);
474 }
475 }
476
477 mutex_unlock(&chip->irq_lock);
478}
479
480static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
481{
482 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
483 struct pca953x_chip *chip = gpiochip_get_data(gc);
484 int bank_nb = d->hwirq / BANK_SZ;
485 u8 mask = 1 << (d->hwirq % BANK_SZ);
486
487 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
488 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
489 d->irq, type);
490 return -EINVAL;
491 }
492
493 if (type & IRQ_TYPE_EDGE_FALLING)
494 chip->irq_trig_fall[bank_nb] |= mask;
495 else
496 chip->irq_trig_fall[bank_nb] &= ~mask;
497
498 if (type & IRQ_TYPE_EDGE_RISING)
499 chip->irq_trig_raise[bank_nb] |= mask;
500 else
501 chip->irq_trig_raise[bank_nb] &= ~mask;
502
503 return 0;
504}
505
506static struct irq_chip pca953x_irq_chip = {
507 .name = "pca953x",
508 .irq_mask = pca953x_irq_mask,
509 .irq_unmask = pca953x_irq_unmask,
510 .irq_bus_lock = pca953x_irq_bus_lock,
511 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
512 .irq_set_type = pca953x_irq_set_type,
513};
514
515static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
516{
517 u8 cur_stat[MAX_BANK];
518 u8 old_stat[MAX_BANK];
519 bool pending_seen = false;
520 bool trigger_seen = false;
521 u8 trigger[MAX_BANK];
522 int ret, i;
523
524 if (chip->driver_data & PCA_PCAL) {
525
526 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
527 if (ret)
528 return false;
529
530
531 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
532 if (ret)
533 return false;
534
535 for (i = 0; i < NBANK(chip); i++) {
536
537 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
538 (cur_stat[i] & chip->irq_trig_raise[i]);
539 pending[i] &= trigger[i];
540 if (pending[i])
541 pending_seen = true;
542 }
543
544 return pending_seen;
545 }
546
547 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
548 if (ret)
549 return false;
550
551
552 for (i = 0; i < NBANK(chip); i++)
553 cur_stat[i] &= chip->reg_direction[i];
554
555 memcpy(old_stat, chip->irq_stat, NBANK(chip));
556
557 for (i = 0; i < NBANK(chip); i++) {
558 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
559 if (trigger[i])
560 trigger_seen = true;
561 }
562
563 if (!trigger_seen)
564 return false;
565
566 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
567
568 for (i = 0; i < NBANK(chip); i++) {
569 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
570 (cur_stat[i] & chip->irq_trig_raise[i]);
571 pending[i] &= trigger[i];
572 if (pending[i])
573 pending_seen = true;
574 }
575
576 return pending_seen;
577}
578
579static irqreturn_t pca953x_irq_handler(int irq, void *devid)
580{
581 struct pca953x_chip *chip = devid;
582 u8 pending[MAX_BANK];
583 u8 level;
584 unsigned nhandled = 0;
585 int i;
586
587 if (!pca953x_irq_pending(chip, pending))
588 return IRQ_NONE;
589
590 for (i = 0; i < NBANK(chip); i++) {
591 while (pending[i]) {
592 level = __ffs(pending[i]);
593 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
594 level + (BANK_SZ * i)));
595 pending[i] &= ~(1 << level);
596 nhandled++;
597 }
598 }
599
600 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
601}
602
603static int pca953x_irq_setup(struct pca953x_chip *chip,
604 int irq_base)
605{
606 struct i2c_client *client = chip->client;
607 int ret, i;
608
609 if (client->irq && irq_base != -1
610 && (chip->driver_data & PCA_INT)) {
611 ret = pca953x_read_regs(chip,
612 chip->regs->input, chip->irq_stat);
613 if (ret)
614 return ret;
615
616
617
618
619
620
621 for (i = 0; i < NBANK(chip); i++)
622 chip->irq_stat[i] &= chip->reg_direction[i];
623 mutex_init(&chip->irq_lock);
624
625 ret = devm_request_threaded_irq(&client->dev,
626 client->irq,
627 NULL,
628 pca953x_irq_handler,
629 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
630 IRQF_SHARED,
631 dev_name(&client->dev), chip);
632 if (ret) {
633 dev_err(&client->dev, "failed to request irq %d\n",
634 client->irq);
635 return ret;
636 }
637
638 ret = gpiochip_irqchip_add(&chip->gpio_chip,
639 &pca953x_irq_chip,
640 irq_base,
641 handle_simple_irq,
642 IRQ_TYPE_NONE);
643 if (ret) {
644 dev_err(&client->dev,
645 "could not connect irqchip to gpiochip\n");
646 return ret;
647 }
648
649 gpiochip_set_chained_irqchip(&chip->gpio_chip,
650 &pca953x_irq_chip,
651 client->irq, NULL);
652 }
653
654 return 0;
655}
656
657#else
658static int pca953x_irq_setup(struct pca953x_chip *chip,
659 int irq_base)
660{
661 struct i2c_client *client = chip->client;
662
663 if (irq_base != -1 && (chip->driver_data & PCA_INT))
664 dev_warn(&client->dev, "interrupt support not compiled in\n");
665
666 return 0;
667}
668#endif
669
670static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
671{
672 int ret;
673 u8 val[MAX_BANK];
674
675 chip->regs = &pca953x_regs;
676
677 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
678 if (ret)
679 goto out;
680
681 ret = pca953x_read_regs(chip, chip->regs->direction,
682 chip->reg_direction);
683 if (ret)
684 goto out;
685
686
687 if (invert)
688 memset(val, 0xFF, NBANK(chip));
689 else
690 memset(val, 0, NBANK(chip));
691
692 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
693out:
694 return ret;
695}
696
697static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
698{
699 int ret;
700 u8 val[MAX_BANK];
701
702 chip->regs = &pca957x_regs;
703
704 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
705 if (ret)
706 goto out;
707 ret = pca953x_read_regs(chip, chip->regs->direction,
708 chip->reg_direction);
709 if (ret)
710 goto out;
711
712
713 if (invert)
714 memset(val, 0xFF, NBANK(chip));
715 else
716 memset(val, 0, NBANK(chip));
717 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
718 if (ret)
719 goto out;
720
721
722 memset(val, 0x02, NBANK(chip));
723 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
724 if (ret)
725 goto out;
726
727 return 0;
728out:
729 return ret;
730}
731
732static const struct of_device_id pca953x_dt_ids[];
733
734static int pca953x_probe(struct i2c_client *client,
735 const struct i2c_device_id *i2c_id)
736{
737 struct pca953x_platform_data *pdata;
738 struct pca953x_chip *chip;
739 int irq_base = 0;
740 int ret;
741 u32 invert = 0;
742 struct regulator *reg;
743
744 chip = devm_kzalloc(&client->dev,
745 sizeof(struct pca953x_chip), GFP_KERNEL);
746 if (chip == NULL)
747 return -ENOMEM;
748
749 pdata = dev_get_platdata(&client->dev);
750 if (pdata) {
751 irq_base = pdata->irq_base;
752 chip->gpio_start = pdata->gpio_base;
753 invert = pdata->invert;
754 chip->names = pdata->names;
755 } else {
756 chip->gpio_start = -1;
757 irq_base = 0;
758 }
759
760 chip->client = client;
761
762 reg = devm_regulator_get(&client->dev, "vcc");
763 if (IS_ERR(reg)) {
764 ret = PTR_ERR(reg);
765 if (ret != -EPROBE_DEFER)
766 dev_err(&client->dev, "reg get err: %d\n", ret);
767 return ret;
768 }
769 ret = regulator_enable(reg);
770 if (ret) {
771 dev_err(&client->dev, "reg en err: %d\n", ret);
772 return ret;
773 }
774 chip->regulator = reg;
775
776 if (i2c_id) {
777 chip->driver_data = i2c_id->driver_data;
778 } else {
779 const struct acpi_device_id *acpi_id;
780 const struct of_device_id *match;
781
782 match = of_match_device(pca953x_dt_ids, &client->dev);
783 if (match) {
784 chip->driver_data = (int)(uintptr_t)match->data;
785 } else {
786 acpi_id = acpi_match_device(pca953x_acpi_ids, &client->dev);
787 if (!acpi_id) {
788 ret = -ENODEV;
789 goto err_exit;
790 }
791
792 chip->driver_data = acpi_id->driver_data;
793 }
794 }
795
796 mutex_init(&chip->i2c_lock);
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813 lockdep_set_subclass(&chip->i2c_lock,
814 i2c_adapter_depth(client->adapter));
815
816
817
818
819 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
820
821 if (chip->gpio_chip.ngpio <= 8) {
822 chip->write_regs = pca953x_write_regs_8;
823 chip->read_regs = pca953x_read_regs_8;
824 } else if (chip->gpio_chip.ngpio >= 24) {
825 chip->write_regs = pca953x_write_regs_24;
826 chip->read_regs = pca953x_read_regs_24;
827 } else {
828 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
829 chip->write_regs = pca953x_write_regs_16;
830 else
831 chip->write_regs = pca957x_write_regs_16;
832 chip->read_regs = pca953x_read_regs_16;
833 }
834
835 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
836 ret = device_pca953x_init(chip, invert);
837 else
838 ret = device_pca957x_init(chip, invert);
839 if (ret)
840 goto err_exit;
841
842 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
843 if (ret)
844 goto err_exit;
845
846 ret = pca953x_irq_setup(chip, irq_base);
847 if (ret)
848 goto err_exit;
849
850 if (pdata && pdata->setup) {
851 ret = pdata->setup(client, chip->gpio_chip.base,
852 chip->gpio_chip.ngpio, pdata->context);
853 if (ret < 0)
854 dev_warn(&client->dev, "setup failed, %d\n", ret);
855 }
856
857 i2c_set_clientdata(client, chip);
858 return 0;
859
860err_exit:
861 regulator_disable(chip->regulator);
862 return ret;
863}
864
865static int pca953x_remove(struct i2c_client *client)
866{
867 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
868 struct pca953x_chip *chip = i2c_get_clientdata(client);
869 int ret;
870
871 if (pdata && pdata->teardown) {
872 ret = pdata->teardown(client, chip->gpio_chip.base,
873 chip->gpio_chip.ngpio, pdata->context);
874 if (ret < 0)
875 dev_err(&client->dev, "%s failed, %d\n",
876 "teardown", ret);
877 } else {
878 ret = 0;
879 }
880
881 regulator_disable(chip->regulator);
882
883 return ret;
884}
885
886
887#define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
888#define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
889
890static const struct of_device_id pca953x_dt_ids[] = {
891 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
892 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
893 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
894 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
895 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
896 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
897 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
898 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
899 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
900 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
901 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
902 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
903 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
904 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
905
906 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
907 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
908 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
909 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
910
911 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
912 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
913 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
914 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
915 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
916
917 { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
918
919 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
920 { }
921};
922
923MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
924
925static struct i2c_driver pca953x_driver = {
926 .driver = {
927 .name = "pca953x",
928 .of_match_table = pca953x_dt_ids,
929 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
930 },
931 .probe = pca953x_probe,
932 .remove = pca953x_remove,
933 .id_table = pca953x_id,
934};
935
936static int __init pca953x_init(void)
937{
938 return i2c_add_driver(&pca953x_driver);
939}
940
941
942
943subsys_initcall(pca953x_init);
944
945static void __exit pca953x_exit(void)
946{
947 i2c_del_driver(&pca953x_driver);
948}
949module_exit(pca953x_exit);
950
951MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
952MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
953MODULE_LICENSE("GPL");
954
