linux/drivers/iio/adc/ad7476.c
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   1/*
   2 * AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
   3 *
   4 * Copyright 2010 Analog Devices Inc.
   5 *
   6 * Licensed under the GPL-2 or later.
   7 */
   8
   9#include <linux/device.h>
  10#include <linux/kernel.h>
  11#include <linux/slab.h>
  12#include <linux/sysfs.h>
  13#include <linux/spi/spi.h>
  14#include <linux/regulator/consumer.h>
  15#include <linux/err.h>
  16#include <linux/module.h>
  17#include <linux/bitops.h>
  18
  19#include <linux/iio/iio.h>
  20#include <linux/iio/sysfs.h>
  21#include <linux/iio/buffer.h>
  22#include <linux/iio/trigger_consumer.h>
  23#include <linux/iio/triggered_buffer.h>
  24
  25struct ad7476_state;
  26
  27struct ad7476_chip_info {
  28        unsigned int                    int_vref_uv;
  29        struct iio_chan_spec            channel[2];
  30        void (*reset)(struct ad7476_state *);
  31};
  32
  33struct ad7476_state {
  34        struct spi_device               *spi;
  35        const struct ad7476_chip_info   *chip_info;
  36        struct regulator                *reg;
  37        struct spi_transfer             xfer;
  38        struct spi_message              msg;
  39        /*
  40         * DMA (thus cache coherency maintenance) requires the
  41         * transfer buffers to live in their own cache lines.
  42         * Make the buffer large enough for one 16 bit sample and one 64 bit
  43         * aligned 64 bit timestamp.
  44         */
  45        unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
  46                        ____cacheline_aligned;
  47};
  48
  49enum ad7476_supported_device_ids {
  50        ID_AD7091R,
  51        ID_AD7276,
  52        ID_AD7277,
  53        ID_AD7278,
  54        ID_AD7466,
  55        ID_AD7467,
  56        ID_AD7468,
  57        ID_AD7495,
  58        ID_AD7940,
  59};
  60
  61static irqreturn_t ad7476_trigger_handler(int irq, void  *p)
  62{
  63        struct iio_poll_func *pf = p;
  64        struct iio_dev *indio_dev = pf->indio_dev;
  65        struct ad7476_state *st = iio_priv(indio_dev);
  66        int b_sent;
  67
  68        b_sent = spi_sync(st->spi, &st->msg);
  69        if (b_sent < 0)
  70                goto done;
  71
  72        iio_push_to_buffers_with_timestamp(indio_dev, st->data,
  73                iio_get_time_ns(indio_dev));
  74done:
  75        iio_trigger_notify_done(indio_dev->trig);
  76
  77        return IRQ_HANDLED;
  78}
  79
  80static void ad7091_reset(struct ad7476_state *st)
  81{
  82        /* Any transfers with 8 scl cycles will reset the device */
  83        spi_read(st->spi, st->data, 1);
  84}
  85
  86static int ad7476_scan_direct(struct ad7476_state *st)
  87{
  88        int ret;
  89
  90        ret = spi_sync(st->spi, &st->msg);
  91        if (ret)
  92                return ret;
  93
  94        return be16_to_cpup((__be16 *)st->data);
  95}
  96
  97static int ad7476_read_raw(struct iio_dev *indio_dev,
  98                           struct iio_chan_spec const *chan,
  99                           int *val,
 100                           int *val2,
 101                           long m)
 102{
 103        int ret;
 104        struct ad7476_state *st = iio_priv(indio_dev);
 105        int scale_uv;
 106
 107        switch (m) {
 108        case IIO_CHAN_INFO_RAW:
 109                ret = iio_device_claim_direct_mode(indio_dev);
 110                if (ret)
 111                        return ret;
 112                ret = ad7476_scan_direct(st);
 113                iio_device_release_direct_mode(indio_dev);
 114
 115                if (ret < 0)
 116                        return ret;
 117                *val = (ret >> st->chip_info->channel[0].scan_type.shift) &
 118                        GENMASK(st->chip_info->channel[0].scan_type.realbits - 1, 0);
 119                return IIO_VAL_INT;
 120        case IIO_CHAN_INFO_SCALE:
 121                if (!st->chip_info->int_vref_uv) {
 122                        scale_uv = regulator_get_voltage(st->reg);
 123                        if (scale_uv < 0)
 124                                return scale_uv;
 125                } else {
 126                        scale_uv = st->chip_info->int_vref_uv;
 127                }
 128                *val = scale_uv / 1000;
 129                *val2 = chan->scan_type.realbits;
 130                return IIO_VAL_FRACTIONAL_LOG2;
 131        }
 132        return -EINVAL;
 133}
 134
 135#define _AD7476_CHAN(bits, _shift, _info_mask_sep)              \
 136        {                                                       \
 137        .type = IIO_VOLTAGE,                                    \
 138        .indexed = 1,                                           \
 139        .info_mask_separate = _info_mask_sep,                   \
 140        .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),   \
 141        .scan_type = {                                          \
 142                .sign = 'u',                                    \
 143                .realbits = (bits),                             \
 144                .storagebits = 16,                              \
 145                .shift = (_shift),                              \
 146                .endianness = IIO_BE,                           \
 147        },                                                      \
 148}
 149
 150#define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
 151                BIT(IIO_CHAN_INFO_RAW))
 152#define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
 153                BIT(IIO_CHAN_INFO_RAW))
 154#define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
 155
 156static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
 157        [ID_AD7091R] = {
 158                .channel[0] = AD7091R_CHAN(12),
 159                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 160                .reset = ad7091_reset,
 161        },
 162        [ID_AD7276] = {
 163                .channel[0] = AD7940_CHAN(12),
 164                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 165        },
 166        [ID_AD7277] = {
 167                .channel[0] = AD7940_CHAN(10),
 168                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 169        },
 170        [ID_AD7278] = {
 171                .channel[0] = AD7940_CHAN(8),
 172                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 173        },
 174        [ID_AD7466] = {
 175                .channel[0] = AD7476_CHAN(12),
 176                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 177        },
 178        [ID_AD7467] = {
 179                .channel[0] = AD7476_CHAN(10),
 180                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 181        },
 182        [ID_AD7468] = {
 183                .channel[0] = AD7476_CHAN(8),
 184                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 185        },
 186        [ID_AD7495] = {
 187                .channel[0] = AD7476_CHAN(12),
 188                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 189                .int_vref_uv = 2500000,
 190        },
 191        [ID_AD7940] = {
 192                .channel[0] = AD7940_CHAN(14),
 193                .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 194        },
 195};
 196
 197static const struct iio_info ad7476_info = {
 198        .driver_module = THIS_MODULE,
 199        .read_raw = &ad7476_read_raw,
 200};
 201
 202static int ad7476_probe(struct spi_device *spi)
 203{
 204        struct ad7476_state *st;
 205        struct iio_dev *indio_dev;
 206        int ret;
 207
 208        indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 209        if (!indio_dev)
 210                return -ENOMEM;
 211
 212        st = iio_priv(indio_dev);
 213        st->chip_info =
 214                &ad7476_chip_info_tbl[spi_get_device_id(spi)->driver_data];
 215
 216        st->reg = devm_regulator_get(&spi->dev, "vcc");
 217        if (IS_ERR(st->reg))
 218                return PTR_ERR(st->reg);
 219
 220        ret = regulator_enable(st->reg);
 221        if (ret)
 222                return ret;
 223
 224        spi_set_drvdata(spi, indio_dev);
 225
 226        st->spi = spi;
 227
 228        /* Establish that the iio_dev is a child of the spi device */
 229        indio_dev->dev.parent = &spi->dev;
 230        indio_dev->dev.of_node = spi->dev.of_node;
 231        indio_dev->name = spi_get_device_id(spi)->name;
 232        indio_dev->modes = INDIO_DIRECT_MODE;
 233        indio_dev->channels = st->chip_info->channel;
 234        indio_dev->num_channels = 2;
 235        indio_dev->info = &ad7476_info;
 236        /* Setup default message */
 237
 238        st->xfer.rx_buf = &st->data;
 239        st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8;
 240
 241        spi_message_init(&st->msg);
 242        spi_message_add_tail(&st->xfer, &st->msg);
 243
 244        ret = iio_triggered_buffer_setup(indio_dev, NULL,
 245                        &ad7476_trigger_handler, NULL);
 246        if (ret)
 247                goto error_disable_reg;
 248
 249        if (st->chip_info->reset)
 250                st->chip_info->reset(st);
 251
 252        ret = iio_device_register(indio_dev);
 253        if (ret)
 254                goto error_ring_unregister;
 255        return 0;
 256
 257error_ring_unregister:
 258        iio_triggered_buffer_cleanup(indio_dev);
 259error_disable_reg:
 260        regulator_disable(st->reg);
 261
 262        return ret;
 263}
 264
 265static int ad7476_remove(struct spi_device *spi)
 266{
 267        struct iio_dev *indio_dev = spi_get_drvdata(spi);
 268        struct ad7476_state *st = iio_priv(indio_dev);
 269
 270        iio_device_unregister(indio_dev);
 271        iio_triggered_buffer_cleanup(indio_dev);
 272        regulator_disable(st->reg);
 273
 274        return 0;
 275}
 276
 277static const struct spi_device_id ad7476_id[] = {
 278        {"ad7091r", ID_AD7091R},
 279        {"ad7273", ID_AD7277},
 280        {"ad7274", ID_AD7276},
 281        {"ad7276", ID_AD7276},
 282        {"ad7277", ID_AD7277},
 283        {"ad7278", ID_AD7278},
 284        {"ad7466", ID_AD7466},
 285        {"ad7467", ID_AD7467},
 286        {"ad7468", ID_AD7468},
 287        {"ad7475", ID_AD7466},
 288        {"ad7476", ID_AD7466},
 289        {"ad7476a", ID_AD7466},
 290        {"ad7477", ID_AD7467},
 291        {"ad7477a", ID_AD7467},
 292        {"ad7478", ID_AD7468},
 293        {"ad7478a", ID_AD7468},
 294        {"ad7495", ID_AD7495},
 295        {"ad7910", ID_AD7467},
 296        {"ad7920", ID_AD7466},
 297        {"ad7940", ID_AD7940},
 298        {}
 299};
 300MODULE_DEVICE_TABLE(spi, ad7476_id);
 301
 302static struct spi_driver ad7476_driver = {
 303        .driver = {
 304                .name   = "ad7476",
 305        },
 306        .probe          = ad7476_probe,
 307        .remove         = ad7476_remove,
 308        .id_table       = ad7476_id,
 309};
 310module_spi_driver(ad7476_driver);
 311
 312MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 313MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs");
 314MODULE_LICENSE("GPL v2");
 315