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19#include <linux/bug.h>
20#include <linux/err.h>
21#include <linux/gpio.h>
22#include <linux/slab.h>
23#include <linux/module.h>
24#include <linux/of.h>
25#include <linux/regmap.h>
26#include <linux/platform_device.h>
27#include <linux/regulator/driver.h>
28#include <linux/regulator/machine.h>
29#include <linux/regulator/of_regulator.h>
30#include <linux/of_gpio.h>
31#include <linux/mfd/samsung/core.h>
32#include <linux/mfd/samsung/s2mps11.h>
33#include <linux/mfd/samsung/s2mps13.h>
34#include <linux/mfd/samsung/s2mps14.h>
35#include <linux/mfd/samsung/s2mps15.h>
36#include <linux/mfd/samsung/s2mpu02.h>
37
38
39#define S2MPS_REGULATOR_MAX S2MPS13_REGULATOR_MAX
40struct s2mps11_info {
41 int ramp_delay2;
42 int ramp_delay34;
43 int ramp_delay5;
44 int ramp_delay16;
45 int ramp_delay7810;
46 int ramp_delay9;
47
48 enum sec_device_type dev_type;
49
50
51
52
53
54 DECLARE_BITMAP(suspend_state, S2MPS_REGULATOR_MAX);
55
56
57
58
59
60 int *ext_control_gpio;
61};
62
63static int get_ramp_delay(int ramp_delay)
64{
65 unsigned char cnt = 0;
66
67 ramp_delay /= 6250;
68
69 while (true) {
70 ramp_delay = ramp_delay >> 1;
71 if (ramp_delay == 0)
72 break;
73 cnt++;
74 }
75
76 if (cnt > 3)
77 cnt = 3;
78
79 return cnt;
80}
81
82static int s2mps11_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
83 unsigned int old_selector,
84 unsigned int new_selector)
85{
86 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
87 unsigned int ramp_delay = 0;
88 int old_volt, new_volt;
89
90 switch (rdev_get_id(rdev)) {
91 case S2MPS11_BUCK2:
92 ramp_delay = s2mps11->ramp_delay2;
93 break;
94 case S2MPS11_BUCK3:
95 case S2MPS11_BUCK4:
96 ramp_delay = s2mps11->ramp_delay34;
97 break;
98 case S2MPS11_BUCK5:
99 ramp_delay = s2mps11->ramp_delay5;
100 break;
101 case S2MPS11_BUCK6:
102 case S2MPS11_BUCK1:
103 ramp_delay = s2mps11->ramp_delay16;
104 break;
105 case S2MPS11_BUCK7:
106 case S2MPS11_BUCK8:
107 case S2MPS11_BUCK10:
108 ramp_delay = s2mps11->ramp_delay7810;
109 break;
110 case S2MPS11_BUCK9:
111 ramp_delay = s2mps11->ramp_delay9;
112 }
113
114 if (ramp_delay == 0)
115 ramp_delay = rdev->desc->ramp_delay;
116
117 old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector);
118 new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector);
119
120 return DIV_ROUND_UP(abs(new_volt - old_volt), ramp_delay);
121}
122
123static int s2mps11_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
124{
125 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
126 unsigned int ramp_val, ramp_shift, ramp_reg = S2MPS11_REG_RAMP_BUCK;
127 unsigned int ramp_enable = 1, enable_shift = 0;
128 int ret;
129
130 switch (rdev_get_id(rdev)) {
131 case S2MPS11_BUCK1:
132 if (ramp_delay > s2mps11->ramp_delay16)
133 s2mps11->ramp_delay16 = ramp_delay;
134 else
135 ramp_delay = s2mps11->ramp_delay16;
136
137 ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT;
138 break;
139 case S2MPS11_BUCK2:
140 enable_shift = S2MPS11_BUCK2_RAMP_EN_SHIFT;
141 if (!ramp_delay) {
142 ramp_enable = 0;
143 break;
144 }
145
146 s2mps11->ramp_delay2 = ramp_delay;
147 ramp_shift = S2MPS11_BUCK2_RAMP_SHIFT;
148 ramp_reg = S2MPS11_REG_RAMP;
149 break;
150 case S2MPS11_BUCK3:
151 enable_shift = S2MPS11_BUCK3_RAMP_EN_SHIFT;
152 if (!ramp_delay) {
153 ramp_enable = 0;
154 break;
155 }
156
157 if (ramp_delay > s2mps11->ramp_delay34)
158 s2mps11->ramp_delay34 = ramp_delay;
159 else
160 ramp_delay = s2mps11->ramp_delay34;
161
162 ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT;
163 ramp_reg = S2MPS11_REG_RAMP;
164 break;
165 case S2MPS11_BUCK4:
166 enable_shift = S2MPS11_BUCK4_RAMP_EN_SHIFT;
167 if (!ramp_delay) {
168 ramp_enable = 0;
169 break;
170 }
171
172 if (ramp_delay > s2mps11->ramp_delay34)
173 s2mps11->ramp_delay34 = ramp_delay;
174 else
175 ramp_delay = s2mps11->ramp_delay34;
176
177 ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT;
178 ramp_reg = S2MPS11_REG_RAMP;
179 break;
180 case S2MPS11_BUCK5:
181 s2mps11->ramp_delay5 = ramp_delay;
182 ramp_shift = S2MPS11_BUCK5_RAMP_SHIFT;
183 break;
184 case S2MPS11_BUCK6:
185 enable_shift = S2MPS11_BUCK6_RAMP_EN_SHIFT;
186 if (!ramp_delay) {
187 ramp_enable = 0;
188 break;
189 }
190
191 if (ramp_delay > s2mps11->ramp_delay16)
192 s2mps11->ramp_delay16 = ramp_delay;
193 else
194 ramp_delay = s2mps11->ramp_delay16;
195
196 ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT;
197 break;
198 case S2MPS11_BUCK7:
199 case S2MPS11_BUCK8:
200 case S2MPS11_BUCK10:
201 if (ramp_delay > s2mps11->ramp_delay7810)
202 s2mps11->ramp_delay7810 = ramp_delay;
203 else
204 ramp_delay = s2mps11->ramp_delay7810;
205
206 ramp_shift = S2MPS11_BUCK7810_RAMP_SHIFT;
207 break;
208 case S2MPS11_BUCK9:
209 s2mps11->ramp_delay9 = ramp_delay;
210 ramp_shift = S2MPS11_BUCK9_RAMP_SHIFT;
211 break;
212 default:
213 return 0;
214 }
215
216 if (!ramp_enable)
217 goto ramp_disable;
218
219
220 if ((rdev_get_id(rdev) >= S2MPS11_BUCK2 &&
221 rdev_get_id(rdev) <= S2MPS11_BUCK4) ||
222 rdev_get_id(rdev) == S2MPS11_BUCK6) {
223 ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP,
224 1 << enable_shift, 1 << enable_shift);
225 if (ret) {
226 dev_err(&rdev->dev, "failed to enable ramp rate\n");
227 return ret;
228 }
229 }
230
231 ramp_val = get_ramp_delay(ramp_delay);
232
233 return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift,
234 ramp_val << ramp_shift);
235
236ramp_disable:
237 return regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP,
238 1 << enable_shift, 0);
239}
240
241static struct regulator_ops s2mps11_ldo_ops = {
242 .list_voltage = regulator_list_voltage_linear,
243 .map_voltage = regulator_map_voltage_linear,
244 .is_enabled = regulator_is_enabled_regmap,
245 .enable = regulator_enable_regmap,
246 .disable = regulator_disable_regmap,
247 .get_voltage_sel = regulator_get_voltage_sel_regmap,
248 .set_voltage_sel = regulator_set_voltage_sel_regmap,
249 .set_voltage_time_sel = regulator_set_voltage_time_sel,
250};
251
252static struct regulator_ops s2mps11_buck_ops = {
253 .list_voltage = regulator_list_voltage_linear,
254 .map_voltage = regulator_map_voltage_linear,
255 .is_enabled = regulator_is_enabled_regmap,
256 .enable = regulator_enable_regmap,
257 .disable = regulator_disable_regmap,
258 .get_voltage_sel = regulator_get_voltage_sel_regmap,
259 .set_voltage_sel = regulator_set_voltage_sel_regmap,
260 .set_voltage_time_sel = s2mps11_regulator_set_voltage_time_sel,
261 .set_ramp_delay = s2mps11_set_ramp_delay,
262};
263
264#define regulator_desc_s2mps11_ldo(num, step) { \
265 .name = "LDO"#num, \
266 .id = S2MPS11_LDO##num, \
267 .ops = &s2mps11_ldo_ops, \
268 .type = REGULATOR_VOLTAGE, \
269 .owner = THIS_MODULE, \
270 .ramp_delay = RAMP_DELAY_12_MVUS, \
271 .min_uV = MIN_800_MV, \
272 .uV_step = step, \
273 .n_voltages = S2MPS11_LDO_N_VOLTAGES, \
274 .vsel_reg = S2MPS11_REG_L1CTRL + num - 1, \
275 .vsel_mask = S2MPS11_LDO_VSEL_MASK, \
276 .enable_reg = S2MPS11_REG_L1CTRL + num - 1, \
277 .enable_mask = S2MPS11_ENABLE_MASK \
278}
279
280#define regulator_desc_s2mps11_buck1_4(num) { \
281 .name = "BUCK"#num, \
282 .id = S2MPS11_BUCK##num, \
283 .ops = &s2mps11_buck_ops, \
284 .type = REGULATOR_VOLTAGE, \
285 .owner = THIS_MODULE, \
286 .min_uV = MIN_600_MV, \
287 .uV_step = STEP_6_25_MV, \
288 .n_voltages = S2MPS11_BUCK_N_VOLTAGES, \
289 .ramp_delay = S2MPS11_RAMP_DELAY, \
290 .vsel_reg = S2MPS11_REG_B1CTRL2 + (num - 1) * 2, \
291 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \
292 .enable_reg = S2MPS11_REG_B1CTRL1 + (num - 1) * 2, \
293 .enable_mask = S2MPS11_ENABLE_MASK \
294}
295
296#define regulator_desc_s2mps11_buck5 { \
297 .name = "BUCK5", \
298 .id = S2MPS11_BUCK5, \
299 .ops = &s2mps11_buck_ops, \
300 .type = REGULATOR_VOLTAGE, \
301 .owner = THIS_MODULE, \
302 .min_uV = MIN_600_MV, \
303 .uV_step = STEP_6_25_MV, \
304 .n_voltages = S2MPS11_BUCK_N_VOLTAGES, \
305 .ramp_delay = S2MPS11_RAMP_DELAY, \
306 .vsel_reg = S2MPS11_REG_B5CTRL2, \
307 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \
308 .enable_reg = S2MPS11_REG_B5CTRL1, \
309 .enable_mask = S2MPS11_ENABLE_MASK \
310}
311
312#define regulator_desc_s2mps11_buck67810(num, min, step) { \
313 .name = "BUCK"#num, \
314 .id = S2MPS11_BUCK##num, \
315 .ops = &s2mps11_buck_ops, \
316 .type = REGULATOR_VOLTAGE, \
317 .owner = THIS_MODULE, \
318 .min_uV = min, \
319 .uV_step = step, \
320 .n_voltages = S2MPS11_BUCK_N_VOLTAGES, \
321 .ramp_delay = S2MPS11_RAMP_DELAY, \
322 .vsel_reg = S2MPS11_REG_B6CTRL2 + (num - 6) * 2, \
323 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \
324 .enable_reg = S2MPS11_REG_B6CTRL1 + (num - 6) * 2, \
325 .enable_mask = S2MPS11_ENABLE_MASK \
326}
327
328#define regulator_desc_s2mps11_buck9 { \
329 .name = "BUCK9", \
330 .id = S2MPS11_BUCK9, \
331 .ops = &s2mps11_buck_ops, \
332 .type = REGULATOR_VOLTAGE, \
333 .owner = THIS_MODULE, \
334 .min_uV = MIN_3000_MV, \
335 .uV_step = STEP_25_MV, \
336 .n_voltages = S2MPS11_BUCK9_N_VOLTAGES, \
337 .ramp_delay = S2MPS11_RAMP_DELAY, \
338 .vsel_reg = S2MPS11_REG_B9CTRL2, \
339 .vsel_mask = S2MPS11_BUCK9_VSEL_MASK, \
340 .enable_reg = S2MPS11_REG_B9CTRL1, \
341 .enable_mask = S2MPS11_ENABLE_MASK \
342}
343
344static const struct regulator_desc s2mps11_regulators[] = {
345 regulator_desc_s2mps11_ldo(1, STEP_25_MV),
346 regulator_desc_s2mps11_ldo(2, STEP_50_MV),
347 regulator_desc_s2mps11_ldo(3, STEP_50_MV),
348 regulator_desc_s2mps11_ldo(4, STEP_50_MV),
349 regulator_desc_s2mps11_ldo(5, STEP_50_MV),
350 regulator_desc_s2mps11_ldo(6, STEP_25_MV),
351 regulator_desc_s2mps11_ldo(7, STEP_50_MV),
352 regulator_desc_s2mps11_ldo(8, STEP_50_MV),
353 regulator_desc_s2mps11_ldo(9, STEP_50_MV),
354 regulator_desc_s2mps11_ldo(10, STEP_50_MV),
355 regulator_desc_s2mps11_ldo(11, STEP_25_MV),
356 regulator_desc_s2mps11_ldo(12, STEP_50_MV),
357 regulator_desc_s2mps11_ldo(13, STEP_50_MV),
358 regulator_desc_s2mps11_ldo(14, STEP_50_MV),
359 regulator_desc_s2mps11_ldo(15, STEP_50_MV),
360 regulator_desc_s2mps11_ldo(16, STEP_50_MV),
361 regulator_desc_s2mps11_ldo(17, STEP_50_MV),
362 regulator_desc_s2mps11_ldo(18, STEP_50_MV),
363 regulator_desc_s2mps11_ldo(19, STEP_50_MV),
364 regulator_desc_s2mps11_ldo(20, STEP_50_MV),
365 regulator_desc_s2mps11_ldo(21, STEP_50_MV),
366 regulator_desc_s2mps11_ldo(22, STEP_25_MV),
367 regulator_desc_s2mps11_ldo(23, STEP_25_MV),
368 regulator_desc_s2mps11_ldo(24, STEP_50_MV),
369 regulator_desc_s2mps11_ldo(25, STEP_50_MV),
370 regulator_desc_s2mps11_ldo(26, STEP_50_MV),
371 regulator_desc_s2mps11_ldo(27, STEP_25_MV),
372 regulator_desc_s2mps11_ldo(28, STEP_50_MV),
373 regulator_desc_s2mps11_ldo(29, STEP_50_MV),
374 regulator_desc_s2mps11_ldo(30, STEP_50_MV),
375 regulator_desc_s2mps11_ldo(31, STEP_50_MV),
376 regulator_desc_s2mps11_ldo(32, STEP_50_MV),
377 regulator_desc_s2mps11_ldo(33, STEP_50_MV),
378 regulator_desc_s2mps11_ldo(34, STEP_50_MV),
379 regulator_desc_s2mps11_ldo(35, STEP_50_MV),
380 regulator_desc_s2mps11_ldo(36, STEP_50_MV),
381 regulator_desc_s2mps11_ldo(37, STEP_50_MV),
382 regulator_desc_s2mps11_ldo(38, STEP_50_MV),
383 regulator_desc_s2mps11_buck1_4(1),
384 regulator_desc_s2mps11_buck1_4(2),
385 regulator_desc_s2mps11_buck1_4(3),
386 regulator_desc_s2mps11_buck1_4(4),
387 regulator_desc_s2mps11_buck5,
388 regulator_desc_s2mps11_buck67810(6, MIN_600_MV, STEP_6_25_MV),
389 regulator_desc_s2mps11_buck67810(7, MIN_600_MV, STEP_6_25_MV),
390 regulator_desc_s2mps11_buck67810(8, MIN_600_MV, STEP_6_25_MV),
391 regulator_desc_s2mps11_buck9,
392 regulator_desc_s2mps11_buck67810(10, MIN_750_MV, STEP_12_5_MV),
393};
394
395static struct regulator_ops s2mps14_reg_ops;
396
397#define regulator_desc_s2mps13_ldo(num, min, step, min_sel) { \
398 .name = "LDO"#num, \
399 .id = S2MPS13_LDO##num, \
400 .ops = &s2mps14_reg_ops, \
401 .type = REGULATOR_VOLTAGE, \
402 .owner = THIS_MODULE, \
403 .min_uV = min, \
404 .uV_step = step, \
405 .linear_min_sel = min_sel, \
406 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \
407 .vsel_reg = S2MPS13_REG_L1CTRL + num - 1, \
408 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \
409 .enable_reg = S2MPS13_REG_L1CTRL + num - 1, \
410 .enable_mask = S2MPS14_ENABLE_MASK \
411}
412
413#define regulator_desc_s2mps13_buck(num, min, step, min_sel) { \
414 .name = "BUCK"#num, \
415 .id = S2MPS13_BUCK##num, \
416 .ops = &s2mps14_reg_ops, \
417 .type = REGULATOR_VOLTAGE, \
418 .owner = THIS_MODULE, \
419 .min_uV = min, \
420 .uV_step = step, \
421 .linear_min_sel = min_sel, \
422 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
423 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \
424 .vsel_reg = S2MPS13_REG_B1OUT + (num - 1) * 2, \
425 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
426 .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \
427 .enable_mask = S2MPS14_ENABLE_MASK \
428}
429
430#define regulator_desc_s2mps13_buck7(num, min, step, min_sel) { \
431 .name = "BUCK"#num, \
432 .id = S2MPS13_BUCK##num, \
433 .ops = &s2mps14_reg_ops, \
434 .type = REGULATOR_VOLTAGE, \
435 .owner = THIS_MODULE, \
436 .min_uV = min, \
437 .uV_step = step, \
438 .linear_min_sel = min_sel, \
439 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
440 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \
441 .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \
442 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
443 .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \
444 .enable_mask = S2MPS14_ENABLE_MASK \
445}
446
447#define regulator_desc_s2mps13_buck8_10(num, min, step, min_sel) { \
448 .name = "BUCK"#num, \
449 .id = S2MPS13_BUCK##num, \
450 .ops = &s2mps14_reg_ops, \
451 .type = REGULATOR_VOLTAGE, \
452 .owner = THIS_MODULE, \
453 .min_uV = min, \
454 .uV_step = step, \
455 .linear_min_sel = min_sel, \
456 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
457 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \
458 .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \
459 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
460 .enable_reg = S2MPS13_REG_B1CTRL + (num) * 2 - 1, \
461 .enable_mask = S2MPS14_ENABLE_MASK \
462}
463
464static const struct regulator_desc s2mps13_regulators[] = {
465 regulator_desc_s2mps13_ldo(1, MIN_800_MV, STEP_12_5_MV, 0x00),
466 regulator_desc_s2mps13_ldo(2, MIN_1400_MV, STEP_50_MV, 0x0C),
467 regulator_desc_s2mps13_ldo(3, MIN_1000_MV, STEP_25_MV, 0x08),
468 regulator_desc_s2mps13_ldo(4, MIN_800_MV, STEP_12_5_MV, 0x00),
469 regulator_desc_s2mps13_ldo(5, MIN_800_MV, STEP_12_5_MV, 0x00),
470 regulator_desc_s2mps13_ldo(6, MIN_800_MV, STEP_12_5_MV, 0x00),
471 regulator_desc_s2mps13_ldo(7, MIN_1000_MV, STEP_25_MV, 0x08),
472 regulator_desc_s2mps13_ldo(8, MIN_1000_MV, STEP_25_MV, 0x08),
473 regulator_desc_s2mps13_ldo(9, MIN_1000_MV, STEP_25_MV, 0x08),
474 regulator_desc_s2mps13_ldo(10, MIN_1400_MV, STEP_50_MV, 0x0C),
475 regulator_desc_s2mps13_ldo(11, MIN_800_MV, STEP_25_MV, 0x10),
476 regulator_desc_s2mps13_ldo(12, MIN_800_MV, STEP_25_MV, 0x10),
477 regulator_desc_s2mps13_ldo(13, MIN_800_MV, STEP_25_MV, 0x10),
478 regulator_desc_s2mps13_ldo(14, MIN_800_MV, STEP_12_5_MV, 0x00),
479 regulator_desc_s2mps13_ldo(15, MIN_800_MV, STEP_12_5_MV, 0x00),
480 regulator_desc_s2mps13_ldo(16, MIN_1400_MV, STEP_50_MV, 0x0C),
481 regulator_desc_s2mps13_ldo(17, MIN_1400_MV, STEP_50_MV, 0x0C),
482 regulator_desc_s2mps13_ldo(18, MIN_1000_MV, STEP_25_MV, 0x08),
483 regulator_desc_s2mps13_ldo(19, MIN_1000_MV, STEP_25_MV, 0x08),
484 regulator_desc_s2mps13_ldo(20, MIN_1400_MV, STEP_50_MV, 0x0C),
485 regulator_desc_s2mps13_ldo(21, MIN_1000_MV, STEP_25_MV, 0x08),
486 regulator_desc_s2mps13_ldo(22, MIN_1000_MV, STEP_25_MV, 0x08),
487 regulator_desc_s2mps13_ldo(23, MIN_800_MV, STEP_12_5_MV, 0x00),
488 regulator_desc_s2mps13_ldo(24, MIN_800_MV, STEP_12_5_MV, 0x00),
489 regulator_desc_s2mps13_ldo(25, MIN_1400_MV, STEP_50_MV, 0x0C),
490 regulator_desc_s2mps13_ldo(26, MIN_1400_MV, STEP_50_MV, 0x0C),
491 regulator_desc_s2mps13_ldo(27, MIN_1400_MV, STEP_50_MV, 0x0C),
492 regulator_desc_s2mps13_ldo(28, MIN_1000_MV, STEP_25_MV, 0x08),
493 regulator_desc_s2mps13_ldo(29, MIN_1400_MV, STEP_50_MV, 0x0C),
494 regulator_desc_s2mps13_ldo(30, MIN_1400_MV, STEP_50_MV, 0x0C),
495 regulator_desc_s2mps13_ldo(31, MIN_1000_MV, STEP_25_MV, 0x08),
496 regulator_desc_s2mps13_ldo(32, MIN_1000_MV, STEP_25_MV, 0x08),
497 regulator_desc_s2mps13_ldo(33, MIN_1400_MV, STEP_50_MV, 0x0C),
498 regulator_desc_s2mps13_ldo(34, MIN_1000_MV, STEP_25_MV, 0x08),
499 regulator_desc_s2mps13_ldo(35, MIN_1400_MV, STEP_50_MV, 0x0C),
500 regulator_desc_s2mps13_ldo(36, MIN_800_MV, STEP_12_5_MV, 0x00),
501 regulator_desc_s2mps13_ldo(37, MIN_1000_MV, STEP_25_MV, 0x08),
502 regulator_desc_s2mps13_ldo(38, MIN_1400_MV, STEP_50_MV, 0x0C),
503 regulator_desc_s2mps13_ldo(39, MIN_1000_MV, STEP_25_MV, 0x08),
504 regulator_desc_s2mps13_ldo(40, MIN_1400_MV, STEP_50_MV, 0x0C),
505 regulator_desc_s2mps13_buck(1, MIN_500_MV, STEP_6_25_MV, 0x10),
506 regulator_desc_s2mps13_buck(2, MIN_500_MV, STEP_6_25_MV, 0x10),
507 regulator_desc_s2mps13_buck(3, MIN_500_MV, STEP_6_25_MV, 0x10),
508 regulator_desc_s2mps13_buck(4, MIN_500_MV, STEP_6_25_MV, 0x10),
509 regulator_desc_s2mps13_buck(5, MIN_500_MV, STEP_6_25_MV, 0x10),
510 regulator_desc_s2mps13_buck(6, MIN_500_MV, STEP_6_25_MV, 0x10),
511 regulator_desc_s2mps13_buck7(7, MIN_500_MV, STEP_6_25_MV, 0x10),
512 regulator_desc_s2mps13_buck8_10(8, MIN_1000_MV, STEP_12_5_MV, 0x20),
513 regulator_desc_s2mps13_buck8_10(9, MIN_1000_MV, STEP_12_5_MV, 0x20),
514 regulator_desc_s2mps13_buck8_10(10, MIN_500_MV, STEP_6_25_MV, 0x10),
515};
516
517static int s2mps14_regulator_enable(struct regulator_dev *rdev)
518{
519 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
520 unsigned int val;
521
522 switch (s2mps11->dev_type) {
523 case S2MPS13X:
524 case S2MPS14X:
525 if (test_bit(rdev_get_id(rdev), s2mps11->suspend_state))
526 val = S2MPS14_ENABLE_SUSPEND;
527 else if (gpio_is_valid(s2mps11->ext_control_gpio[rdev_get_id(rdev)]))
528 val = S2MPS14_ENABLE_EXT_CONTROL;
529 else
530 val = rdev->desc->enable_mask;
531 break;
532 case S2MPU02:
533 if (test_bit(rdev_get_id(rdev), s2mps11->suspend_state))
534 val = S2MPU02_ENABLE_SUSPEND;
535 else
536 val = rdev->desc->enable_mask;
537 break;
538 default:
539 return -EINVAL;
540 }
541
542 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
543 rdev->desc->enable_mask, val);
544}
545
546static int s2mps14_regulator_set_suspend_disable(struct regulator_dev *rdev)
547{
548 int ret;
549 unsigned int val, state;
550 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
551 int rdev_id = rdev_get_id(rdev);
552
553
554 switch (s2mps11->dev_type) {
555 case S2MPS13X:
556 case S2MPS14X:
557 switch (rdev_id) {
558 case S2MPS14_LDO3:
559 return 0;
560 default:
561 state = S2MPS14_ENABLE_SUSPEND;
562 break;
563 }
564 break;
565 case S2MPU02:
566 switch (rdev_id) {
567 case S2MPU02_LDO13:
568 case S2MPU02_LDO14:
569 case S2MPU02_LDO15:
570 case S2MPU02_LDO17:
571 case S2MPU02_BUCK7:
572 state = S2MPU02_DISABLE_SUSPEND;
573 break;
574 default:
575 state = S2MPU02_ENABLE_SUSPEND;
576 break;
577 }
578 break;
579 default:
580 return -EINVAL;
581 }
582
583 ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val);
584 if (ret < 0)
585 return ret;
586
587 set_bit(rdev_get_id(rdev), s2mps11->suspend_state);
588
589
590
591
592
593
594
595 if (!(val & rdev->desc->enable_mask))
596 return 0;
597
598 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
599 rdev->desc->enable_mask, state);
600}
601
602static struct regulator_ops s2mps14_reg_ops = {
603 .list_voltage = regulator_list_voltage_linear,
604 .map_voltage = regulator_map_voltage_linear,
605 .is_enabled = regulator_is_enabled_regmap,
606 .enable = s2mps14_regulator_enable,
607 .disable = regulator_disable_regmap,
608 .get_voltage_sel = regulator_get_voltage_sel_regmap,
609 .set_voltage_sel = regulator_set_voltage_sel_regmap,
610 .set_voltage_time_sel = regulator_set_voltage_time_sel,
611 .set_suspend_disable = s2mps14_regulator_set_suspend_disable,
612};
613
614#define regulator_desc_s2mps14_ldo(num, min, step) { \
615 .name = "LDO"#num, \
616 .id = S2MPS14_LDO##num, \
617 .ops = &s2mps14_reg_ops, \
618 .type = REGULATOR_VOLTAGE, \
619 .owner = THIS_MODULE, \
620 .min_uV = min, \
621 .uV_step = step, \
622 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \
623 .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \
624 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \
625 .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \
626 .enable_mask = S2MPS14_ENABLE_MASK \
627}
628
629#define regulator_desc_s2mps14_buck(num, min, step, min_sel) { \
630 .name = "BUCK"#num, \
631 .id = S2MPS14_BUCK##num, \
632 .ops = &s2mps14_reg_ops, \
633 .type = REGULATOR_VOLTAGE, \
634 .owner = THIS_MODULE, \
635 .min_uV = min, \
636 .uV_step = step, \
637 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
638 .linear_min_sel = min_sel, \
639 .ramp_delay = S2MPS14_BUCK_RAMP_DELAY, \
640 .vsel_reg = S2MPS14_REG_B1CTRL2 + (num - 1) * 2, \
641 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
642 .enable_reg = S2MPS14_REG_B1CTRL1 + (num - 1) * 2, \
643 .enable_mask = S2MPS14_ENABLE_MASK \
644}
645
646static const struct regulator_desc s2mps14_regulators[] = {
647 regulator_desc_s2mps14_ldo(1, MIN_800_MV, STEP_12_5_MV),
648 regulator_desc_s2mps14_ldo(2, MIN_800_MV, STEP_12_5_MV),
649 regulator_desc_s2mps14_ldo(3, MIN_800_MV, STEP_25_MV),
650 regulator_desc_s2mps14_ldo(4, MIN_800_MV, STEP_25_MV),
651 regulator_desc_s2mps14_ldo(5, MIN_800_MV, STEP_12_5_MV),
652 regulator_desc_s2mps14_ldo(6, MIN_800_MV, STEP_12_5_MV),
653 regulator_desc_s2mps14_ldo(7, MIN_800_MV, STEP_25_MV),
654 regulator_desc_s2mps14_ldo(8, MIN_1800_MV, STEP_25_MV),
655 regulator_desc_s2mps14_ldo(9, MIN_800_MV, STEP_12_5_MV),
656 regulator_desc_s2mps14_ldo(10, MIN_800_MV, STEP_12_5_MV),
657 regulator_desc_s2mps14_ldo(11, MIN_800_MV, STEP_25_MV),
658 regulator_desc_s2mps14_ldo(12, MIN_1800_MV, STEP_25_MV),
659 regulator_desc_s2mps14_ldo(13, MIN_1800_MV, STEP_25_MV),
660 regulator_desc_s2mps14_ldo(14, MIN_1800_MV, STEP_25_MV),
661 regulator_desc_s2mps14_ldo(15, MIN_1800_MV, STEP_25_MV),
662 regulator_desc_s2mps14_ldo(16, MIN_1800_MV, STEP_25_MV),
663 regulator_desc_s2mps14_ldo(17, MIN_1800_MV, STEP_25_MV),
664 regulator_desc_s2mps14_ldo(18, MIN_1800_MV, STEP_25_MV),
665 regulator_desc_s2mps14_ldo(19, MIN_800_MV, STEP_25_MV),
666 regulator_desc_s2mps14_ldo(20, MIN_800_MV, STEP_25_MV),
667 regulator_desc_s2mps14_ldo(21, MIN_800_MV, STEP_25_MV),
668 regulator_desc_s2mps14_ldo(22, MIN_800_MV, STEP_12_5_MV),
669 regulator_desc_s2mps14_ldo(23, MIN_800_MV, STEP_25_MV),
670 regulator_desc_s2mps14_ldo(24, MIN_1800_MV, STEP_25_MV),
671 regulator_desc_s2mps14_ldo(25, MIN_1800_MV, STEP_25_MV),
672 regulator_desc_s2mps14_buck(1, MIN_600_MV, STEP_6_25_MV,
673 S2MPS14_BUCK1235_START_SEL),
674 regulator_desc_s2mps14_buck(2, MIN_600_MV, STEP_6_25_MV,
675 S2MPS14_BUCK1235_START_SEL),
676 regulator_desc_s2mps14_buck(3, MIN_600_MV, STEP_6_25_MV,
677 S2MPS14_BUCK1235_START_SEL),
678 regulator_desc_s2mps14_buck(4, MIN_1400_MV, STEP_12_5_MV,
679 S2MPS14_BUCK4_START_SEL),
680 regulator_desc_s2mps14_buck(5, MIN_600_MV, STEP_6_25_MV,
681 S2MPS14_BUCK1235_START_SEL),
682};
683
684static struct regulator_ops s2mps15_reg_ldo_ops = {
685 .list_voltage = regulator_list_voltage_linear_range,
686 .map_voltage = regulator_map_voltage_linear_range,
687 .is_enabled = regulator_is_enabled_regmap,
688 .enable = regulator_enable_regmap,
689 .disable = regulator_disable_regmap,
690 .get_voltage_sel = regulator_get_voltage_sel_regmap,
691 .set_voltage_sel = regulator_set_voltage_sel_regmap,
692};
693
694static struct regulator_ops s2mps15_reg_buck_ops = {
695 .list_voltage = regulator_list_voltage_linear_range,
696 .map_voltage = regulator_map_voltage_linear_range,
697 .is_enabled = regulator_is_enabled_regmap,
698 .enable = regulator_enable_regmap,
699 .disable = regulator_disable_regmap,
700 .get_voltage_sel = regulator_get_voltage_sel_regmap,
701 .set_voltage_sel = regulator_set_voltage_sel_regmap,
702 .set_voltage_time_sel = regulator_set_voltage_time_sel,
703};
704
705#define regulator_desc_s2mps15_ldo(num, range) { \
706 .name = "LDO"#num, \
707 .id = S2MPS15_LDO##num, \
708 .ops = &s2mps15_reg_ldo_ops, \
709 .type = REGULATOR_VOLTAGE, \
710 .owner = THIS_MODULE, \
711 .linear_ranges = range, \
712 .n_linear_ranges = ARRAY_SIZE(range), \
713 .n_voltages = S2MPS15_LDO_N_VOLTAGES, \
714 .vsel_reg = S2MPS15_REG_L1CTRL + num - 1, \
715 .vsel_mask = S2MPS15_LDO_VSEL_MASK, \
716 .enable_reg = S2MPS15_REG_L1CTRL + num - 1, \
717 .enable_mask = S2MPS15_ENABLE_MASK \
718}
719
720#define regulator_desc_s2mps15_buck(num, range) { \
721 .name = "BUCK"#num, \
722 .id = S2MPS15_BUCK##num, \
723 .ops = &s2mps15_reg_buck_ops, \
724 .type = REGULATOR_VOLTAGE, \
725 .owner = THIS_MODULE, \
726 .linear_ranges = range, \
727 .n_linear_ranges = ARRAY_SIZE(range), \
728 .ramp_delay = 12500, \
729 .n_voltages = S2MPS15_BUCK_N_VOLTAGES, \
730 .vsel_reg = S2MPS15_REG_B1CTRL2 + ((num - 1) * 2), \
731 .vsel_mask = S2MPS15_BUCK_VSEL_MASK, \
732 .enable_reg = S2MPS15_REG_B1CTRL1 + ((num - 1) * 2), \
733 .enable_mask = S2MPS15_ENABLE_MASK \
734}
735
736
737static const struct regulator_linear_range s2mps15_ldo_voltage_ranges1[] = {
738 REGULATOR_LINEAR_RANGE(1000000, 0xc, 0x38, 25000),
739};
740
741
742static const struct regulator_linear_range s2mps15_ldo_voltage_ranges2[] = {
743 REGULATOR_LINEAR_RANGE(1800000, 0x0, 0x3f, 25000),
744};
745
746
747static const struct regulator_linear_range s2mps15_ldo_voltage_ranges3[] = {
748 REGULATOR_LINEAR_RANGE(700000, 0x0, 0x34, 12500),
749};
750
751
752static const struct regulator_linear_range s2mps15_ldo_voltage_ranges4[] = {
753 REGULATOR_LINEAR_RANGE(700000, 0x10, 0x20, 25000),
754};
755
756
757static const struct regulator_linear_range s2mps15_ldo_voltage_ranges5[] = {
758 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x20, 12500),
759};
760
761
762static const struct regulator_linear_range s2mps15_buck_voltage_ranges1[] = {
763 REGULATOR_LINEAR_RANGE(500000, 0x20, 0xc0, 6250),
764};
765
766
767static const struct regulator_linear_range s2mps15_buck_voltage_ranges2[] = {
768 REGULATOR_LINEAR_RANGE(1000000, 0x20, 0x78, 12500),
769};
770
771static const struct regulator_desc s2mps15_regulators[] = {
772 regulator_desc_s2mps15_ldo(1, s2mps15_ldo_voltage_ranges5),
773 regulator_desc_s2mps15_ldo(2, s2mps15_ldo_voltage_ranges2),
774 regulator_desc_s2mps15_ldo(3, s2mps15_ldo_voltage_ranges1),
775 regulator_desc_s2mps15_ldo(4, s2mps15_ldo_voltage_ranges3),
776 regulator_desc_s2mps15_ldo(5, s2mps15_ldo_voltage_ranges1),
777 regulator_desc_s2mps15_ldo(6, s2mps15_ldo_voltage_ranges2),
778 regulator_desc_s2mps15_ldo(7, s2mps15_ldo_voltage_ranges4),
779 regulator_desc_s2mps15_ldo(8, s2mps15_ldo_voltage_ranges4),
780 regulator_desc_s2mps15_ldo(9, s2mps15_ldo_voltage_ranges4),
781 regulator_desc_s2mps15_ldo(10, s2mps15_ldo_voltage_ranges4),
782 regulator_desc_s2mps15_ldo(11, s2mps15_ldo_voltage_ranges3),
783 regulator_desc_s2mps15_ldo(12, s2mps15_ldo_voltage_ranges3),
784 regulator_desc_s2mps15_ldo(13, s2mps15_ldo_voltage_ranges3),
785 regulator_desc_s2mps15_ldo(14, s2mps15_ldo_voltage_ranges2),
786 regulator_desc_s2mps15_ldo(15, s2mps15_ldo_voltage_ranges1),
787 regulator_desc_s2mps15_ldo(16, s2mps15_ldo_voltage_ranges1),
788 regulator_desc_s2mps15_ldo(17, s2mps15_ldo_voltage_ranges2),
789 regulator_desc_s2mps15_ldo(18, s2mps15_ldo_voltage_ranges1),
790 regulator_desc_s2mps15_ldo(19, s2mps15_ldo_voltage_ranges2),
791 regulator_desc_s2mps15_ldo(20, s2mps15_ldo_voltage_ranges1),
792 regulator_desc_s2mps15_ldo(21, s2mps15_ldo_voltage_ranges2),
793 regulator_desc_s2mps15_ldo(22, s2mps15_ldo_voltage_ranges3),
794 regulator_desc_s2mps15_ldo(23, s2mps15_ldo_voltage_ranges1),
795 regulator_desc_s2mps15_ldo(24, s2mps15_ldo_voltage_ranges2),
796 regulator_desc_s2mps15_ldo(25, s2mps15_ldo_voltage_ranges2),
797 regulator_desc_s2mps15_ldo(26, s2mps15_ldo_voltage_ranges3),
798 regulator_desc_s2mps15_ldo(27, s2mps15_ldo_voltage_ranges1),
799 regulator_desc_s2mps15_buck(1, s2mps15_buck_voltage_ranges1),
800 regulator_desc_s2mps15_buck(2, s2mps15_buck_voltage_ranges1),
801 regulator_desc_s2mps15_buck(3, s2mps15_buck_voltage_ranges1),
802 regulator_desc_s2mps15_buck(4, s2mps15_buck_voltage_ranges1),
803 regulator_desc_s2mps15_buck(5, s2mps15_buck_voltage_ranges1),
804 regulator_desc_s2mps15_buck(6, s2mps15_buck_voltage_ranges1),
805 regulator_desc_s2mps15_buck(7, s2mps15_buck_voltage_ranges1),
806 regulator_desc_s2mps15_buck(8, s2mps15_buck_voltage_ranges2),
807 regulator_desc_s2mps15_buck(9, s2mps15_buck_voltage_ranges2),
808 regulator_desc_s2mps15_buck(10, s2mps15_buck_voltage_ranges2),
809};
810
811static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11,
812 struct regulator_dev *rdev)
813{
814 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
815 rdev->desc->enable_mask, S2MPS14_ENABLE_EXT_CONTROL);
816}
817
818static void s2mps14_pmic_dt_parse_ext_control_gpio(struct platform_device *pdev,
819 struct of_regulator_match *rdata, struct s2mps11_info *s2mps11)
820{
821 int *gpio = s2mps11->ext_control_gpio;
822 unsigned int i;
823 unsigned int valid_regulators[3] = { S2MPS14_LDO10, S2MPS14_LDO11,
824 S2MPS14_LDO12 };
825
826 for (i = 0; i < ARRAY_SIZE(valid_regulators); i++) {
827 unsigned int reg = valid_regulators[i];
828
829 if (!rdata[reg].init_data || !rdata[reg].of_node)
830 continue;
831
832 gpio[reg] = of_get_named_gpio(rdata[reg].of_node,
833 "samsung,ext-control-gpios", 0);
834 if (gpio_is_valid(gpio[reg]))
835 dev_dbg(&pdev->dev, "Using GPIO %d for ext-control over %d/%s\n",
836 gpio[reg], reg, rdata[reg].name);
837 }
838}
839
840static int s2mps11_pmic_dt_parse(struct platform_device *pdev,
841 struct of_regulator_match *rdata, struct s2mps11_info *s2mps11,
842 unsigned int rdev_num)
843{
844 struct device_node *reg_np;
845
846 reg_np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
847 if (!reg_np) {
848 dev_err(&pdev->dev, "could not find regulators sub-node\n");
849 return -EINVAL;
850 }
851
852 of_regulator_match(&pdev->dev, reg_np, rdata, rdev_num);
853 if (s2mps11->dev_type == S2MPS14X)
854 s2mps14_pmic_dt_parse_ext_control_gpio(pdev, rdata, s2mps11);
855
856 of_node_put(reg_np);
857
858 return 0;
859}
860
861static int s2mpu02_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
862{
863 unsigned int ramp_val, ramp_shift, ramp_reg;
864
865 switch (rdev_get_id(rdev)) {
866 case S2MPU02_BUCK1:
867 ramp_shift = S2MPU02_BUCK1_RAMP_SHIFT;
868 break;
869 case S2MPU02_BUCK2:
870 ramp_shift = S2MPU02_BUCK2_RAMP_SHIFT;
871 break;
872 case S2MPU02_BUCK3:
873 ramp_shift = S2MPU02_BUCK3_RAMP_SHIFT;
874 break;
875 case S2MPU02_BUCK4:
876 ramp_shift = S2MPU02_BUCK4_RAMP_SHIFT;
877 break;
878 default:
879 return 0;
880 }
881 ramp_reg = S2MPU02_REG_RAMP1;
882 ramp_val = get_ramp_delay(ramp_delay);
883
884 return regmap_update_bits(rdev->regmap, ramp_reg,
885 S2MPU02_BUCK1234_RAMP_MASK << ramp_shift,
886 ramp_val << ramp_shift);
887}
888
889static struct regulator_ops s2mpu02_ldo_ops = {
890 .list_voltage = regulator_list_voltage_linear,
891 .map_voltage = regulator_map_voltage_linear,
892 .is_enabled = regulator_is_enabled_regmap,
893 .enable = s2mps14_regulator_enable,
894 .disable = regulator_disable_regmap,
895 .get_voltage_sel = regulator_get_voltage_sel_regmap,
896 .set_voltage_sel = regulator_set_voltage_sel_regmap,
897 .set_voltage_time_sel = regulator_set_voltage_time_sel,
898 .set_suspend_disable = s2mps14_regulator_set_suspend_disable,
899};
900
901static struct regulator_ops s2mpu02_buck_ops = {
902 .list_voltage = regulator_list_voltage_linear,
903 .map_voltage = regulator_map_voltage_linear,
904 .is_enabled = regulator_is_enabled_regmap,
905 .enable = s2mps14_regulator_enable,
906 .disable = regulator_disable_regmap,
907 .get_voltage_sel = regulator_get_voltage_sel_regmap,
908 .set_voltage_sel = regulator_set_voltage_sel_regmap,
909 .set_voltage_time_sel = regulator_set_voltage_time_sel,
910 .set_suspend_disable = s2mps14_regulator_set_suspend_disable,
911 .set_ramp_delay = s2mpu02_set_ramp_delay,
912};
913
914#define regulator_desc_s2mpu02_ldo1(num) { \
915 .name = "LDO"#num, \
916 .id = S2MPU02_LDO##num, \
917 .ops = &s2mpu02_ldo_ops, \
918 .type = REGULATOR_VOLTAGE, \
919 .owner = THIS_MODULE, \
920 .min_uV = S2MPU02_LDO_MIN_900MV, \
921 .uV_step = S2MPU02_LDO_STEP_12_5MV, \
922 .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \
923 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
924 .vsel_reg = S2MPU02_REG_L1CTRL, \
925 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
926 .enable_reg = S2MPU02_REG_L1CTRL, \
927 .enable_mask = S2MPU02_ENABLE_MASK \
928}
929#define regulator_desc_s2mpu02_ldo2(num) { \
930 .name = "LDO"#num, \
931 .id = S2MPU02_LDO##num, \
932 .ops = &s2mpu02_ldo_ops, \
933 .type = REGULATOR_VOLTAGE, \
934 .owner = THIS_MODULE, \
935 .min_uV = S2MPU02_LDO_MIN_1050MV, \
936 .uV_step = S2MPU02_LDO_STEP_25MV, \
937 .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \
938 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
939 .vsel_reg = S2MPU02_REG_L2CTRL1, \
940 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
941 .enable_reg = S2MPU02_REG_L2CTRL1, \
942 .enable_mask = S2MPU02_ENABLE_MASK \
943}
944#define regulator_desc_s2mpu02_ldo3(num) { \
945 .name = "LDO"#num, \
946 .id = S2MPU02_LDO##num, \
947 .ops = &s2mpu02_ldo_ops, \
948 .type = REGULATOR_VOLTAGE, \
949 .owner = THIS_MODULE, \
950 .min_uV = S2MPU02_LDO_MIN_900MV, \
951 .uV_step = S2MPU02_LDO_STEP_12_5MV, \
952 .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \
953 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
954 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \
955 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
956 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \
957 .enable_mask = S2MPU02_ENABLE_MASK \
958}
959#define regulator_desc_s2mpu02_ldo4(num) { \
960 .name = "LDO"#num, \
961 .id = S2MPU02_LDO##num, \
962 .ops = &s2mpu02_ldo_ops, \
963 .type = REGULATOR_VOLTAGE, \
964 .owner = THIS_MODULE, \
965 .min_uV = S2MPU02_LDO_MIN_1050MV, \
966 .uV_step = S2MPU02_LDO_STEP_25MV, \
967 .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \
968 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
969 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \
970 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
971 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \
972 .enable_mask = S2MPU02_ENABLE_MASK \
973}
974#define regulator_desc_s2mpu02_ldo5(num) { \
975 .name = "LDO"#num, \
976 .id = S2MPU02_LDO##num, \
977 .ops = &s2mpu02_ldo_ops, \
978 .type = REGULATOR_VOLTAGE, \
979 .owner = THIS_MODULE, \
980 .min_uV = S2MPU02_LDO_MIN_1600MV, \
981 .uV_step = S2MPU02_LDO_STEP_50MV, \
982 .linear_min_sel = S2MPU02_LDO_GROUP3_START_SEL, \
983 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
984 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \
985 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
986 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \
987 .enable_mask = S2MPU02_ENABLE_MASK \
988}
989
990#define regulator_desc_s2mpu02_buck1234(num) { \
991 .name = "BUCK"#num, \
992 .id = S2MPU02_BUCK##num, \
993 .ops = &s2mpu02_buck_ops, \
994 .type = REGULATOR_VOLTAGE, \
995 .owner = THIS_MODULE, \
996 .min_uV = S2MPU02_BUCK1234_MIN_600MV, \
997 .uV_step = S2MPU02_BUCK1234_STEP_6_25MV, \
998 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \
999 .linear_min_sel = S2MPU02_BUCK1234_START_SEL, \
1000 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \
1001 .vsel_reg = S2MPU02_REG_B1CTRL2 + (num - 1) * 2, \
1002 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \
1003 .enable_reg = S2MPU02_REG_B1CTRL1 + (num - 1) * 2, \
1004 .enable_mask = S2MPU02_ENABLE_MASK \
1005}
1006#define regulator_desc_s2mpu02_buck5(num) { \
1007 .name = "BUCK"#num, \
1008 .id = S2MPU02_BUCK##num, \
1009 .ops = &s2mpu02_ldo_ops, \
1010 .type = REGULATOR_VOLTAGE, \
1011 .owner = THIS_MODULE, \
1012 .min_uV = S2MPU02_BUCK5_MIN_1081_25MV, \
1013 .uV_step = S2MPU02_BUCK5_STEP_6_25MV, \
1014 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \
1015 .linear_min_sel = S2MPU02_BUCK5_START_SEL, \
1016 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \
1017 .vsel_reg = S2MPU02_REG_B5CTRL2, \
1018 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \
1019 .enable_reg = S2MPU02_REG_B5CTRL1, \
1020 .enable_mask = S2MPU02_ENABLE_MASK \
1021}
1022#define regulator_desc_s2mpu02_buck6(num) { \
1023 .name = "BUCK"#num, \
1024 .id = S2MPU02_BUCK##num, \
1025 .ops = &s2mpu02_ldo_ops, \
1026 .type = REGULATOR_VOLTAGE, \
1027 .owner = THIS_MODULE, \
1028 .min_uV = S2MPU02_BUCK6_MIN_1700MV, \
1029 .uV_step = S2MPU02_BUCK6_STEP_2_50MV, \
1030 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \
1031 .linear_min_sel = S2MPU02_BUCK6_START_SEL, \
1032 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \
1033 .vsel_reg = S2MPU02_REG_B6CTRL2, \
1034 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \
1035 .enable_reg = S2MPU02_REG_B6CTRL1, \
1036 .enable_mask = S2MPU02_ENABLE_MASK \
1037}
1038#define regulator_desc_s2mpu02_buck7(num) { \
1039 .name = "BUCK"#num, \
1040 .id = S2MPU02_BUCK##num, \
1041 .ops = &s2mpu02_ldo_ops, \
1042 .type = REGULATOR_VOLTAGE, \
1043 .owner = THIS_MODULE, \
1044 .min_uV = S2MPU02_BUCK7_MIN_900MV, \
1045 .uV_step = S2MPU02_BUCK7_STEP_6_25MV, \
1046 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \
1047 .linear_min_sel = S2MPU02_BUCK7_START_SEL, \
1048 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \
1049 .vsel_reg = S2MPU02_REG_B7CTRL2, \
1050 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \
1051 .enable_reg = S2MPU02_REG_B7CTRL1, \
1052 .enable_mask = S2MPU02_ENABLE_MASK \
1053}
1054
1055static const struct regulator_desc s2mpu02_regulators[] = {
1056 regulator_desc_s2mpu02_ldo1(1),
1057 regulator_desc_s2mpu02_ldo2(2),
1058 regulator_desc_s2mpu02_ldo4(3),
1059 regulator_desc_s2mpu02_ldo5(4),
1060 regulator_desc_s2mpu02_ldo4(5),
1061 regulator_desc_s2mpu02_ldo3(6),
1062 regulator_desc_s2mpu02_ldo3(7),
1063 regulator_desc_s2mpu02_ldo4(8),
1064 regulator_desc_s2mpu02_ldo5(9),
1065 regulator_desc_s2mpu02_ldo3(10),
1066 regulator_desc_s2mpu02_ldo4(11),
1067 regulator_desc_s2mpu02_ldo5(12),
1068 regulator_desc_s2mpu02_ldo5(13),
1069 regulator_desc_s2mpu02_ldo5(14),
1070 regulator_desc_s2mpu02_ldo5(15),
1071 regulator_desc_s2mpu02_ldo5(16),
1072 regulator_desc_s2mpu02_ldo4(17),
1073 regulator_desc_s2mpu02_ldo5(18),
1074 regulator_desc_s2mpu02_ldo3(19),
1075 regulator_desc_s2mpu02_ldo4(20),
1076 regulator_desc_s2mpu02_ldo5(21),
1077 regulator_desc_s2mpu02_ldo5(22),
1078 regulator_desc_s2mpu02_ldo5(23),
1079 regulator_desc_s2mpu02_ldo4(24),
1080 regulator_desc_s2mpu02_ldo5(25),
1081 regulator_desc_s2mpu02_ldo4(26),
1082 regulator_desc_s2mpu02_ldo5(27),
1083 regulator_desc_s2mpu02_ldo5(28),
1084 regulator_desc_s2mpu02_buck1234(1),
1085 regulator_desc_s2mpu02_buck1234(2),
1086 regulator_desc_s2mpu02_buck1234(3),
1087 regulator_desc_s2mpu02_buck1234(4),
1088 regulator_desc_s2mpu02_buck5(5),
1089 regulator_desc_s2mpu02_buck6(6),
1090 regulator_desc_s2mpu02_buck7(7),
1091};
1092
1093static int s2mps11_pmic_probe(struct platform_device *pdev)
1094{
1095 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
1096 struct sec_platform_data *pdata = NULL;
1097 struct of_regulator_match *rdata = NULL;
1098 struct regulator_config config = { };
1099 struct s2mps11_info *s2mps11;
1100 unsigned int rdev_num = 0;
1101 int i, ret = 0;
1102 const struct regulator_desc *regulators;
1103
1104 s2mps11 = devm_kzalloc(&pdev->dev, sizeof(struct s2mps11_info),
1105 GFP_KERNEL);
1106 if (!s2mps11)
1107 return -ENOMEM;
1108
1109 s2mps11->dev_type = platform_get_device_id(pdev)->driver_data;
1110 switch (s2mps11->dev_type) {
1111 case S2MPS11X:
1112 rdev_num = ARRAY_SIZE(s2mps11_regulators);
1113 regulators = s2mps11_regulators;
1114 BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps11_regulators));
1115 break;
1116 case S2MPS13X:
1117 rdev_num = ARRAY_SIZE(s2mps13_regulators);
1118 regulators = s2mps13_regulators;
1119 BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps13_regulators));
1120 break;
1121 case S2MPS14X:
1122 rdev_num = ARRAY_SIZE(s2mps14_regulators);
1123 regulators = s2mps14_regulators;
1124 BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps14_regulators));
1125 break;
1126 case S2MPS15X:
1127 rdev_num = ARRAY_SIZE(s2mps15_regulators);
1128 regulators = s2mps15_regulators;
1129 BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps15_regulators));
1130 break;
1131 case S2MPU02:
1132 rdev_num = ARRAY_SIZE(s2mpu02_regulators);
1133 regulators = s2mpu02_regulators;
1134 BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mpu02_regulators));
1135 break;
1136 default:
1137 dev_err(&pdev->dev, "Invalid device type: %u\n",
1138 s2mps11->dev_type);
1139 return -EINVAL;
1140 }
1141
1142 s2mps11->ext_control_gpio = devm_kmalloc(&pdev->dev,
1143 sizeof(*s2mps11->ext_control_gpio) * rdev_num,
1144 GFP_KERNEL);
1145 if (!s2mps11->ext_control_gpio)
1146 return -ENOMEM;
1147
1148
1149
1150
1151 for (i = 0; i < rdev_num; i++)
1152 s2mps11->ext_control_gpio[i] = -EINVAL;
1153
1154 if (!iodev->dev->of_node) {
1155 if (iodev->pdata) {
1156 pdata = iodev->pdata;
1157 goto common_reg;
1158 } else {
1159 dev_err(pdev->dev.parent,
1160 "Platform data or DT node not supplied\n");
1161 return -ENODEV;
1162 }
1163 }
1164
1165 rdata = kzalloc(sizeof(*rdata) * rdev_num, GFP_KERNEL);
1166 if (!rdata)
1167 return -ENOMEM;
1168
1169 for (i = 0; i < rdev_num; i++)
1170 rdata[i].name = regulators[i].name;
1171
1172 ret = s2mps11_pmic_dt_parse(pdev, rdata, s2mps11, rdev_num);
1173 if (ret)
1174 goto out;
1175
1176common_reg:
1177 platform_set_drvdata(pdev, s2mps11);
1178
1179 config.dev = &pdev->dev;
1180 config.regmap = iodev->regmap_pmic;
1181 config.driver_data = s2mps11;
1182 config.ena_gpio_flags = GPIOF_OUT_INIT_HIGH;
1183 config.ena_gpio_initialized = true;
1184 for (i = 0; i < rdev_num; i++) {
1185 struct regulator_dev *regulator;
1186
1187 if (pdata) {
1188 config.init_data = pdata->regulators[i].initdata;
1189 config.of_node = pdata->regulators[i].reg_node;
1190 } else {
1191 config.init_data = rdata[i].init_data;
1192 config.of_node = rdata[i].of_node;
1193 }
1194 config.ena_gpio = s2mps11->ext_control_gpio[i];
1195
1196 regulator = devm_regulator_register(&pdev->dev,
1197 ®ulators[i], &config);
1198 if (IS_ERR(regulator)) {
1199 ret = PTR_ERR(regulator);
1200 dev_err(&pdev->dev, "regulator init failed for %d\n",
1201 i);
1202 goto out;
1203 }
1204
1205 if (gpio_is_valid(s2mps11->ext_control_gpio[i])) {
1206 ret = s2mps14_pmic_enable_ext_control(s2mps11,
1207 regulator);
1208 if (ret < 0) {
1209 dev_err(&pdev->dev,
1210 "failed to enable GPIO control over %s: %d\n",
1211 regulator->desc->name, ret);
1212 goto out;
1213 }
1214 }
1215 }
1216
1217out:
1218 kfree(rdata);
1219
1220 return ret;
1221}
1222
1223static const struct platform_device_id s2mps11_pmic_id[] = {
1224 { "s2mps11-regulator", S2MPS11X},
1225 { "s2mps13-regulator", S2MPS13X},
1226 { "s2mps14-regulator", S2MPS14X},
1227 { "s2mps15-regulator", S2MPS15X},
1228 { "s2mpu02-regulator", S2MPU02},
1229 { },
1230};
1231MODULE_DEVICE_TABLE(platform, s2mps11_pmic_id);
1232
1233static struct platform_driver s2mps11_pmic_driver = {
1234 .driver = {
1235 .name = "s2mps11-pmic",
1236 },
1237 .probe = s2mps11_pmic_probe,
1238 .id_table = s2mps11_pmic_id,
1239};
1240
1241module_platform_driver(s2mps11_pmic_driver);
1242
1243
1244MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
1245MODULE_DESCRIPTION("SAMSUNG S2MPS11/S2MPS14/S2MPS15/S2MPU02 Regulator Driver");
1246MODULE_LICENSE("GPL");
1247
