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13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16#include <linux/device.h>
17#include <linux/eventfd.h>
18#include <linux/file.h>
19#include <linux/interrupt.h>
20#include <linux/iommu.h>
21#include <linux/module.h>
22#include <linux/mutex.h>
23#include <linux/notifier.h>
24#include <linux/pci.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/types.h>
28#include <linux/uaccess.h>
29#include <linux/vfio.h>
30#include <linux/vgaarb.h>
31
32#include "vfio_pci_private.h"
33
34#define DRIVER_VERSION "0.2"
35#define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
36#define DRIVER_DESC "VFIO PCI - User Level meta-driver"
37
38static char ids[1024] __initdata;
39module_param_string(ids, ids, sizeof(ids), 0);
40MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
41
42static bool nointxmask;
43module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
44MODULE_PARM_DESC(nointxmask,
45 "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
46
47#ifdef CONFIG_VFIO_PCI_VGA
48static bool disable_vga;
49module_param(disable_vga, bool, S_IRUGO);
50MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
51#endif
52
53static bool disable_idle_d3;
54module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
55MODULE_PARM_DESC(disable_idle_d3,
56 "Disable using the PCI D3 low power state for idle, unused devices");
57
58static DEFINE_MUTEX(driver_lock);
59
60static inline bool vfio_vga_disabled(void)
61{
62#ifdef CONFIG_VFIO_PCI_VGA
63 return disable_vga;
64#else
65 return true;
66#endif
67}
68
69
70
71
72
73
74
75
76
77static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
78{
79 struct vfio_pci_device *vdev = opaque;
80 struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
81 unsigned char max_busnr;
82 unsigned int decodes;
83
84 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
85 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
86 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
87
88 max_busnr = pci_bus_max_busnr(pdev->bus);
89 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
90
91 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
92 if (tmp == pdev ||
93 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
94 pci_is_root_bus(tmp->bus))
95 continue;
96
97 if (tmp->bus->number >= pdev->bus->number &&
98 tmp->bus->number <= max_busnr) {
99 pci_dev_put(tmp);
100 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
101 break;
102 }
103 }
104
105 return decodes;
106}
107
108static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
109{
110 return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
111}
112
113static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
114{
115 struct resource *res;
116 int bar;
117 struct vfio_pci_dummy_resource *dummy_res;
118
119 INIT_LIST_HEAD(&vdev->dummy_resources_list);
120
121 for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
122 res = vdev->pdev->resource + bar;
123
124 if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
125 goto no_mmap;
126
127 if (!(res->flags & IORESOURCE_MEM))
128 goto no_mmap;
129
130
131
132
133
134
135 if (!resource_size(res))
136 goto no_mmap;
137
138 if (resource_size(res) >= PAGE_SIZE) {
139 vdev->bar_mmap_supported[bar] = true;
140 continue;
141 }
142
143 if (!(res->start & ~PAGE_MASK)) {
144
145
146
147
148
149 dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
150 if (dummy_res == NULL)
151 goto no_mmap;
152
153 dummy_res->resource.name = "vfio sub-page reserved";
154 dummy_res->resource.start = res->end + 1;
155 dummy_res->resource.end = res->start + PAGE_SIZE - 1;
156 dummy_res->resource.flags = res->flags;
157 if (request_resource(res->parent,
158 &dummy_res->resource)) {
159 kfree(dummy_res);
160 goto no_mmap;
161 }
162 dummy_res->index = bar;
163 list_add(&dummy_res->res_next,
164 &vdev->dummy_resources_list);
165 vdev->bar_mmap_supported[bar] = true;
166 continue;
167 }
168
169
170
171
172
173
174
175
176no_mmap:
177 vdev->bar_mmap_supported[bar] = false;
178 }
179}
180
181static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
182static void vfio_pci_disable(struct vfio_pci_device *vdev);
183
184
185
186
187
188
189
190
191
192
193static bool vfio_pci_nointx(struct pci_dev *pdev)
194{
195 switch (pdev->vendor) {
196 case PCI_VENDOR_ID_INTEL:
197 switch (pdev->device) {
198
199 case 0x1572:
200 case 0x1574:
201 case 0x1580 ... 0x1581:
202 case 0x1583 ... 0x1589:
203 case 0x37d0 ... 0x37d2:
204 return true;
205 default:
206 return false;
207 }
208 }
209
210 return false;
211}
212
213static int vfio_pci_enable(struct vfio_pci_device *vdev)
214{
215 struct pci_dev *pdev = vdev->pdev;
216 int ret;
217 u16 cmd;
218 u8 msix_pos;
219
220 pci_set_power_state(pdev, PCI_D0);
221
222
223 pci_clear_master(pdev);
224
225 ret = pci_enable_device(pdev);
226 if (ret)
227 return ret;
228
229 vdev->reset_works = (pci_reset_function(pdev) == 0);
230 pci_save_state(pdev);
231 vdev->pci_saved_state = pci_store_saved_state(pdev);
232 if (!vdev->pci_saved_state)
233 pr_debug("%s: Couldn't store %s saved state\n",
234 __func__, dev_name(&pdev->dev));
235
236 if (likely(!nointxmask)) {
237 if (vfio_pci_nointx(pdev)) {
238 dev_info(&pdev->dev, "Masking broken INTx support\n");
239 vdev->nointx = true;
240 pci_intx(pdev, 0);
241 } else
242 vdev->pci_2_3 = pci_intx_mask_supported(pdev);
243 }
244
245 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
246 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
247 cmd &= ~PCI_COMMAND_INTX_DISABLE;
248 pci_write_config_word(pdev, PCI_COMMAND, cmd);
249 }
250
251 ret = vfio_config_init(vdev);
252 if (ret) {
253 kfree(vdev->pci_saved_state);
254 vdev->pci_saved_state = NULL;
255 pci_disable_device(pdev);
256 return ret;
257 }
258
259 msix_pos = pdev->msix_cap;
260 if (msix_pos) {
261 u16 flags;
262 u32 table;
263
264 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
265 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
266
267 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
268 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
269 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
270 } else
271 vdev->msix_bar = 0xFF;
272
273 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
274 vdev->has_vga = true;
275
276
277 if (vfio_pci_is_vga(pdev) &&
278 pdev->vendor == PCI_VENDOR_ID_INTEL &&
279 IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
280 ret = vfio_pci_igd_init(vdev);
281 if (ret) {
282 dev_warn(&vdev->pdev->dev,
283 "Failed to setup Intel IGD regions\n");
284 vfio_pci_disable(vdev);
285 return ret;
286 }
287 }
288
289 vfio_pci_probe_mmaps(vdev);
290
291 return 0;
292}
293
294static void vfio_pci_disable(struct vfio_pci_device *vdev)
295{
296 struct pci_dev *pdev = vdev->pdev;
297 struct vfio_pci_dummy_resource *dummy_res, *tmp;
298 int i, bar;
299
300
301 pci_clear_master(pdev);
302
303 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
304 VFIO_IRQ_SET_ACTION_TRIGGER,
305 vdev->irq_type, 0, 0, NULL);
306
307 vdev->virq_disabled = false;
308
309 for (i = 0; i < vdev->num_regions; i++)
310 vdev->region[i].ops->release(vdev, &vdev->region[i]);
311
312 vdev->num_regions = 0;
313 kfree(vdev->region);
314 vdev->region = NULL;
315
316 vfio_config_free(vdev);
317
318 for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
319 if (!vdev->barmap[bar])
320 continue;
321 pci_iounmap(pdev, vdev->barmap[bar]);
322 pci_release_selected_regions(pdev, 1 << bar);
323 vdev->barmap[bar] = NULL;
324 }
325
326 list_for_each_entry_safe(dummy_res, tmp,
327 &vdev->dummy_resources_list, res_next) {
328 list_del(&dummy_res->res_next);
329 release_resource(&dummy_res->resource);
330 kfree(dummy_res);
331 }
332
333 vdev->needs_reset = true;
334
335
336
337
338
339
340
341 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
342 pr_info("%s: Couldn't reload %s saved state\n",
343 __func__, dev_name(&pdev->dev));
344
345 if (!vdev->reset_works)
346 goto out;
347
348 pci_save_state(pdev);
349 }
350
351
352
353
354
355 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
356
357
358
359
360
361 if (vdev->reset_works && !pci_try_reset_function(pdev))
362 vdev->needs_reset = false;
363
364 pci_restore_state(pdev);
365out:
366 pci_disable_device(pdev);
367
368 vfio_pci_try_bus_reset(vdev);
369
370 if (!disable_idle_d3)
371 pci_set_power_state(pdev, PCI_D3hot);
372}
373
374static void vfio_pci_release(void *device_data)
375{
376 struct vfio_pci_device *vdev = device_data;
377
378 mutex_lock(&driver_lock);
379
380 if (!(--vdev->refcnt)) {
381 vfio_spapr_pci_eeh_release(vdev->pdev);
382 vfio_pci_disable(vdev);
383 }
384
385 mutex_unlock(&driver_lock);
386
387 module_put(THIS_MODULE);
388}
389
390static int vfio_pci_open(void *device_data)
391{
392 struct vfio_pci_device *vdev = device_data;
393 int ret = 0;
394
395 if (!try_module_get(THIS_MODULE))
396 return -ENODEV;
397
398 mutex_lock(&driver_lock);
399
400 if (!vdev->refcnt) {
401 ret = vfio_pci_enable(vdev);
402 if (ret)
403 goto error;
404
405 vfio_spapr_pci_eeh_open(vdev->pdev);
406 }
407 vdev->refcnt++;
408error:
409 mutex_unlock(&driver_lock);
410 if (ret)
411 module_put(THIS_MODULE);
412 return ret;
413}
414
415static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
416{
417 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
418 u8 pin;
419 pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
420 if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin)
421 return 1;
422
423 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
424 u8 pos;
425 u16 flags;
426
427 pos = vdev->pdev->msi_cap;
428 if (pos) {
429 pci_read_config_word(vdev->pdev,
430 pos + PCI_MSI_FLAGS, &flags);
431 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
432 }
433 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
434 u8 pos;
435 u16 flags;
436
437 pos = vdev->pdev->msix_cap;
438 if (pos) {
439 pci_read_config_word(vdev->pdev,
440 pos + PCI_MSIX_FLAGS, &flags);
441
442 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
443 }
444 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
445 if (pci_is_pcie(vdev->pdev))
446 return 1;
447 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
448 return 1;
449 }
450
451 return 0;
452}
453
454static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
455{
456 (*(int *)data)++;
457 return 0;
458}
459
460struct vfio_pci_fill_info {
461 int max;
462 int cur;
463 struct vfio_pci_dependent_device *devices;
464};
465
466static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
467{
468 struct vfio_pci_fill_info *fill = data;
469 struct iommu_group *iommu_group;
470
471 if (fill->cur == fill->max)
472 return -EAGAIN;
473
474 iommu_group = iommu_group_get(&pdev->dev);
475 if (!iommu_group)
476 return -EPERM;
477
478 fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
479 fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
480 fill->devices[fill->cur].bus = pdev->bus->number;
481 fill->devices[fill->cur].devfn = pdev->devfn;
482 fill->cur++;
483 iommu_group_put(iommu_group);
484 return 0;
485}
486
487struct vfio_pci_group_entry {
488 struct vfio_group *group;
489 int id;
490};
491
492struct vfio_pci_group_info {
493 int count;
494 struct vfio_pci_group_entry *groups;
495};
496
497static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
498{
499 struct vfio_pci_group_info *info = data;
500 struct iommu_group *group;
501 int id, i;
502
503 group = iommu_group_get(&pdev->dev);
504 if (!group)
505 return -EPERM;
506
507 id = iommu_group_id(group);
508
509 for (i = 0; i < info->count; i++)
510 if (info->groups[i].id == id)
511 break;
512
513 iommu_group_put(group);
514
515 return (i == info->count) ? -EINVAL : 0;
516}
517
518static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
519{
520 for (; pdev; pdev = pdev->bus->self)
521 if (pdev->bus == slot->bus)
522 return (pdev->slot == slot);
523 return false;
524}
525
526struct vfio_pci_walk_info {
527 int (*fn)(struct pci_dev *, void *data);
528 void *data;
529 struct pci_dev *pdev;
530 bool slot;
531 int ret;
532};
533
534static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
535{
536 struct vfio_pci_walk_info *walk = data;
537
538 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
539 walk->ret = walk->fn(pdev, walk->data);
540
541 return walk->ret;
542}
543
544static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
545 int (*fn)(struct pci_dev *,
546 void *data), void *data,
547 bool slot)
548{
549 struct vfio_pci_walk_info walk = {
550 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
551 };
552
553 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
554
555 return walk.ret;
556}
557
558static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev,
559 struct vfio_info_cap *caps)
560{
561 struct vfio_info_cap_header *header;
562 struct vfio_region_info_cap_sparse_mmap *sparse;
563 size_t end, size;
564 int nr_areas = 2, i = 0;
565
566 end = pci_resource_len(vdev->pdev, vdev->msix_bar);
567
568
569 if (((vdev->msix_offset & PAGE_MASK) == 0) ||
570 (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end))
571 nr_areas = 1;
572
573 size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas));
574
575 header = vfio_info_cap_add(caps, size,
576 VFIO_REGION_INFO_CAP_SPARSE_MMAP, 1);
577 if (IS_ERR(header))
578 return PTR_ERR(header);
579
580 sparse = container_of(header,
581 struct vfio_region_info_cap_sparse_mmap, header);
582 sparse->nr_areas = nr_areas;
583
584 if (vdev->msix_offset & PAGE_MASK) {
585 sparse->areas[i].offset = 0;
586 sparse->areas[i].size = vdev->msix_offset & PAGE_MASK;
587 i++;
588 }
589
590 if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) {
591 sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset +
592 vdev->msix_size);
593 sparse->areas[i].size = end - sparse->areas[i].offset;
594 i++;
595 }
596
597 return 0;
598}
599
600static int region_type_cap(struct vfio_pci_device *vdev,
601 struct vfio_info_cap *caps,
602 unsigned int type, unsigned int subtype)
603{
604 struct vfio_info_cap_header *header;
605 struct vfio_region_info_cap_type *cap;
606
607 header = vfio_info_cap_add(caps, sizeof(*cap),
608 VFIO_REGION_INFO_CAP_TYPE, 1);
609 if (IS_ERR(header))
610 return PTR_ERR(header);
611
612 cap = container_of(header, struct vfio_region_info_cap_type, header);
613 cap->type = type;
614 cap->subtype = subtype;
615
616 return 0;
617}
618
619int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
620 unsigned int type, unsigned int subtype,
621 const struct vfio_pci_regops *ops,
622 size_t size, u32 flags, void *data)
623{
624 struct vfio_pci_region *region;
625
626 region = krealloc(vdev->region,
627 (vdev->num_regions + 1) * sizeof(*region),
628 GFP_KERNEL);
629 if (!region)
630 return -ENOMEM;
631
632 vdev->region = region;
633 vdev->region[vdev->num_regions].type = type;
634 vdev->region[vdev->num_regions].subtype = subtype;
635 vdev->region[vdev->num_regions].ops = ops;
636 vdev->region[vdev->num_regions].size = size;
637 vdev->region[vdev->num_regions].flags = flags;
638 vdev->region[vdev->num_regions].data = data;
639
640 vdev->num_regions++;
641
642 return 0;
643}
644
645static long vfio_pci_ioctl(void *device_data,
646 unsigned int cmd, unsigned long arg)
647{
648 struct vfio_pci_device *vdev = device_data;
649 unsigned long minsz;
650
651 if (cmd == VFIO_DEVICE_GET_INFO) {
652 struct vfio_device_info info;
653
654 minsz = offsetofend(struct vfio_device_info, num_irqs);
655
656 if (copy_from_user(&info, (void __user *)arg, minsz))
657 return -EFAULT;
658
659 if (info.argsz < minsz)
660 return -EINVAL;
661
662 info.flags = VFIO_DEVICE_FLAGS_PCI;
663
664 if (vdev->reset_works)
665 info.flags |= VFIO_DEVICE_FLAGS_RESET;
666
667 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
668 info.num_irqs = VFIO_PCI_NUM_IRQS;
669
670 return copy_to_user((void __user *)arg, &info, minsz) ?
671 -EFAULT : 0;
672
673 } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
674 struct pci_dev *pdev = vdev->pdev;
675 struct vfio_region_info info;
676 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
677 int i, ret;
678
679 minsz = offsetofend(struct vfio_region_info, offset);
680
681 if (copy_from_user(&info, (void __user *)arg, minsz))
682 return -EFAULT;
683
684 if (info.argsz < minsz)
685 return -EINVAL;
686
687 switch (info.index) {
688 case VFIO_PCI_CONFIG_REGION_INDEX:
689 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
690 info.size = pdev->cfg_size;
691 info.flags = VFIO_REGION_INFO_FLAG_READ |
692 VFIO_REGION_INFO_FLAG_WRITE;
693 break;
694 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
695 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
696 info.size = pci_resource_len(pdev, info.index);
697 if (!info.size) {
698 info.flags = 0;
699 break;
700 }
701
702 info.flags = VFIO_REGION_INFO_FLAG_READ |
703 VFIO_REGION_INFO_FLAG_WRITE;
704 if (vdev->bar_mmap_supported[info.index]) {
705 info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
706 if (info.index == vdev->msix_bar) {
707 ret = msix_sparse_mmap_cap(vdev, &caps);
708 if (ret)
709 return ret;
710 }
711 }
712
713 break;
714 case VFIO_PCI_ROM_REGION_INDEX:
715 {
716 void __iomem *io;
717 size_t size;
718
719 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
720 info.flags = 0;
721
722
723 info.size = pci_resource_len(pdev, info.index);
724 if (!info.size) {
725
726 if (pdev->resource[PCI_ROM_RESOURCE].flags &
727 IORESOURCE_ROM_SHADOW)
728 info.size = 0x20000;
729 else
730 break;
731 }
732
733
734 io = pci_map_rom(pdev, &size);
735 if (!io || !size) {
736 info.size = 0;
737 break;
738 }
739 pci_unmap_rom(pdev, io);
740
741 info.flags = VFIO_REGION_INFO_FLAG_READ;
742 break;
743 }
744 case VFIO_PCI_VGA_REGION_INDEX:
745 if (!vdev->has_vga)
746 return -EINVAL;
747
748 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
749 info.size = 0xc0000;
750 info.flags = VFIO_REGION_INFO_FLAG_READ |
751 VFIO_REGION_INFO_FLAG_WRITE;
752
753 break;
754 default:
755 if (info.index >=
756 VFIO_PCI_NUM_REGIONS + vdev->num_regions)
757 return -EINVAL;
758
759 i = info.index - VFIO_PCI_NUM_REGIONS;
760
761 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
762 info.size = vdev->region[i].size;
763 info.flags = vdev->region[i].flags;
764
765 ret = region_type_cap(vdev, &caps,
766 vdev->region[i].type,
767 vdev->region[i].subtype);
768 if (ret)
769 return ret;
770 }
771
772 if (caps.size) {
773 info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
774 if (info.argsz < sizeof(info) + caps.size) {
775 info.argsz = sizeof(info) + caps.size;
776 info.cap_offset = 0;
777 } else {
778 vfio_info_cap_shift(&caps, sizeof(info));
779 if (copy_to_user((void __user *)arg +
780 sizeof(info), caps.buf,
781 caps.size)) {
782 kfree(caps.buf);
783 return -EFAULT;
784 }
785 info.cap_offset = sizeof(info);
786 }
787
788 kfree(caps.buf);
789 }
790
791 return copy_to_user((void __user *)arg, &info, minsz) ?
792 -EFAULT : 0;
793
794 } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
795 struct vfio_irq_info info;
796
797 minsz = offsetofend(struct vfio_irq_info, count);
798
799 if (copy_from_user(&info, (void __user *)arg, minsz))
800 return -EFAULT;
801
802 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
803 return -EINVAL;
804
805 switch (info.index) {
806 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
807 case VFIO_PCI_REQ_IRQ_INDEX:
808 break;
809 case VFIO_PCI_ERR_IRQ_INDEX:
810 if (pci_is_pcie(vdev->pdev))
811 break;
812
813 default:
814 return -EINVAL;
815 }
816
817 info.flags = VFIO_IRQ_INFO_EVENTFD;
818
819 info.count = vfio_pci_get_irq_count(vdev, info.index);
820
821 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
822 info.flags |= (VFIO_IRQ_INFO_MASKABLE |
823 VFIO_IRQ_INFO_AUTOMASKED);
824 else
825 info.flags |= VFIO_IRQ_INFO_NORESIZE;
826
827 return copy_to_user((void __user *)arg, &info, minsz) ?
828 -EFAULT : 0;
829
830 } else if (cmd == VFIO_DEVICE_SET_IRQS) {
831 struct vfio_irq_set hdr;
832 size_t size;
833 u8 *data = NULL;
834 int max, ret = 0;
835
836 minsz = offsetofend(struct vfio_irq_set, count);
837
838 if (copy_from_user(&hdr, (void __user *)arg, minsz))
839 return -EFAULT;
840
841 if (hdr.argsz < minsz || hdr.index >= VFIO_PCI_NUM_IRQS ||
842 hdr.count >= (U32_MAX - hdr.start) ||
843 hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
844 VFIO_IRQ_SET_ACTION_TYPE_MASK))
845 return -EINVAL;
846
847 max = vfio_pci_get_irq_count(vdev, hdr.index);
848 if (hdr.start >= max || hdr.start + hdr.count > max)
849 return -EINVAL;
850
851 switch (hdr.flags & VFIO_IRQ_SET_DATA_TYPE_MASK) {
852 case VFIO_IRQ_SET_DATA_NONE:
853 size = 0;
854 break;
855 case VFIO_IRQ_SET_DATA_BOOL:
856 size = sizeof(uint8_t);
857 break;
858 case VFIO_IRQ_SET_DATA_EVENTFD:
859 size = sizeof(int32_t);
860 break;
861 default:
862 return -EINVAL;
863 }
864
865 if (size) {
866 if (hdr.argsz - minsz < hdr.count * size)
867 return -EINVAL;
868
869 data = memdup_user((void __user *)(arg + minsz),
870 hdr.count * size);
871 if (IS_ERR(data))
872 return PTR_ERR(data);
873 }
874
875 mutex_lock(&vdev->igate);
876
877 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
878 hdr.start, hdr.count, data);
879
880 mutex_unlock(&vdev->igate);
881 kfree(data);
882
883 return ret;
884
885 } else if (cmd == VFIO_DEVICE_RESET) {
886 return vdev->reset_works ?
887 pci_try_reset_function(vdev->pdev) : -EINVAL;
888
889 } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
890 struct vfio_pci_hot_reset_info hdr;
891 struct vfio_pci_fill_info fill = { 0 };
892 struct vfio_pci_dependent_device *devices = NULL;
893 bool slot = false;
894 int ret = 0;
895
896 minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
897
898 if (copy_from_user(&hdr, (void __user *)arg, minsz))
899 return -EFAULT;
900
901 if (hdr.argsz < minsz)
902 return -EINVAL;
903
904 hdr.flags = 0;
905
906
907 if (!pci_probe_reset_slot(vdev->pdev->slot))
908 slot = true;
909 else if (pci_probe_reset_bus(vdev->pdev->bus))
910 return -ENODEV;
911
912
913 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
914 vfio_pci_count_devs,
915 &fill.max, slot);
916 if (ret)
917 return ret;
918
919 WARN_ON(!fill.max);
920
921
922
923
924
925 if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
926 ret = -ENOSPC;
927 hdr.count = fill.max;
928 goto reset_info_exit;
929 }
930
931 devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
932 if (!devices)
933 return -ENOMEM;
934
935 fill.devices = devices;
936
937 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
938 vfio_pci_fill_devs,
939 &fill, slot);
940
941
942
943
944
945
946 if (!ret)
947 hdr.count = fill.cur;
948
949reset_info_exit:
950 if (copy_to_user((void __user *)arg, &hdr, minsz))
951 ret = -EFAULT;
952
953 if (!ret) {
954 if (copy_to_user((void __user *)(arg + minsz), devices,
955 hdr.count * sizeof(*devices)))
956 ret = -EFAULT;
957 }
958
959 kfree(devices);
960 return ret;
961
962 } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
963 struct vfio_pci_hot_reset hdr;
964 int32_t *group_fds;
965 struct vfio_pci_group_entry *groups;
966 struct vfio_pci_group_info info;
967 bool slot = false;
968 int i, count = 0, ret = 0;
969
970 minsz = offsetofend(struct vfio_pci_hot_reset, count);
971
972 if (copy_from_user(&hdr, (void __user *)arg, minsz))
973 return -EFAULT;
974
975 if (hdr.argsz < minsz || hdr.flags)
976 return -EINVAL;
977
978
979 if (!pci_probe_reset_slot(vdev->pdev->slot))
980 slot = true;
981 else if (pci_probe_reset_bus(vdev->pdev->bus))
982 return -ENODEV;
983
984
985
986
987
988
989
990 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
991 vfio_pci_count_devs,
992 &count, slot);
993 if (ret)
994 return ret;
995
996
997 if (!hdr.count || hdr.count > count)
998 return -EINVAL;
999
1000 group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
1001 groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
1002 if (!group_fds || !groups) {
1003 kfree(group_fds);
1004 kfree(groups);
1005 return -ENOMEM;
1006 }
1007
1008 if (copy_from_user(group_fds, (void __user *)(arg + minsz),
1009 hdr.count * sizeof(*group_fds))) {
1010 kfree(group_fds);
1011 kfree(groups);
1012 return -EFAULT;
1013 }
1014
1015
1016
1017
1018
1019
1020 for (i = 0; i < hdr.count; i++) {
1021 struct vfio_group *group;
1022 struct fd f = fdget(group_fds[i]);
1023 if (!f.file) {
1024 ret = -EBADF;
1025 break;
1026 }
1027
1028 group = vfio_group_get_external_user(f.file);
1029 fdput(f);
1030 if (IS_ERR(group)) {
1031 ret = PTR_ERR(group);
1032 break;
1033 }
1034
1035 groups[i].group = group;
1036 groups[i].id = vfio_external_user_iommu_id(group);
1037 }
1038
1039 kfree(group_fds);
1040
1041
1042 if (ret)
1043 goto hot_reset_release;
1044
1045 info.count = hdr.count;
1046 info.groups = groups;
1047
1048
1049
1050
1051
1052 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
1053 vfio_pci_validate_devs,
1054 &info, slot);
1055 if (!ret)
1056
1057 ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
1058 pci_try_reset_bus(vdev->pdev->bus);
1059
1060hot_reset_release:
1061 for (i--; i >= 0; i--)
1062 vfio_group_put_external_user(groups[i].group);
1063
1064 kfree(groups);
1065 return ret;
1066 }
1067
1068 return -ENOTTY;
1069}
1070
1071static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
1072 size_t count, loff_t *ppos, bool iswrite)
1073{
1074 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
1075 struct vfio_pci_device *vdev = device_data;
1076
1077 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1078 return -EINVAL;
1079
1080 switch (index) {
1081 case VFIO_PCI_CONFIG_REGION_INDEX:
1082 return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
1083
1084 case VFIO_PCI_ROM_REGION_INDEX:
1085 if (iswrite)
1086 return -EINVAL;
1087 return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
1088
1089 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1090 return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
1091
1092 case VFIO_PCI_VGA_REGION_INDEX:
1093 return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
1094 default:
1095 index -= VFIO_PCI_NUM_REGIONS;
1096 return vdev->region[index].ops->rw(vdev, buf,
1097 count, ppos, iswrite);
1098 }
1099
1100 return -EINVAL;
1101}
1102
1103static ssize_t vfio_pci_read(void *device_data, char __user *buf,
1104 size_t count, loff_t *ppos)
1105{
1106 if (!count)
1107 return 0;
1108
1109 return vfio_pci_rw(device_data, buf, count, ppos, false);
1110}
1111
1112static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
1113 size_t count, loff_t *ppos)
1114{
1115 if (!count)
1116 return 0;
1117
1118 return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
1119}
1120
1121static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
1122{
1123 struct vfio_pci_device *vdev = device_data;
1124 struct pci_dev *pdev = vdev->pdev;
1125 unsigned int index;
1126 u64 phys_len, req_len, pgoff, req_start;
1127 int ret;
1128
1129 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1130
1131 if (vma->vm_end < vma->vm_start)
1132 return -EINVAL;
1133 if ((vma->vm_flags & VM_SHARED) == 0)
1134 return -EINVAL;
1135 if (index >= VFIO_PCI_ROM_REGION_INDEX)
1136 return -EINVAL;
1137 if (!vdev->bar_mmap_supported[index])
1138 return -EINVAL;
1139
1140 phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
1141 req_len = vma->vm_end - vma->vm_start;
1142 pgoff = vma->vm_pgoff &
1143 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1144 req_start = pgoff << PAGE_SHIFT;
1145
1146 if (req_start + req_len > phys_len)
1147 return -EINVAL;
1148
1149 if (index == vdev->msix_bar) {
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160 if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
1161 req_start + req_len <= vdev->msix_offset))
1162 return -EINVAL;
1163 }
1164
1165
1166
1167
1168
1169 if (!vdev->barmap[index]) {
1170 ret = pci_request_selected_regions(pdev,
1171 1 << index, "vfio-pci");
1172 if (ret)
1173 return ret;
1174
1175 vdev->barmap[index] = pci_iomap(pdev, index, 0);
1176 }
1177
1178 vma->vm_private_data = vdev;
1179 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1180 vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
1181
1182 return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
1183 req_len, vma->vm_page_prot);
1184}
1185
1186static void vfio_pci_request(void *device_data, unsigned int count)
1187{
1188 struct vfio_pci_device *vdev = device_data;
1189
1190 mutex_lock(&vdev->igate);
1191
1192 if (vdev->req_trigger) {
1193 if (!(count % 10))
1194 dev_notice_ratelimited(&vdev->pdev->dev,
1195 "Relaying device request to user (#%u)\n",
1196 count);
1197 eventfd_signal(vdev->req_trigger, 1);
1198 } else if (count == 0) {
1199 dev_warn(&vdev->pdev->dev,
1200 "No device request channel registered, blocked until released by user\n");
1201 }
1202
1203 mutex_unlock(&vdev->igate);
1204}
1205
1206static const struct vfio_device_ops vfio_pci_ops = {
1207 .name = "vfio-pci",
1208 .open = vfio_pci_open,
1209 .release = vfio_pci_release,
1210 .ioctl = vfio_pci_ioctl,
1211 .read = vfio_pci_read,
1212 .write = vfio_pci_write,
1213 .mmap = vfio_pci_mmap,
1214 .request = vfio_pci_request,
1215};
1216
1217static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1218{
1219 struct vfio_pci_device *vdev;
1220 struct iommu_group *group;
1221 int ret;
1222
1223 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
1224 return -EINVAL;
1225
1226 group = vfio_iommu_group_get(&pdev->dev);
1227 if (!group)
1228 return -EINVAL;
1229
1230 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
1231 if (!vdev) {
1232 vfio_iommu_group_put(group, &pdev->dev);
1233 return -ENOMEM;
1234 }
1235
1236 vdev->pdev = pdev;
1237 vdev->irq_type = VFIO_PCI_NUM_IRQS;
1238 mutex_init(&vdev->igate);
1239 spin_lock_init(&vdev->irqlock);
1240
1241 ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
1242 if (ret) {
1243 vfio_iommu_group_put(group, &pdev->dev);
1244 kfree(vdev);
1245 return ret;
1246 }
1247
1248 if (vfio_pci_is_vga(pdev)) {
1249 vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
1250 vga_set_legacy_decoding(pdev,
1251 vfio_pci_set_vga_decode(vdev, false));
1252 }
1253
1254 if (!disable_idle_d3) {
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264 pci_set_power_state(pdev, PCI_D0);
1265 pci_set_power_state(pdev, PCI_D3hot);
1266 }
1267
1268 return ret;
1269}
1270
1271static void vfio_pci_remove(struct pci_dev *pdev)
1272{
1273 struct vfio_pci_device *vdev;
1274
1275 vdev = vfio_del_group_dev(&pdev->dev);
1276 if (!vdev)
1277 return;
1278
1279 vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
1280 kfree(vdev->region);
1281 kfree(vdev);
1282
1283 if (vfio_pci_is_vga(pdev)) {
1284 vga_client_register(pdev, NULL, NULL, NULL);
1285 vga_set_legacy_decoding(pdev,
1286 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
1287 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
1288 }
1289
1290 if (!disable_idle_d3)
1291 pci_set_power_state(pdev, PCI_D0);
1292}
1293
1294static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
1295 pci_channel_state_t state)
1296{
1297 struct vfio_pci_device *vdev;
1298 struct vfio_device *device;
1299
1300 device = vfio_device_get_from_dev(&pdev->dev);
1301 if (device == NULL)
1302 return PCI_ERS_RESULT_DISCONNECT;
1303
1304 vdev = vfio_device_data(device);
1305 if (vdev == NULL) {
1306 vfio_device_put(device);
1307 return PCI_ERS_RESULT_DISCONNECT;
1308 }
1309
1310 mutex_lock(&vdev->igate);
1311
1312 if (vdev->err_trigger)
1313 eventfd_signal(vdev->err_trigger, 1);
1314
1315 mutex_unlock(&vdev->igate);
1316
1317 vfio_device_put(device);
1318
1319 return PCI_ERS_RESULT_CAN_RECOVER;
1320}
1321
1322static const struct pci_error_handlers vfio_err_handlers = {
1323 .error_detected = vfio_pci_aer_err_detected,
1324};
1325
1326static struct pci_driver vfio_pci_driver = {
1327 .name = "vfio-pci",
1328 .id_table = NULL,
1329 .probe = vfio_pci_probe,
1330 .remove = vfio_pci_remove,
1331 .err_handler = &vfio_err_handlers,
1332};
1333
1334struct vfio_devices {
1335 struct vfio_device **devices;
1336 int cur_index;
1337 int max_index;
1338};
1339
1340static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
1341{
1342 struct vfio_devices *devs = data;
1343 struct vfio_device *device;
1344
1345 if (devs->cur_index == devs->max_index)
1346 return -ENOSPC;
1347
1348 device = vfio_device_get_from_dev(&pdev->dev);
1349 if (!device)
1350 return -EINVAL;
1351
1352 if (pci_dev_driver(pdev) != &vfio_pci_driver) {
1353 vfio_device_put(device);
1354 return -EBUSY;
1355 }
1356
1357 devs->devices[devs->cur_index++] = device;
1358 return 0;
1359}
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
1374{
1375 struct vfio_devices devs = { .cur_index = 0 };
1376 int i = 0, ret = -EINVAL;
1377 bool needs_reset = false, slot = false;
1378 struct vfio_pci_device *tmp;
1379
1380 if (!pci_probe_reset_slot(vdev->pdev->slot))
1381 slot = true;
1382 else if (pci_probe_reset_bus(vdev->pdev->bus))
1383 return;
1384
1385 if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1386 &i, slot) || !i)
1387 return;
1388
1389 devs.max_index = i;
1390 devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
1391 if (!devs.devices)
1392 return;
1393
1394 if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
1395 vfio_pci_get_devs, &devs, slot))
1396 goto put_devs;
1397
1398 for (i = 0; i < devs.cur_index; i++) {
1399 tmp = vfio_device_data(devs.devices[i]);
1400 if (tmp->needs_reset)
1401 needs_reset = true;
1402 if (tmp->refcnt)
1403 goto put_devs;
1404 }
1405
1406 if (needs_reset)
1407 ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
1408 pci_try_reset_bus(vdev->pdev->bus);
1409
1410put_devs:
1411 for (i = 0; i < devs.cur_index; i++) {
1412 tmp = vfio_device_data(devs.devices[i]);
1413 if (!ret)
1414 tmp->needs_reset = false;
1415
1416 if (!tmp->refcnt && !disable_idle_d3)
1417 pci_set_power_state(tmp->pdev, PCI_D3hot);
1418
1419 vfio_device_put(devs.devices[i]);
1420 }
1421
1422 kfree(devs.devices);
1423}
1424
1425static void __exit vfio_pci_cleanup(void)
1426{
1427 pci_unregister_driver(&vfio_pci_driver);
1428 vfio_pci_uninit_perm_bits();
1429}
1430
1431static void __init vfio_pci_fill_ids(void)
1432{
1433 char *p, *id;
1434 int rc;
1435
1436
1437 if (ids[0] == '\0')
1438 return;
1439
1440
1441 p = ids;
1442 while ((id = strsep(&p, ","))) {
1443 unsigned int vendor, device, subvendor = PCI_ANY_ID,
1444 subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
1445 int fields;
1446
1447 if (!strlen(id))
1448 continue;
1449
1450 fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
1451 &vendor, &device, &subvendor, &subdevice,
1452 &class, &class_mask);
1453
1454 if (fields < 2) {
1455 pr_warn("invalid id string \"%s\"\n", id);
1456 continue;
1457 }
1458
1459 rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
1460 subvendor, subdevice, class, class_mask, 0);
1461 if (rc)
1462 pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
1463 vendor, device, subvendor, subdevice,
1464 class, class_mask, rc);
1465 else
1466 pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
1467 vendor, device, subvendor, subdevice,
1468 class, class_mask);
1469 }
1470}
1471
1472static int __init vfio_pci_init(void)
1473{
1474 int ret;
1475
1476
1477 ret = vfio_pci_init_perm_bits();
1478 if (ret)
1479 return ret;
1480
1481
1482 ret = pci_register_driver(&vfio_pci_driver);
1483 if (ret)
1484 goto out_driver;
1485
1486 vfio_pci_fill_ids();
1487
1488 return 0;
1489
1490out_driver:
1491 vfio_pci_uninit_perm_bits();
1492 return ret;
1493}
1494
1495module_init(vfio_pci_init);
1496module_exit(vfio_pci_cleanup);
1497
1498MODULE_VERSION(DRIVER_VERSION);
1499MODULE_LICENSE("GPL v2");
1500MODULE_AUTHOR(DRIVER_AUTHOR);
1501MODULE_DESCRIPTION(DRIVER_DESC);
1502