LXR linux/arch/mips/pci/fixup-tb0226.c

   1/*
   2 *  fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
   3 *
   4 *  Copyright (C) 2002-2005  Yoichi Yuasa <yuasa@linux-mips.org>
   5 *
   6 *  This program is free software; you can redistribute it and/or modify
   7 *  it under the terms of the GNU General Public License as published by
   8 *  the Free Software Foundation; either version 2 of the License, or
   9 *  (at your option) any later version.
  10 *
  11 *  This program is distributed in the hope that it will be useful,
  12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 *  GNU General Public License for more details.
  15 *
  16 *  You should have received a copy of the GNU General Public License
  17 *  along with this program; if not, write to the Free Software
  18 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19 */
  20#include <linux/init.h>
  21#include <linux/pci.h>
  22
  23#include <asm/vr41xx/giu.h>
  24#include <asm/vr41xx/tb0226.h>
  25
  26int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  27{
  28        int irq = -1;
  29
  30        switch (slot) {
  31        case 12:
  32                vr41xx_set_irq_trigger(GD82559_1_PIN,
  33                                       IRQ_TRIGGER_LEVEL,
  34                                       IRQ_SIGNAL_THROUGH);
  35                vr41xx_set_irq_level(GD82559_1_PIN, IRQ_LEVEL_LOW);
  36                irq = GD82559_1_IRQ;
  37                break;
  38        case 13:
  39                vr41xx_set_irq_trigger(GD82559_2_PIN,
  40                                       IRQ_TRIGGER_LEVEL,
  41                                       IRQ_SIGNAL_THROUGH);
  42                vr41xx_set_irq_level(GD82559_2_PIN, IRQ_LEVEL_LOW);
  43                irq = GD82559_2_IRQ;
  44                break;
  45        case 14:
  46                switch (pin) {
  47                case 1:
  48                        vr41xx_set_irq_trigger(UPD720100_INTA_PIN,
  49                                               IRQ_TRIGGER_LEVEL,
  50                                               IRQ_SIGNAL_THROUGH);
  51                        vr41xx_set_irq_level(UPD720100_INTA_PIN,
  52                                             IRQ_LEVEL_LOW);
  53                        irq = UPD720100_INTA_IRQ;
  54                        break;
  55                case 2:
  56                        vr41xx_set_irq_trigger(UPD720100_INTB_PIN,
  57                                               IRQ_TRIGGER_LEVEL,
  58                                               IRQ_SIGNAL_THROUGH);
  59                        vr41xx_set_irq_level(UPD720100_INTB_PIN,
  60                                             IRQ_LEVEL_LOW);
  61                        irq = UPD720100_INTB_IRQ;
  62                        break;
  63                case 3:
  64                        vr41xx_set_irq_trigger(UPD720100_INTC_PIN,
  65                                               IRQ_TRIGGER_LEVEL,
  66                                               IRQ_SIGNAL_THROUGH);
  67                        vr41xx_set_irq_level(UPD720100_INTC_PIN,
  68                                             IRQ_LEVEL_LOW);
  69                        irq = UPD720100_INTC_IRQ;
  70                        break;
  71                default:
  72                        break;
  73                }
  74                break;
  75        default:
  76                break;
  77        }
  78
  79        return irq;
  80}
  81
  82/* Do platform specific device initialization at pci_enable_device() time */
  83int pcibios_plat_dev_init(struct pci_dev *dev)
  84{
  85        return 0;
  86}
  87