linux/arch/sh/drivers/pci/pci.c
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   1/*
   2 * New-style PCI core.
   3 *
   4 * Copyright (c) 2004 - 2009  Paul Mundt
   5 * Copyright (c) 2002  M. R. Brown
   6 *
   7 * Modelled after arch/mips/pci/pci.c:
   8 *  Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
   9 *
  10 * This file is subject to the terms and conditions of the GNU General Public
  11 * License.  See the file "COPYING" in the main directory of this archive
  12 * for more details.
  13 */
  14#include <linux/kernel.h>
  15#include <linux/mm.h>
  16#include <linux/pci.h>
  17#include <linux/init.h>
  18#include <linux/types.h>
  19#include <linux/dma-debug.h>
  20#include <linux/io.h>
  21#include <linux/mutex.h>
  22#include <linux/spinlock.h>
  23#include <linux/export.h>
  24
  25unsigned long PCIBIOS_MIN_IO = 0x0000;
  26unsigned long PCIBIOS_MIN_MEM = 0;
  27
  28/*
  29 * The PCI controller list.
  30 */
  31static struct pci_channel *hose_head, **hose_tail = &hose_head;
  32
  33static int pci_initialized;
  34
  35static void pcibios_scanbus(struct pci_channel *hose)
  36{
  37        static int next_busno;
  38        static int need_domain_info;
  39        LIST_HEAD(resources);
  40        struct resource *res;
  41        resource_size_t offset;
  42        int i;
  43        struct pci_bus *bus;
  44
  45        for (i = 0; i < hose->nr_resources; i++) {
  46                res = hose->resources + i;
  47                offset = 0;
  48                if (res->flags & IORESOURCE_IO)
  49                        offset = hose->io_offset;
  50                else if (res->flags & IORESOURCE_MEM)
  51                        offset = hose->mem_offset;
  52                pci_add_resource_offset(&resources, res, offset);
  53        }
  54
  55        bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
  56                                &resources);
  57        hose->bus = bus;
  58
  59        need_domain_info = need_domain_info || hose->index;
  60        hose->need_domain_info = need_domain_info;
  61
  62        if (!bus) {
  63                pci_free_resource_list(&resources);
  64                return;
  65        }
  66
  67        next_busno = bus->busn_res.end + 1;
  68        /* Don't allow 8-bit bus number overflow inside the hose -
  69           reserve some space for bridges. */
  70        if (next_busno > 224) {
  71                next_busno = 0;
  72                need_domain_info = 1;
  73        }
  74
  75        pci_bus_size_bridges(bus);
  76        pci_bus_assign_resources(bus);
  77        pci_bus_add_devices(bus);
  78}
  79
  80/*
  81 * This interrupt-safe spinlock protects all accesses to PCI
  82 * configuration space.
  83 */
  84DEFINE_RAW_SPINLOCK(pci_config_lock);
  85static DEFINE_MUTEX(pci_scan_mutex);
  86
  87int register_pci_controller(struct pci_channel *hose)
  88{
  89        int i;
  90
  91        for (i = 0; i < hose->nr_resources; i++) {
  92                struct resource *res = hose->resources + i;
  93
  94                if (res->flags & IORESOURCE_IO) {
  95                        if (request_resource(&ioport_resource, res) < 0)
  96                                goto out;
  97                } else {
  98                        if (request_resource(&iomem_resource, res) < 0)
  99                                goto out;
 100                }
 101        }
 102
 103        *hose_tail = hose;
 104        hose_tail = &hose->next;
 105
 106        /*
 107         * Do not panic here but later - this might happen before console init.
 108         */
 109        if (!hose->io_map_base) {
 110                printk(KERN_WARNING
 111                       "registering PCI controller with io_map_base unset\n");
 112        }
 113
 114        /*
 115         * Setup the ERR/PERR and SERR timers, if available.
 116         */
 117        pcibios_enable_timers(hose);
 118
 119        /*
 120         * Scan the bus if it is register after the PCI subsystem
 121         * initialization.
 122         */
 123        if (pci_initialized) {
 124                mutex_lock(&pci_scan_mutex);
 125                pcibios_scanbus(hose);
 126                mutex_unlock(&pci_scan_mutex);
 127        }
 128
 129        return 0;
 130
 131out:
 132        for (--i; i >= 0; i--)
 133                release_resource(&hose->resources[i]);
 134
 135        printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
 136        return -1;
 137}
 138
 139static int __init pcibios_init(void)
 140{
 141        struct pci_channel *hose;
 142
 143        /* Scan all of the recorded PCI controllers.  */
 144        for (hose = hose_head; hose; hose = hose->next)
 145                pcibios_scanbus(hose);
 146
 147        pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
 148
 149        dma_debug_add_bus(&pci_bus_type);
 150
 151        pci_initialized = 1;
 152
 153        return 0;
 154}
 155subsys_initcall(pcibios_init);
 156
 157/*
 158 *  Called after each bus is probed, but before its children
 159 *  are examined.
 160 */
 161void pcibios_fixup_bus(struct pci_bus *bus)
 162{
 163}
 164
 165/*
 166 * We need to avoid collisions with `mirrored' VGA ports
 167 * and other strange ISA hardware, so we always want the
 168 * addresses to be allocated in the 0x000-0x0ff region
 169 * modulo 0x400.
 170 */
 171resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 172                                resource_size_t size, resource_size_t align)
 173{
 174        struct pci_dev *dev = data;
 175        struct pci_channel *hose = dev->sysdata;
 176        resource_size_t start = res->start;
 177
 178        if (res->flags & IORESOURCE_IO) {
 179                if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
 180                        start = PCIBIOS_MIN_IO + hose->resources[0].start;
 181
 182                /*
 183                 * Put everything into 0x00-0xff region modulo 0x400.
 184                 */
 185                if (start & 0x300)
 186                        start = (start + 0x3ff) & ~0x3ff;
 187        }
 188
 189        return start;
 190}
 191
 192static void __init
 193pcibios_bus_report_status_early(struct pci_channel *hose,
 194                                int top_bus, int current_bus,
 195                                unsigned int status_mask, int warn)
 196{
 197        unsigned int pci_devfn;
 198        u16 status;
 199        int ret;
 200
 201        for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
 202                if (PCI_FUNC(pci_devfn))
 203                        continue;
 204                ret = early_read_config_word(hose, top_bus, current_bus,
 205                                             pci_devfn, PCI_STATUS, &status);
 206                if (ret != PCIBIOS_SUCCESSFUL)
 207                        continue;
 208                if (status == 0xffff)
 209                        continue;
 210
 211                early_write_config_word(hose, top_bus, current_bus,
 212                                        pci_devfn, PCI_STATUS,
 213                                        status & status_mask);
 214                if (warn)
 215                        printk("(%02x:%02x: %04X) ", current_bus,
 216                               pci_devfn, status);
 217        }
 218}
 219
 220/*
 221 * We can't use pci_find_device() here since we are
 222 * called from interrupt context.
 223 */
 224static void __ref
 225pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
 226                          int warn)
 227{
 228        struct pci_dev *dev;
 229
 230        list_for_each_entry(dev, &bus->devices, bus_list) {
 231                u16 status;
 232
 233                /*
 234                 * ignore host bridge - we handle
 235                 * that separately
 236                 */
 237                if (dev->bus->number == 0 && dev->devfn == 0)
 238                        continue;
 239
 240                pci_read_config_word(dev, PCI_STATUS, &status);
 241                if (status == 0xffff)
 242                        continue;
 243
 244                if ((status & status_mask) == 0)
 245                        continue;
 246
 247                /* clear the status errors */
 248                pci_write_config_word(dev, PCI_STATUS, status & status_mask);
 249
 250                if (warn)
 251                        printk("(%s: %04X) ", pci_name(dev), status);
 252        }
 253
 254        list_for_each_entry(dev, &bus->devices, bus_list)
 255                if (dev->subordinate)
 256                        pcibios_bus_report_status(dev->subordinate, status_mask, warn);
 257}
 258
 259void __ref pcibios_report_status(unsigned int status_mask, int warn)
 260{
 261        struct pci_channel *hose;
 262
 263        for (hose = hose_head; hose; hose = hose->next) {
 264                if (unlikely(!hose->bus))
 265                        pcibios_bus_report_status_early(hose, hose_head->index,
 266                                        hose->index, status_mask, warn);
 267                else
 268                        pcibios_bus_report_status(hose->bus, status_mask, warn);
 269        }
 270}
 271
 272int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 273                        enum pci_mmap_state mmap_state, int write_combine)
 274{
 275        /*
 276         * I/O space can be accessed via normal processor loads and stores on
 277         * this platform but for now we elect not to do this and portable
 278         * drivers should not do this anyway.
 279         */
 280        if (mmap_state == pci_mmap_io)
 281                return -EINVAL;
 282
 283        /*
 284         * Ignore write-combine; for now only return uncached mappings.
 285         */
 286        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 287
 288        return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
 289                               vma->vm_end - vma->vm_start,
 290                               vma->vm_page_prot);
 291}
 292
 293#ifndef CONFIG_GENERIC_IOMAP
 294
 295void __iomem *__pci_ioport_map(struct pci_dev *dev,
 296                               unsigned long port, unsigned int nr)
 297{
 298        struct pci_channel *chan = dev->sysdata;
 299
 300        if (unlikely(!chan->io_map_base)) {
 301                chan->io_map_base = sh_io_port_base;
 302
 303                if (pci_domains_supported)
 304                        panic("To avoid data corruption io_map_base MUST be "
 305                              "set with multiple PCI domains.");
 306        }
 307
 308        return (void __iomem *)(chan->io_map_base + port);
 309}
 310
 311void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
 312{
 313        iounmap(addr);
 314}
 315EXPORT_SYMBOL(pci_iounmap);
 316
 317#endif /* CONFIG_GENERIC_IOMAP */
 318
 319EXPORT_SYMBOL(PCIBIOS_MIN_IO);
 320EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
 321