LXR linux/arch/x86/pci/pcbios.c

   1/*
   2 * BIOS32 and PCI BIOS handling.
   3 */
   4
   5#include <linux/pci.h>
   6#include <linux/init.h>
   7#include <linux/slab.h>
   8#include <linux/module.h>
   9#include <linux/uaccess.h>
  10#include <asm/pci_x86.h>
  11#include <asm/pci-functions.h>
  12#include <asm/cacheflush.h>
  13
  14/* BIOS32 signature: "_32_" */
  15#define BIOS32_SIGNATURE        (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
  16
  17/* PCI signature: "PCI " */
  18#define PCI_SIGNATURE           (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
  19
  20/* PCI service signature: "$PCI" */
  21#define PCI_SERVICE             (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
  22
  23/* PCI BIOS hardware mechanism flags */
  24#define PCIBIOS_HW_TYPE1                0x01
  25#define PCIBIOS_HW_TYPE2                0x02
  26#define PCIBIOS_HW_TYPE1_SPEC           0x10
  27#define PCIBIOS_HW_TYPE2_SPEC           0x20
  28
  29int pcibios_enabled;
  30
  31/* According to the BIOS specification at:
  32 * http://members.datafast.net.au/dft0802/specs/bios21.pdf, we could
  33 * restrict the x zone to some pages and make it ro. But this may be
  34 * broken on some bios, complex to handle with static_protections.
  35 * We could make the 0xe0000-0x100000 range rox, but this can break
  36 * some ISA mapping.
  37 *
  38 * So we let's an rw and x hole when pcibios is used. This shouldn't
  39 * happen for modern system with mmconfig, and if you don't want it
  40 * you could disable pcibios...
  41 */
  42static inline void set_bios_x(void)
  43{
  44        pcibios_enabled = 1;
  45        set_memory_x(PAGE_OFFSET + BIOS_BEGIN, (BIOS_END - BIOS_BEGIN) >> PAGE_SHIFT);
  46        if (__supported_pte_mask & _PAGE_NX)
  47                printk(KERN_INFO "PCI : PCI BIOS area is rw and x. Use pci=nobios if you want it NX.\n");
  48}
  49
  50/*
  51 * This is the standard structure used to identify the entry point
  52 * to the BIOS32 Service Directory, as documented in
  53 *      Standard BIOS 32-bit Service Directory Proposal
  54 *      Revision 0.4 May 24, 1993
  55 *      Phoenix Technologies Ltd.
  56 *      Norwood, MA
  57 * and the PCI BIOS specification.
  58 */
  59
  60union bios32 {
  61        struct {
  62                unsigned long signature;        /* _32_ */
  63                unsigned long entry;            /* 32 bit physical address */
  64                unsigned char revision;         /* Revision level, 0 */
  65                unsigned char length;           /* Length in paragraphs should be 01 */
  66                unsigned char checksum;         /* All bytes must add up to zero */
  67                unsigned char reserved[5];      /* Must be zero */
  68        } fields;
  69        char chars[16];
  70};
  71
  72/*
  73 * Physical address of the service directory.  I don't know if we're
  74 * allowed to have more than one of these or not, so just in case
  75 * we'll make pcibios_present() take a memory start parameter and store
  76 * the array there.
  77 */
  78
  79static struct {
  80        unsigned long address;
  81        unsigned short segment;
  82} bios32_indirect __initdata = { 0, __KERNEL_CS };
  83
  84/*
  85 * Returns the entry point for the given service, NULL on error
  86 */
  87
  88static unsigned long __init bios32_service(unsigned long service)
  89{
  90        unsigned char return_code;      /* %al */
  91        unsigned long address;          /* %ebx */
  92        unsigned long length;           /* %ecx */
  93        unsigned long entry;            /* %edx */
  94        unsigned long flags;
  95
  96        local_irq_save(flags);
  97        __asm__("lcall *(%%edi); cld"
  98                : "=a" (return_code),
  99                  "=b" (address),
 100                  "=c" (length),
 101                  "=d" (entry)
 102                : "0" (service),
 103                  "1" (0),
 104                  "D" (&bios32_indirect));
 105        local_irq_restore(flags);
 106
 107        switch (return_code) {
 108                case 0:
 109                        return address + entry;
 110                case 0x80:      /* Not present */
 111                        printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
 112                        return 0;
 113                default: /* Shouldn't happen */
 114                        printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
 115                                service, return_code);
 116                        return 0;
 117        }
 118}
 119
 120static struct {
 121        unsigned long address;
 122        unsigned short segment;
 123} pci_indirect __ro_after_init = {
 124        .address = 0,
 125        .segment = __KERNEL_CS,
 126};
 127
 128static int pci_bios_present __ro_after_init;
 129
 130static int __init check_pcibios(void)
 131{
 132        u32 signature, eax, ebx, ecx;
 133        u8 status, major_ver, minor_ver, hw_mech;
 134        unsigned long flags, pcibios_entry;
 135
 136        if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
 137                pci_indirect.address = pcibios_entry + PAGE_OFFSET;
 138
 139                local_irq_save(flags);
 140                __asm__(
 141                        "lcall *(%%edi); cld\n\t"
 142                        "jc 1f\n\t"
 143                        "xor %%ah, %%ah\n"
 144                        "1:"
 145                        : "=d" (signature),
 146                          "=a" (eax),
 147                          "=b" (ebx),
 148                          "=c" (ecx)
 149                        : "1" (PCIBIOS_PCI_BIOS_PRESENT),
 150                          "D" (&pci_indirect)
 151                        : "memory");
 152                local_irq_restore(flags);
 153
 154                status = (eax >> 8) & 0xff;
 155                hw_mech = eax & 0xff;
 156                major_ver = (ebx >> 8) & 0xff;
 157                minor_ver = ebx & 0xff;
 158                if (pcibios_last_bus < 0)
 159                        pcibios_last_bus = ecx & 0xff;
 160                DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n",
 161                        status, hw_mech, major_ver, minor_ver, pcibios_last_bus);
 162                if (status || signature != PCI_SIGNATURE) {
 163                        printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n",
 164                                status, signature);
 165                        return 0;
 166                }
 167                printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
 168                        major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
 169#ifdef CONFIG_PCI_DIRECT
 170                if (!(hw_mech & PCIBIOS_HW_TYPE1))
 171                        pci_probe &= ~PCI_PROBE_CONF1;
 172                if (!(hw_mech & PCIBIOS_HW_TYPE2))
 173                        pci_probe &= ~PCI_PROBE_CONF2;
 174#endif
 175                return 1;
 176        }
 177        return 0;
 178}
 179
 180static int pci_bios_read(unsigned int seg, unsigned int bus,
 181                         unsigned int devfn, int reg, int len, u32 *value)
 182{
 183        unsigned long result = 0;
 184        unsigned long flags;
 185        unsigned long bx = (bus << 8) | devfn;
 186        u16 number = 0, mask = 0;
 187
 188        WARN_ON(seg);
 189        if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
 190                return -EINVAL;
 191
 192        raw_spin_lock_irqsave(&pci_config_lock, flags);
 193
 194        switch (len) {
 195        case 1:
 196                number = PCIBIOS_READ_CONFIG_BYTE;
 197                mask = 0xff;
 198                break;
 199        case 2:
 200                number = PCIBIOS_READ_CONFIG_WORD;
 201                mask = 0xffff;
 202                break;
 203        case 4:
 204                number = PCIBIOS_READ_CONFIG_DWORD;
 205                break;
 206        }
 207
 208        __asm__("lcall *(%%esi); cld\n\t"
 209                "jc 1f\n\t"
 210                "xor %%ah, %%ah\n"
 211                "1:"
 212                : "=c" (*value),
 213                  "=a" (result)
 214                : "1" (number),
 215                  "b" (bx),
 216                  "D" ((long)reg),
 217                  "S" (&pci_indirect));
 218        /*
 219         * Zero-extend the result beyond 8 or 16 bits, do not trust the
 220         * BIOS having done it:
 221         */
 222        if (mask)
 223                *value &= mask;
 224
 225        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
 226
 227        return (int)((result & 0xff00) >> 8);
 228}
 229
 230static int pci_bios_write(unsigned int seg, unsigned int bus,
 231                          unsigned int devfn, int reg, int len, u32 value)
 232{
 233        unsigned long result = 0;
 234        unsigned long flags;
 235        unsigned long bx = (bus << 8) | devfn;
 236        u16 number = 0;
 237
 238        WARN_ON(seg);
 239        if ((bus > 255) || (devfn > 255) || (reg > 255)) 
 240                return -EINVAL;
 241
 242        raw_spin_lock_irqsave(&pci_config_lock, flags);
 243
 244        switch (len) {
 245        case 1:
 246                number = PCIBIOS_WRITE_CONFIG_BYTE;
 247                break;
 248        case 2:
 249                number = PCIBIOS_WRITE_CONFIG_WORD;
 250                break;
 251        case 4:
 252                number = PCIBIOS_WRITE_CONFIG_DWORD;
 253                break;
 254        }
 255
 256        __asm__("lcall *(%%esi); cld\n\t"
 257                "jc 1f\n\t"
 258                "xor %%ah, %%ah\n"
 259                "1:"
 260                : "=a" (result)
 261                : "0" (number),
 262                  "c" (value),
 263                  "b" (bx),
 264                  "D" ((long)reg),
 265                  "S" (&pci_indirect));
 266
 267        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
 268
 269        return (int)((result & 0xff00) >> 8);
 270}
 271
 272
 273/*
 274 * Function table for BIOS32 access
 275 */
 276
 277static const struct pci_raw_ops pci_bios_access = {
 278        .read =         pci_bios_read,
 279        .write =        pci_bios_write
 280};
 281
 282/*
 283 * Try to find PCI BIOS.
 284 */
 285
 286static const struct pci_raw_ops *__init pci_find_bios(void)
 287{
 288        union bios32 *check;
 289        unsigned char sum;
 290        int i, length;
 291
 292        /*
 293         * Follow the standard procedure for locating the BIOS32 Service
 294         * directory by scanning the permissible address range from
 295         * 0xe0000 through 0xfffff for a valid BIOS32 structure.
 296         */
 297
 298        for (check = (union bios32 *) __va(0xe0000);
 299             check <= (union bios32 *) __va(0xffff0);
 300             ++check) {
 301                long sig;
 302                if (probe_kernel_address(&check->fields.signature, sig))
 303                        continue;
 304
 305                if (check->fields.signature != BIOS32_SIGNATURE)
 306                        continue;
 307                length = check->fields.length * 16;
 308                if (!length)
 309                        continue;
 310                sum = 0;
 311                for (i = 0; i < length ; ++i)
 312                        sum += check->chars[i];
 313                if (sum != 0)
 314                        continue;
 315                if (check->fields.revision != 0) {
 316                        printk("PCI: unsupported BIOS32 revision %d at 0x%p\n",
 317                                check->fields.revision, check);
 318                        continue;
 319                }
 320                DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check);
 321                if (check->fields.entry >= 0x100000) {
 322                        printk("PCI: BIOS32 entry (0x%p) in high memory, "
 323                                        "cannot use.\n", check);
 324                        return NULL;
 325                } else {
 326                        unsigned long bios32_entry = check->fields.entry;
 327                        DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n",
 328                                        bios32_entry);
 329                        bios32_indirect.address = bios32_entry + PAGE_OFFSET;
 330                        set_bios_x();
 331                        if (check_pcibios())
 332                                return &pci_bios_access;
 333                }
 334                break;  /* Hopefully more than one BIOS32 cannot happen... */
 335        }
 336
 337        return NULL;
 338}
 339
 340/*
 341 *  BIOS Functions for IRQ Routing
 342 */
 343
 344struct irq_routing_options {
 345        u16 size;
 346        struct irq_info *table;
 347        u16 segment;
 348} __attribute__((packed));
 349
 350struct irq_routing_table * pcibios_get_irq_routing_table(void)
 351{
 352        struct irq_routing_options opt;
 353        struct irq_routing_table *rt = NULL;
 354        int ret, map;
 355        unsigned long page;
 356
 357        if (!pci_bios_present)
 358                return NULL;
 359        page = __get_free_page(GFP_KERNEL);
 360        if (!page)
 361                return NULL;
 362        opt.table = (struct irq_info *) page;
 363        opt.size = PAGE_SIZE;
 364        opt.segment = __KERNEL_DS;
 365
 366        DBG("PCI: Fetching IRQ routing table... ");
 367        __asm__("push %%es\n\t"
 368                "push %%ds\n\t"
 369                "pop  %%es\n\t"
 370                "lcall *(%%esi); cld\n\t"
 371                "pop %%es\n\t"
 372                "jc 1f\n\t"
 373                "xor %%ah, %%ah\n"
 374                "1:"
 375                : "=a" (ret),
 376                  "=b" (map),
 377                  "=m" (opt)
 378                : "0" (PCIBIOS_GET_ROUTING_OPTIONS),
 379                  "1" (0),
 380                  "D" ((long) &opt),
 381                  "S" (&pci_indirect),
 382                  "m" (opt)
 383                : "memory");
 384        DBG("OK  ret=%d, size=%d, map=%x\n", ret, opt.size, map);
 385        if (ret & 0xff00)
 386                printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff);
 387        else if (opt.size) {
 388                rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
 389                if (rt) {
 390                        memset(rt, 0, sizeof(struct irq_routing_table));
 391                        rt->size = opt.size + sizeof(struct irq_routing_table);
 392                        rt->exclusive_irqs = map;
 393                        memcpy(rt->slots, (void *) page, opt.size);
 394                        printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
 395                }
 396        }
 397        free_page(page);
 398        return rt;
 399}
 400EXPORT_SYMBOL(pcibios_get_irq_routing_table);
 401
 402int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
 403{
 404        int ret;
 405
 406        __asm__("lcall *(%%esi); cld\n\t"
 407                "jc 1f\n\t"
 408                "xor %%ah, %%ah\n"
 409                "1:"
 410                : "=a" (ret)
 411                : "0" (PCIBIOS_SET_PCI_HW_INT),
 412                  "b" ((dev->bus->number << 8) | dev->devfn),
 413                  "c" ((irq << 8) | (pin + 10)),
 414                  "S" (&pci_indirect));
 415        return !(ret & 0xff00);
 416}
 417EXPORT_SYMBOL(pcibios_set_irq_routing);
 418
 419void __init pci_pcbios_init(void)
 420{
 421        if ((pci_probe & PCI_PROBE_BIOS) 
 422                && ((raw_pci_ops = pci_find_bios()))) {
 423                pci_bios_present = 1;
 424        }
 425}
 426
 427