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24#ifndef _CGS_COMMON_H
25#define _CGS_COMMON_H
26
27#include "amd_shared.h"
28
29struct cgs_device;
30
31
32
33
34enum cgs_gpu_mem_type {
35 CGS_GPU_MEM_TYPE__VISIBLE_FB,
36 CGS_GPU_MEM_TYPE__INVISIBLE_FB,
37 CGS_GPU_MEM_TYPE__VISIBLE_CONTIG_FB,
38 CGS_GPU_MEM_TYPE__INVISIBLE_CONTIG_FB,
39 CGS_GPU_MEM_TYPE__GART_CACHEABLE,
40 CGS_GPU_MEM_TYPE__GART_WRITECOMBINE
41};
42
43
44
45
46enum cgs_ind_reg {
47 CGS_IND_REG__MMIO,
48 CGS_IND_REG__PCIE,
49 CGS_IND_REG__SMC,
50 CGS_IND_REG__UVD_CTX,
51 CGS_IND_REG__DIDT,
52 CGS_IND_REG_GC_CAC,
53 CGS_IND_REG__AUDIO_ENDPT
54};
55
56
57
58
59enum cgs_clock {
60 CGS_CLOCK__SCLK,
61 CGS_CLOCK__MCLK,
62 CGS_CLOCK__VCLK,
63 CGS_CLOCK__DCLK,
64 CGS_CLOCK__ECLK,
65 CGS_CLOCK__ACLK,
66 CGS_CLOCK__ICLK,
67
68};
69
70
71
72
73enum cgs_engine {
74 CGS_ENGINE__UVD,
75 CGS_ENGINE__VCE,
76 CGS_ENGINE__VP8,
77 CGS_ENGINE__ACP_DMA,
78 CGS_ENGINE__ACP_DSP0,
79 CGS_ENGINE__ACP_DSP1,
80 CGS_ENGINE__ISP,
81
82};
83
84
85
86
87enum cgs_voltage_planes {
88 CGS_VOLTAGE_PLANE__SENSOR0,
89 CGS_VOLTAGE_PLANE__SENSOR1,
90
91};
92
93
94
95
96enum cgs_ucode_id {
97 CGS_UCODE_ID_SMU = 0,
98 CGS_UCODE_ID_SMU_SK,
99 CGS_UCODE_ID_SDMA0,
100 CGS_UCODE_ID_SDMA1,
101 CGS_UCODE_ID_CP_CE,
102 CGS_UCODE_ID_CP_PFP,
103 CGS_UCODE_ID_CP_ME,
104 CGS_UCODE_ID_CP_MEC,
105 CGS_UCODE_ID_CP_MEC_JT1,
106 CGS_UCODE_ID_CP_MEC_JT2,
107 CGS_UCODE_ID_GMCON_RENG,
108 CGS_UCODE_ID_RLC_G,
109 CGS_UCODE_ID_MAXIMUM,
110};
111
112enum cgs_system_info_id {
113 CGS_SYSTEM_INFO_ADAPTER_BDF_ID = 1,
114 CGS_SYSTEM_INFO_PCIE_GEN_INFO,
115 CGS_SYSTEM_INFO_PCIE_MLW,
116 CGS_SYSTEM_INFO_PCIE_DEV,
117 CGS_SYSTEM_INFO_PCIE_REV,
118 CGS_SYSTEM_INFO_CG_FLAGS,
119 CGS_SYSTEM_INFO_PG_FLAGS,
120 CGS_SYSTEM_INFO_GFX_CU_INFO,
121 CGS_SYSTEM_INFO_GFX_SE_INFO,
122 CGS_SYSTEM_INFO_PCIE_SUB_SYS_ID,
123 CGS_SYSTEM_INFO_PCIE_SUB_SYS_VENDOR_ID,
124 CGS_SYSTEM_INFO_ID_MAXIMUM,
125};
126
127struct cgs_system_info {
128 uint64_t size;
129 enum cgs_system_info_id info_id;
130 union {
131 void *ptr;
132 uint64_t value;
133 };
134 uint64_t padding[13];
135};
136
137
138
139
140enum cgs_resource_type {
141 CGS_RESOURCE_TYPE_MMIO = 0,
142 CGS_RESOURCE_TYPE_FB,
143 CGS_RESOURCE_TYPE_IO,
144 CGS_RESOURCE_TYPE_DOORBELL,
145 CGS_RESOURCE_TYPE_ROM,
146};
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153struct cgs_clock_limits {
154 unsigned min;
155 unsigned max;
156 unsigned sustainable;
157};
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162struct cgs_firmware_info {
163 uint16_t version;
164 uint16_t fw_version;
165 uint16_t feature_version;
166 uint32_t image_size;
167 uint64_t mc_addr;
168
169
170 uint32_t ucode_start_address;
171
172 void *kptr;
173};
174
175struct cgs_mode_info {
176 uint32_t refresh_rate;
177 uint32_t ref_clock;
178 uint32_t vblank_time_us;
179};
180
181struct cgs_display_info {
182 uint32_t display_count;
183 uint32_t active_display_mask;
184 struct cgs_mode_info *mode_info;
185};
186
187typedef unsigned long cgs_handle_t;
188
189#define CGS_ACPI_METHOD_ATCS 0x53435441
190#define CGS_ACPI_METHOD_ATIF 0x46495441
191#define CGS_ACPI_METHOD_ATPX 0x58505441
192#define CGS_ACPI_FIELD_METHOD_NAME 0x00000001
193#define CGS_ACPI_FIELD_INPUT_ARGUMENT_COUNT 0x00000002
194#define CGS_ACPI_MAX_BUFFER_SIZE 256
195#define CGS_ACPI_TYPE_ANY 0x00
196#define CGS_ACPI_TYPE_INTEGER 0x01
197#define CGS_ACPI_TYPE_STRING 0x02
198#define CGS_ACPI_TYPE_BUFFER 0x03
199#define CGS_ACPI_TYPE_PACKAGE 0x04
200
201struct cgs_acpi_method_argument {
202 uint32_t type;
203 uint32_t data_length;
204 union{
205 uint32_t value;
206 void *pointer;
207 };
208};
209
210struct cgs_acpi_method_info {
211 uint32_t size;
212 uint32_t field;
213 uint32_t input_count;
214 uint32_t name;
215 struct cgs_acpi_method_argument *pinput_argument;
216 uint32_t output_count;
217 struct cgs_acpi_method_argument *poutput_argument;
218 uint32_t padding[9];
219};
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240typedef int (*cgs_gpu_mem_info_t)(struct cgs_device *cgs_device, enum cgs_gpu_mem_type type,
241 uint64_t *mc_start, uint64_t *mc_size,
242 uint64_t *mem_size);
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256typedef int (*cgs_gmap_kmem_t)(struct cgs_device *cgs_device, void *kmem, uint64_t size,
257 uint64_t min_offset, uint64_t max_offset,
258 cgs_handle_t *kmem_handle, uint64_t *mcaddr);
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267typedef int (*cgs_gunmap_kmem_t)(struct cgs_device *cgs_device, cgs_handle_t kmem_handle);
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296typedef int (*cgs_alloc_gpu_mem_t)(struct cgs_device *cgs_device, enum cgs_gpu_mem_type type,
297 uint64_t size, uint64_t align,
298 uint64_t min_offset, uint64_t max_offset,
299 cgs_handle_t *handle);
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308typedef int (*cgs_free_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle);
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320typedef int (*cgs_gmap_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle,
321 uint64_t *mcaddr);
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332typedef int (*cgs_gunmap_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle);
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343typedef int (*cgs_kmap_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle,
344 void **map);
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353typedef int (*cgs_kunmap_gpu_mem_t)(struct cgs_device *cgs_device, cgs_handle_t handle);
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362typedef uint32_t (*cgs_read_register_t)(struct cgs_device *cgs_device, unsigned offset);
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370typedef void (*cgs_write_register_t)(struct cgs_device *cgs_device, unsigned offset,
371 uint32_t value);
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380typedef uint32_t (*cgs_read_ind_register_t)(struct cgs_device *cgs_device, enum cgs_ind_reg space,
381 unsigned index);
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389typedef void (*cgs_write_ind_register_t)(struct cgs_device *cgs_device, enum cgs_ind_reg space,
390 unsigned index, uint32_t value);
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399typedef uint8_t (*cgs_read_pci_config_byte_t)(struct cgs_device *cgs_device, unsigned addr);
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408typedef uint16_t (*cgs_read_pci_config_word_t)(struct cgs_device *cgs_device, unsigned addr);
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417typedef uint32_t (*cgs_read_pci_config_dword_t)(struct cgs_device *cgs_device,
418 unsigned addr);
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426typedef void (*cgs_write_pci_config_byte_t)(struct cgs_device *cgs_device, unsigned addr,
427 uint8_t value);
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435typedef void (*cgs_write_pci_config_word_t)(struct cgs_device *cgs_device, unsigned addr,
436 uint16_t value);
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444typedef void (*cgs_write_pci_config_dword_t)(struct cgs_device *cgs_device, unsigned addr,
445 uint32_t value);
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458typedef int (*cgs_get_pci_resource_t)(struct cgs_device *cgs_device,
459 enum cgs_resource_type resource_type,
460 uint64_t size,
461 uint64_t offset,
462 uint64_t *resource_base);
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474typedef const void *(*cgs_atom_get_data_table_t)(
475 struct cgs_device *cgs_device, unsigned table,
476 uint16_t *size, uint8_t *frev, uint8_t *crev);
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487typedef int (*cgs_atom_get_cmd_table_revs_t)(struct cgs_device *cgs_device, unsigned table,
488 uint8_t *frev, uint8_t *crev);
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498typedef int (*cgs_atom_exec_cmd_table_t)(struct cgs_device *cgs_device,
499 unsigned table, void *args);
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508typedef int (*cgs_create_pm_request_t)(struct cgs_device *cgs_device, cgs_handle_t *request);
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517typedef int (*cgs_destroy_pm_request_t)(struct cgs_device *cgs_device, cgs_handle_t request);
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533typedef int (*cgs_set_pm_request_t)(struct cgs_device *cgs_device, cgs_handle_t request,
534 int active);
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545typedef int (*cgs_pm_request_clock_t)(struct cgs_device *cgs_device, cgs_handle_t request,
546 enum cgs_clock clock, unsigned freq);
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557typedef int (*cgs_pm_request_engine_t)(struct cgs_device *cgs_device, cgs_handle_t request,
558 enum cgs_engine engine, int powered);
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568typedef int (*cgs_pm_query_clock_limits_t)(struct cgs_device *cgs_device,
569 enum cgs_clock clock,
570 struct cgs_clock_limits *limits);
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580typedef int (*cgs_set_camera_voltages_t)(struct cgs_device *cgs_device, uint32_t mask,
581 const uint32_t *voltages);
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590typedef int (*cgs_get_firmware_info)(struct cgs_device *cgs_device,
591 enum cgs_ucode_id type,
592 struct cgs_firmware_info *info);
593
594typedef int (*cgs_rel_firmware)(struct cgs_device *cgs_device,
595 enum cgs_ucode_id type);
596
597typedef int(*cgs_set_powergating_state)(struct cgs_device *cgs_device,
598 enum amd_ip_block_type block_type,
599 enum amd_powergating_state state);
600
601typedef int(*cgs_set_clockgating_state)(struct cgs_device *cgs_device,
602 enum amd_ip_block_type block_type,
603 enum amd_clockgating_state state);
604
605typedef int(*cgs_get_active_displays_info)(
606 struct cgs_device *cgs_device,
607 struct cgs_display_info *info);
608
609typedef int (*cgs_notify_dpm_enabled)(struct cgs_device *cgs_device, bool enabled);
610
611typedef int (*cgs_call_acpi_method)(struct cgs_device *cgs_device,
612 uint32_t acpi_method,
613 uint32_t acpi_function,
614 void *pinput, void *poutput,
615 uint32_t output_count,
616 uint32_t input_size,
617 uint32_t output_size);
618
619typedef int (*cgs_query_system_info)(struct cgs_device *cgs_device,
620 struct cgs_system_info *sys_info);
621
622struct cgs_ops {
623
624 cgs_gpu_mem_info_t gpu_mem_info;
625 cgs_gmap_kmem_t gmap_kmem;
626 cgs_gunmap_kmem_t gunmap_kmem;
627 cgs_alloc_gpu_mem_t alloc_gpu_mem;
628 cgs_free_gpu_mem_t free_gpu_mem;
629 cgs_gmap_gpu_mem_t gmap_gpu_mem;
630 cgs_gunmap_gpu_mem_t gunmap_gpu_mem;
631 cgs_kmap_gpu_mem_t kmap_gpu_mem;
632 cgs_kunmap_gpu_mem_t kunmap_gpu_mem;
633
634 cgs_read_register_t read_register;
635 cgs_write_register_t write_register;
636 cgs_read_ind_register_t read_ind_register;
637 cgs_write_ind_register_t write_ind_register;
638
639 cgs_read_pci_config_byte_t read_pci_config_byte;
640 cgs_read_pci_config_word_t read_pci_config_word;
641 cgs_read_pci_config_dword_t read_pci_config_dword;
642 cgs_write_pci_config_byte_t write_pci_config_byte;
643 cgs_write_pci_config_word_t write_pci_config_word;
644 cgs_write_pci_config_dword_t write_pci_config_dword;
645
646 cgs_get_pci_resource_t get_pci_resource;
647
648 cgs_atom_get_data_table_t atom_get_data_table;
649 cgs_atom_get_cmd_table_revs_t atom_get_cmd_table_revs;
650 cgs_atom_exec_cmd_table_t atom_exec_cmd_table;
651
652 cgs_create_pm_request_t create_pm_request;
653 cgs_destroy_pm_request_t destroy_pm_request;
654 cgs_set_pm_request_t set_pm_request;
655 cgs_pm_request_clock_t pm_request_clock;
656 cgs_pm_request_engine_t pm_request_engine;
657 cgs_pm_query_clock_limits_t pm_query_clock_limits;
658 cgs_set_camera_voltages_t set_camera_voltages;
659
660 cgs_get_firmware_info get_firmware_info;
661 cgs_rel_firmware rel_firmware;
662
663 cgs_set_powergating_state set_powergating_state;
664 cgs_set_clockgating_state set_clockgating_state;
665
666 cgs_get_active_displays_info get_active_displays_info;
667
668 cgs_notify_dpm_enabled notify_dpm_enabled;
669
670 cgs_call_acpi_method call_acpi_method;
671
672 cgs_query_system_info query_system_info;
673};
674
675struct cgs_os_ops;
676
677struct cgs_device
678{
679 const struct cgs_ops *ops;
680 const struct cgs_os_ops *os_ops;
681
682};
683
684
685
686#define CGS_CALL(func,dev,...) \
687 (((struct cgs_device *)dev)->ops->func(dev, ##__VA_ARGS__))
688#define CGS_OS_CALL(func,dev,...) \
689 (((struct cgs_device *)dev)->os_ops->func(dev, ##__VA_ARGS__))
690
691#define cgs_gpu_mem_info(dev,type,mc_start,mc_size,mem_size) \
692 CGS_CALL(gpu_mem_info,dev,type,mc_start,mc_size,mem_size)
693#define cgs_gmap_kmem(dev,kmem,size,min_off,max_off,kmem_handle,mcaddr) \
694 CGS_CALL(gmap_kmem,dev,kmem,size,min_off,max_off,kmem_handle,mcaddr)
695#define cgs_gunmap_kmem(dev,kmem_handle) \
696 CGS_CALL(gunmap_kmem,dev,keme_handle)
697#define cgs_alloc_gpu_mem(dev,type,size,align,min_off,max_off,handle) \
698 CGS_CALL(alloc_gpu_mem,dev,type,size,align,min_off,max_off,handle)
699#define cgs_free_gpu_mem(dev,handle) \
700 CGS_CALL(free_gpu_mem,dev,handle)
701#define cgs_gmap_gpu_mem(dev,handle,mcaddr) \
702 CGS_CALL(gmap_gpu_mem,dev,handle,mcaddr)
703#define cgs_gunmap_gpu_mem(dev,handle) \
704 CGS_CALL(gunmap_gpu_mem,dev,handle)
705#define cgs_kmap_gpu_mem(dev,handle,map) \
706 CGS_CALL(kmap_gpu_mem,dev,handle,map)
707#define cgs_kunmap_gpu_mem(dev,handle) \
708 CGS_CALL(kunmap_gpu_mem,dev,handle)
709
710#define cgs_read_register(dev,offset) \
711 CGS_CALL(read_register,dev,offset)
712#define cgs_write_register(dev,offset,value) \
713 CGS_CALL(write_register,dev,offset,value)
714#define cgs_read_ind_register(dev,space,index) \
715 CGS_CALL(read_ind_register,dev,space,index)
716#define cgs_write_ind_register(dev,space,index,value) \
717 CGS_CALL(write_ind_register,dev,space,index,value)
718
719#define cgs_read_pci_config_byte(dev,addr) \
720 CGS_CALL(read_pci_config_byte,dev,addr)
721#define cgs_read_pci_config_word(dev,addr) \
722 CGS_CALL(read_pci_config_word,dev,addr)
723#define cgs_read_pci_config_dword(dev,addr) \
724 CGS_CALL(read_pci_config_dword,dev,addr)
725#define cgs_write_pci_config_byte(dev,addr,value) \
726 CGS_CALL(write_pci_config_byte,dev,addr,value)
727#define cgs_write_pci_config_word(dev,addr,value) \
728 CGS_CALL(write_pci_config_word,dev,addr,value)
729#define cgs_write_pci_config_dword(dev,addr,value) \
730 CGS_CALL(write_pci_config_dword,dev,addr,value)
731
732#define cgs_atom_get_data_table(dev,table,size,frev,crev) \
733 CGS_CALL(atom_get_data_table,dev,table,size,frev,crev)
734#define cgs_atom_get_cmd_table_revs(dev,table,frev,crev) \
735 CGS_CALL(atom_get_cmd_table_revs,dev,table,frev,crev)
736#define cgs_atom_exec_cmd_table(dev,table,args) \
737 CGS_CALL(atom_exec_cmd_table,dev,table,args)
738
739#define cgs_create_pm_request(dev,request) \
740 CGS_CALL(create_pm_request,dev,request)
741#define cgs_destroy_pm_request(dev,request) \
742 CGS_CALL(destroy_pm_request,dev,request)
743#define cgs_set_pm_request(dev,request,active) \
744 CGS_CALL(set_pm_request,dev,request,active)
745#define cgs_pm_request_clock(dev,request,clock,freq) \
746 CGS_CALL(pm_request_clock,dev,request,clock,freq)
747#define cgs_pm_request_engine(dev,request,engine,powered) \
748 CGS_CALL(pm_request_engine,dev,request,engine,powered)
749#define cgs_pm_query_clock_limits(dev,clock,limits) \
750 CGS_CALL(pm_query_clock_limits,dev,clock,limits)
751#define cgs_set_camera_voltages(dev,mask,voltages) \
752 CGS_CALL(set_camera_voltages,dev,mask,voltages)
753#define cgs_get_firmware_info(dev, type, info) \
754 CGS_CALL(get_firmware_info, dev, type, info)
755#define cgs_rel_firmware(dev, type) \
756 CGS_CALL(rel_firmware, dev, type)
757#define cgs_set_powergating_state(dev, block_type, state) \
758 CGS_CALL(set_powergating_state, dev, block_type, state)
759#define cgs_set_clockgating_state(dev, block_type, state) \
760 CGS_CALL(set_clockgating_state, dev, block_type, state)
761#define cgs_notify_dpm_enabled(dev, enabled) \
762 CGS_CALL(notify_dpm_enabled, dev, enabled)
763
764#define cgs_get_active_displays_info(dev, info) \
765 CGS_CALL(get_active_displays_info, dev, info)
766
767#define cgs_call_acpi_method(dev, acpi_method, acpi_function, pintput, poutput, output_count, input_size, output_size) \
768 CGS_CALL(call_acpi_method, dev, acpi_method, acpi_function, pintput, poutput, output_count, input_size, output_size)
769#define cgs_query_system_info(dev, sys_info) \
770 CGS_CALL(query_system_info, dev, sys_info)
771#define cgs_get_pci_resource(cgs_device, resource_type, size, offset, \
772 resource_base) \
773 CGS_CALL(get_pci_resource, cgs_device, resource_type, size, offset, \
774 resource_base)
775
776#endif
777