linux/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.h
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   1/*
   2 * Copyright 2015 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 */
  23#ifndef _TONGA_SMC_H
  24#define _TONGA_SMC_H
  25
  26#include "smumgr.h"
  27#include "smu72.h"
  28
  29
  30#define ASICID_IS_TONGA_P(wDID, bRID)    \
  31        (((wDID == 0x6930) && ((bRID == 0xF0) || (bRID == 0xF1) || (bRID == 0xFF))) \
  32        || ((wDID == 0x6920) && ((bRID == 0) || (bRID == 1))))
  33
  34
  35struct tonga_pt_defaults {
  36        uint8_t   svi_load_line_en;
  37        uint8_t   svi_load_line_vddC;
  38        uint8_t   tdc_vddc_throttle_release_limit_perc;
  39        uint8_t   tdc_mawt;
  40        uint8_t   tdc_waterfall_ctl;
  41        uint8_t   dte_ambient_temp_base;
  42        uint32_t  display_cac;
  43        uint32_t  bamp_temp_gradient;
  44        uint16_t  bapmti_r[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
  45        uint16_t  bapmti_rc[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
  46};
  47
  48int tonga_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
  49int tonga_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
  50int tonga_init_smc_table(struct pp_hwmgr *hwmgr);
  51int tonga_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
  52int tonga_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
  53int tonga_update_sclk_threshold(struct pp_hwmgr *hwmgr);
  54uint32_t tonga_get_offsetof(uint32_t type, uint32_t member);
  55uint32_t tonga_get_mac_definition(uint32_t value);
  56int tonga_process_firmware_header(struct pp_hwmgr *hwmgr);
  57int tonga_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
  58bool tonga_is_dpm_running(struct pp_hwmgr *hwmgr);
  59#endif
  60
  61