1#ifndef _PIO_H 2#define _PIO_H 3/* 4 * Copyright(c) 2015, 2016 Intel Corporation. 5 * 6 * This file is provided under a dual BSD/GPLv2 license. When using or 7 * redistributing this file, you may do so under either license. 8 * 9 * GPL LICENSE SUMMARY 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * BSD LICENSE 21 * 22 * Redistribution and use in source and binary forms, with or without 23 * modification, are permitted provided that the following conditions 24 * are met: 25 * 26 * - Redistributions of source code must retain the above copyright 27 * notice, this list of conditions and the following disclaimer. 28 * - Redistributions in binary form must reproduce the above copyright 29 * notice, this list of conditions and the following disclaimer in 30 * the documentation and/or other materials provided with the 31 * distribution. 32 * - Neither the name of Intel Corporation nor the names of its 33 * contributors may be used to endorse or promote products derived 34 * from this software without specific prior written permission. 35 * 36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 37 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 39 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 40 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 41 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 42 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 43 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 44 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 45 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 46 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 47 * 48 */ 49 50/* send context types */ 51#define SC_KERNEL 0 52#define SC_VL15 1 53#define SC_ACK 2 54#define SC_USER 3 /* must be the last one: it may take all left */ 55#define SC_MAX 4 /* count of send context types */ 56 57/* invalid send context index */ 58#define INVALID_SCI 0xff 59 60/* PIO buffer release callback function */ 61typedef void (*pio_release_cb)(void *arg, int code); 62 63/* PIO release codes - in bits, as there could more than one that apply */ 64#define PRC_OK 0 /* no known error */ 65#define PRC_STATUS_ERR 0x01 /* credit return due to status error */ 66#define PRC_PBC 0x02 /* credit return due to PBC */ 67#define PRC_THRESHOLD 0x04 /* credit return due to threshold */ 68#define PRC_FILL_ERR 0x08 /* credit return due fill error */ 69#define PRC_FORCE 0x10 /* credit return due credit force */ 70#define PRC_SC_DISABLE 0x20 /* clean-up after a context disable */ 71 72/* byte helper */ 73union mix { 74 u64 val64; 75 u32 val32[2]; 76 u8 val8[8]; 77}; 78 79/* an allocated PIO buffer */ 80struct pio_buf { 81 struct send_context *sc;/* back pointer to owning send context */ 82 pio_release_cb cb; /* called when the buffer is released */ 83 void *arg; /* argument for cb */ 84 void __iomem *start; /* buffer start address */ 85 void __iomem *end; /* context end address */ 86 unsigned long size; /* context size, in bytes */ 87 unsigned long sent_at; /* buffer is sent when <= free */ 88 u32 block_count; /* size of buffer, in blocks */ 89 u32 qw_written; /* QW written so far */ 90 u32 carry_bytes; /* number of valid bytes in carry */ 91 union mix carry; /* pending unwritten bytes */ 92}; 93 94/* cache line aligned pio buffer array */ 95union pio_shadow_ring { 96 struct pio_buf pbuf; 97 u64 unused[16]; /* cache line spacer */ 98} ____cacheline_aligned; 99 100/* per-NUMA send context */ 101struct send_context { 102 /* read-only after init */ 103 struct hfi1_devdata *dd; /* device */ 104 void __iomem *base_addr; /* start of PIO memory */ 105 union pio_shadow_ring *sr; /* shadow ring */ 106 107 volatile __le64 *hw_free; /* HW free counter */ 108 struct work_struct halt_work; /* halted context work queue entry */ 109 unsigned long flags; /* flags */ 110 int node; /* context home node */ 111 int type; /* context type */ 112 u32 sw_index; /* software index number */ 113 u32 hw_context; /* hardware context number */ 114 u32 credits; /* number of blocks in context */ 115 u32 sr_size; /* size of the shadow ring */ 116 u32 group; /* credit return group */ 117 /* allocator fields */ 118 spinlock_t alloc_lock ____cacheline_aligned_in_smp; 119 unsigned long fill; /* official alloc count */ 120 unsigned long alloc_free; /* copy of free (less cache thrash) */ 121 u32 sr_head; /* shadow ring head */ 122 /* releaser fields */ 123 spinlock_t release_lock ____cacheline_aligned_in_smp; 124 unsigned long free; /* official free count */ 125 u32 sr_tail; /* shadow ring tail */ 126 /* list for PIO waiters */ 127 struct list_head piowait ____cacheline_aligned_in_smp; 128 spinlock_t credit_ctrl_lock ____cacheline_aligned_in_smp; 129 u64 credit_ctrl; /* cache for credit control */ 130 u32 credit_intr_count; /* count of credit intr users */ 131 u32 __percpu *buffers_allocated;/* count of buffers allocated */ 132 wait_queue_head_t halt_wait; /* wait until kernel sees interrupt */ 133}; 134 135/* send context flags */ 136#define SCF_ENABLED 0x01 137#define SCF_IN_FREE 0x02 138#define SCF_HALTED 0x04 139#define SCF_FROZEN 0x08 140 141struct send_context_info { 142 struct send_context *sc; /* allocated working context */ 143 u16 allocated; /* has this been allocated? */ 144 u16 type; /* context type */ 145 u16 base; /* base in PIO array */ 146 u16 credits; /* size in PIO array */ 147}; 148 149/* DMA credit return, index is always (context & 0x7) */ 150struct credit_return { 151 volatile __le64 cr[8]; 152}; 153 154/* NUMA indexed credit return array */ 155struct credit_return_base { 156 struct credit_return *va; 157 dma_addr_t dma; 158}; 159 160/* send context configuration sizes (one per type) */ 161struct sc_config_sizes { 162 short int size; 163 short int count; 164}; 165 166/* 167 * The diagram below details the relationship of the mapping structures 168 * 169 * Since the mapping now allows for non-uniform send contexts per vl, the 170 * number of send contexts for a vl is either the vl_scontexts[vl] or 171 * a computation based on num_kernel_send_contexts/num_vls: 172 * 173 * For example: 174 * nactual = vl_scontexts ? vl_scontexts[vl] : num_kernel_send_contexts/num_vls 175 * 176 * n = roundup to next highest power of 2 using nactual 177 * 178 * In the case where there are num_kernel_send_contexts/num_vls doesn't divide 179 * evenly, the extras are added from the last vl downward. 180 * 181 * For the case where n > nactual, the send contexts are assigned 182 * in a round robin fashion wrapping back to the first send context 183 * for a particular vl. 184 * 185 * dd->pio_map 186 * | pio_map_elem[0] 187 * | +--------------------+ 188 * v | mask | 189 * pio_vl_map |--------------------| 190 * +--------------------------+ | ksc[0] -> sc 1 | 191 * | list (RCU) | |--------------------| 192 * |--------------------------| ->| ksc[1] -> sc 2 | 193 * | mask | --/ |--------------------| 194 * |--------------------------| -/ | * | 195 * | actual_vls (max 8) | -/ |--------------------| 196 * |--------------------------| --/ | ksc[n] -> sc n | 197 * | vls (max 8) | -/ +--------------------+ 198 * |--------------------------| --/ 199 * | map[0] |-/ 200 * |--------------------------| +--------------------+ 201 * | map[1] |--- | mask | 202 * |--------------------------| \---- |--------------------| 203 * | * | \-- | ksc[0] -> sc 1+n | 204 * | * | \---- |--------------------| 205 * | * | \->| ksc[1] -> sc 2+n | 206 * |--------------------------| |--------------------| 207 * | map[vls - 1] |- | * | 208 * +--------------------------+ \- |--------------------| 209 * \- | ksc[m] -> sc m+n | 210 * \ +--------------------+ 211 * \- 212 * \ 213 * \- +--------------------+ 214 * \- | mask | 215 * \ |--------------------| 216 * \- | ksc[0] -> sc 1+m+n | 217 * \- |--------------------| 218 * >| ksc[1] -> sc 2+m+n | 219 * |--------------------| 220 * | * | 221 * |--------------------| 222 * | ksc[o] -> sc o+m+n | 223 * +--------------------+ 224 * 225 */ 226 227/* Initial number of send contexts per VL */ 228#define INIT_SC_PER_VL 2 229 230/* 231 * struct pio_map_elem - mapping for a vl 232 * @mask - selector mask 233 * @ksc - array of kernel send contexts for this vl 234 * 235 * The mask is used to "mod" the selector to 236 * produce index into the trailing array of 237 * kscs 238 */ 239struct pio_map_elem { 240 u32 mask; 241 struct send_context *ksc[0]; 242}; 243 244/* 245 * struct pio_vl_map - mapping for a vl 246 * @list - rcu head for free callback 247 * @mask - vl mask to "mod" the vl to produce an index to map array 248 * @actual_vls - number of vls 249 * @vls - numbers of vls rounded to next power of 2 250 * @map - array of pio_map_elem entries 251 * 252 * This is the parent mapping structure. The trailing members of the 253 * struct point to pio_map_elem entries, which in turn point to an 254 * array of kscs for that vl. 255 */ 256struct pio_vl_map { 257 struct rcu_head list; 258 u32 mask; 259 u8 actual_vls; 260 u8 vls; 261 struct pio_map_elem *map[0]; 262}; 263 264int pio_map_init(struct hfi1_devdata *dd, u8 port, u8 num_vls, 265 u8 *vl_scontexts); 266void free_pio_map(struct hfi1_devdata *dd); 267struct send_context *pio_select_send_context_vl(struct hfi1_devdata *dd, 268 u32 selector, u8 vl); 269struct send_context *pio_select_send_context_sc(struct hfi1_devdata *dd, 270 u32 selector, u8 sc5); 271 272/* send context functions */ 273int init_credit_return(struct hfi1_devdata *dd); 274void free_credit_return(struct hfi1_devdata *dd); 275int init_sc_pools_and_sizes(struct hfi1_devdata *dd); 276int init_send_contexts(struct hfi1_devdata *dd); 277int init_credit_return(struct hfi1_devdata *dd); 278int init_pervl_scs(struct hfi1_devdata *dd); 279struct send_context *sc_alloc(struct hfi1_devdata *dd, int type, 280 uint hdrqentsize, int numa); 281void sc_free(struct send_context *sc); 282int sc_enable(struct send_context *sc); 283void sc_disable(struct send_context *sc); 284int sc_restart(struct send_context *sc); 285void sc_return_credits(struct send_context *sc); 286void sc_flush(struct send_context *sc); 287void sc_drop(struct send_context *sc); 288void sc_stop(struct send_context *sc, int bit); 289struct pio_buf *sc_buffer_alloc(struct send_context *sc, u32 dw_len, 290 pio_release_cb cb, void *arg); 291void sc_release_update(struct send_context *sc); 292void sc_return_credits(struct send_context *sc); 293void sc_group_release_update(struct hfi1_devdata *dd, u32 hw_context); 294void sc_add_credit_return_intr(struct send_context *sc); 295void sc_del_credit_return_intr(struct send_context *sc); 296void sc_set_cr_threshold(struct send_context *sc, u32 new_threshold); 297u32 sc_percent_to_threshold(struct send_context *sc, u32 percent); 298u32 sc_mtu_to_threshold(struct send_context *sc, u32 mtu, u32 hdrqentsize); 299void hfi1_sc_wantpiobuf_intr(struct send_context *sc, u32 needint); 300void sc_wait(struct hfi1_devdata *dd); 301void set_pio_integrity(struct send_context *sc); 302 303/* support functions */ 304void pio_reset_all(struct hfi1_devdata *dd); 305void pio_freeze(struct hfi1_devdata *dd); 306void pio_kernel_unfreeze(struct hfi1_devdata *dd); 307 308/* global PIO send control operations */ 309#define PSC_GLOBAL_ENABLE 0 310#define PSC_GLOBAL_DISABLE 1 311#define PSC_GLOBAL_VLARB_ENABLE 2 312#define PSC_GLOBAL_VLARB_DISABLE 3 313#define PSC_CM_RESET 4 314#define PSC_DATA_VL_ENABLE 5 315#define PSC_DATA_VL_DISABLE 6 316 317void __cm_reset(struct hfi1_devdata *dd, u64 sendctrl); 318void pio_send_control(struct hfi1_devdata *dd, int op); 319 320/* PIO copy routines */ 321void pio_copy(struct hfi1_devdata *dd, struct pio_buf *pbuf, u64 pbc, 322 const void *from, size_t count); 323void seg_pio_copy_start(struct pio_buf *pbuf, u64 pbc, 324 const void *from, size_t nbytes); 325void seg_pio_copy_mid(struct pio_buf *pbuf, const void *from, size_t nbytes); 326void seg_pio_copy_end(struct pio_buf *pbuf); 327 328#endif /* _PIO_H */ 329