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25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/sched.h>
28#include <linux/string.h>
29#include <linux/timer.h>
30#include <linux/delay.h>
31#include <linux/errno.h>
32#include <linux/slab.h>
33#include <linux/videodev2.h>
34#include <linux/i2c.h>
35#include <linux/init.h>
36#include <linux/kthread.h>
37#include <linux/freezer.h>
38
39#include <media/i2c/tvaudio.h>
40#include <media/v4l2-device.h>
41#include <media/v4l2-ctrls.h>
42
43#include <media/i2c-addr.h>
44
45
46
47
48static int debug;
49module_param(debug, int, 0644);
50
51MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
52MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
53MODULE_LICENSE("GPL");
54
55#define UNSET (-1U)
56
57
58
59
60#define MAXREGS 256
61
62struct CHIPSTATE;
63typedef int (*getvalue)(int);
64typedef int (*checkit)(struct CHIPSTATE*);
65typedef int (*initialize)(struct CHIPSTATE*);
66typedef int (*getrxsubchans)(struct CHIPSTATE *);
67typedef void (*setaudmode)(struct CHIPSTATE*, int mode);
68
69
70typedef struct AUDIOCMD {
71 int count;
72 unsigned char bytes[MAXREGS+1];
73} audiocmd;
74
75
76struct CHIPDESC {
77 char *name;
78 int addr_lo, addr_hi;
79 int registers;
80
81 int *insmodopt;
82 checkit checkit;
83 initialize initialize;
84 int flags;
85#define CHIP_HAS_VOLUME 1
86#define CHIP_HAS_BASSTREBLE 2
87#define CHIP_HAS_INPUTSEL 4
88#define CHIP_NEED_CHECKMODE 8
89
90
91 audiocmd init;
92
93
94 int leftreg, rightreg, treblereg, bassreg;
95
96
97 int volinit, trebleinit, bassinit;
98
99
100 getvalue volfunc, treblefunc, bassfunc;
101
102
103 getrxsubchans getrxsubchans;
104 setaudmode setaudmode;
105
106
107 int inputreg;
108 int inputmap[4];
109 int inputmute;
110 int inputmask;
111};
112
113
114struct CHIPSTATE {
115 struct v4l2_subdev sd;
116 struct v4l2_ctrl_handler hdl;
117 struct {
118
119 struct v4l2_ctrl *volume;
120 struct v4l2_ctrl *balance;
121 };
122
123
124
125 struct CHIPDESC *desc;
126
127
128 audiocmd shadow;
129
130
131 u16 muted;
132 int prevmode;
133 int radio;
134 int input;
135
136
137 struct task_struct *thread;
138 struct timer_list wt;
139 int audmode;
140};
141
142static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
143{
144 return container_of(sd, struct CHIPSTATE, sd);
145}
146
147static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
148{
149 return &container_of(ctrl->handler, struct CHIPSTATE, hdl)->sd;
150}
151
152
153
154
155
156static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
157{
158 struct v4l2_subdev *sd = &chip->sd;
159 struct i2c_client *c = v4l2_get_subdevdata(sd);
160 unsigned char buffer[2];
161
162 if (subaddr < 0) {
163 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
164 chip->shadow.bytes[1] = val;
165 buffer[0] = val;
166 if (1 != i2c_master_send(c, buffer, 1)) {
167 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
168 return -1;
169 }
170 } else {
171 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
172 v4l2_info(sd,
173 "Tried to access a non-existent register: %d\n",
174 subaddr);
175 return -EINVAL;
176 }
177
178 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
179 subaddr, val);
180 chip->shadow.bytes[subaddr+1] = val;
181 buffer[0] = subaddr;
182 buffer[1] = val;
183 if (2 != i2c_master_send(c, buffer, 2)) {
184 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
185 subaddr, val);
186 return -1;
187 }
188 }
189 return 0;
190}
191
192static int chip_write_masked(struct CHIPSTATE *chip,
193 int subaddr, int val, int mask)
194{
195 struct v4l2_subdev *sd = &chip->sd;
196
197 if (mask != 0) {
198 if (subaddr < 0) {
199 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
200 } else {
201 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
202 v4l2_info(sd,
203 "Tried to access a non-existent register: %d\n",
204 subaddr);
205 return -EINVAL;
206 }
207
208 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
209 }
210 }
211 return chip_write(chip, subaddr, val);
212}
213
214static int chip_read(struct CHIPSTATE *chip)
215{
216 struct v4l2_subdev *sd = &chip->sd;
217 struct i2c_client *c = v4l2_get_subdevdata(sd);
218 unsigned char buffer;
219
220 if (1 != i2c_master_recv(c, &buffer, 1)) {
221 v4l2_warn(sd, "I/O error (read)\n");
222 return -1;
223 }
224 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
225 return buffer;
226}
227
228static int chip_read2(struct CHIPSTATE *chip, int subaddr)
229{
230 struct v4l2_subdev *sd = &chip->sd;
231 struct i2c_client *c = v4l2_get_subdevdata(sd);
232 unsigned char write[1];
233 unsigned char read[1];
234 struct i2c_msg msgs[2] = {
235 {
236 .addr = c->addr,
237 .len = 1,
238 .buf = write
239 },
240 {
241 .addr = c->addr,
242 .flags = I2C_M_RD,
243 .len = 1,
244 .buf = read
245 }
246 };
247
248 write[0] = subaddr;
249
250 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
251 v4l2_warn(sd, "I/O error (read2)\n");
252 return -1;
253 }
254 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
255 subaddr, read[0]);
256 return read[0];
257}
258
259static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
260{
261 struct v4l2_subdev *sd = &chip->sd;
262 struct i2c_client *c = v4l2_get_subdevdata(sd);
263 int i;
264
265 if (0 == cmd->count)
266 return 0;
267
268 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
269 v4l2_info(sd,
270 "Tried to access a non-existent register range: %d to %d\n",
271 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
272 return -EINVAL;
273 }
274
275
276
277
278 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
279 name, cmd->bytes[0]);
280 for (i = 1; i < cmd->count; i++) {
281 if (debug)
282 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
283 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
284 }
285 if (debug)
286 printk(KERN_CONT "\n");
287
288
289 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
290 v4l2_warn(sd, "I/O error (%s)\n", name);
291 return -1;
292 }
293 return 0;
294}
295
296
297
298
299
300
301
302
303static void chip_thread_wake(unsigned long data)
304{
305 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
306 wake_up_process(chip->thread);
307}
308
309static int chip_thread(void *data)
310{
311 struct CHIPSTATE *chip = data;
312 struct CHIPDESC *desc = chip->desc;
313 struct v4l2_subdev *sd = &chip->sd;
314 int mode, selected;
315
316 v4l2_dbg(1, debug, sd, "thread started\n");
317 set_freezable();
318 for (;;) {
319 set_current_state(TASK_INTERRUPTIBLE);
320 if (!kthread_should_stop())
321 schedule();
322 set_current_state(TASK_RUNNING);
323 try_to_freeze();
324 if (kthread_should_stop())
325 break;
326 v4l2_dbg(1, debug, sd, "thread wakeup\n");
327
328
329 if (chip->radio)
330 continue;
331
332
333 mode = desc->getrxsubchans(chip);
334 if (mode == chip->prevmode)
335 continue;
336
337
338 v4l2_dbg(1, debug, sd, "thread checkmode\n");
339
340 chip->prevmode = mode;
341
342 selected = V4L2_TUNER_MODE_MONO;
343 switch (chip->audmode) {
344 case V4L2_TUNER_MODE_MONO:
345 if (mode & V4L2_TUNER_SUB_LANG1)
346 selected = V4L2_TUNER_MODE_LANG1;
347 break;
348 case V4L2_TUNER_MODE_STEREO:
349 case V4L2_TUNER_MODE_LANG1:
350 if (mode & V4L2_TUNER_SUB_LANG1)
351 selected = V4L2_TUNER_MODE_LANG1;
352 else if (mode & V4L2_TUNER_SUB_STEREO)
353 selected = V4L2_TUNER_MODE_STEREO;
354 break;
355 case V4L2_TUNER_MODE_LANG2:
356 if (mode & V4L2_TUNER_SUB_LANG2)
357 selected = V4L2_TUNER_MODE_LANG2;
358 else if (mode & V4L2_TUNER_SUB_STEREO)
359 selected = V4L2_TUNER_MODE_STEREO;
360 break;
361 case V4L2_TUNER_MODE_LANG1_LANG2:
362 if (mode & V4L2_TUNER_SUB_LANG2)
363 selected = V4L2_TUNER_MODE_LANG1_LANG2;
364 else if (mode & V4L2_TUNER_SUB_STEREO)
365 selected = V4L2_TUNER_MODE_STEREO;
366 }
367 desc->setaudmode(chip, selected);
368
369
370 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
371 }
372
373 v4l2_dbg(1, debug, sd, "thread exiting\n");
374 return 0;
375}
376
377
378
379
380#define TDA9840_SW 0x00
381#define TDA9840_LVADJ 0x02
382#define TDA9840_STADJ 0x03
383#define TDA9840_TEST 0x04
384
385#define TDA9840_MONO 0x10
386#define TDA9840_STEREO 0x2a
387#define TDA9840_DUALA 0x12
388#define TDA9840_DUALB 0x1e
389#define TDA9840_DUALAB 0x1a
390#define TDA9840_DUALBA 0x16
391#define TDA9840_EXTERNAL 0x7a
392
393#define TDA9840_DS_DUAL 0x20
394#define TDA9840_ST_STEREO 0x40
395#define TDA9840_PONRES 0x80
396
397#define TDA9840_TEST_INT1SN 0x1
398#define TDA9840_TEST_INTFU 0x02
399
400static int tda9840_getrxsubchans(struct CHIPSTATE *chip)
401{
402 struct v4l2_subdev *sd = &chip->sd;
403 int val, mode;
404
405 val = chip_read(chip);
406 mode = V4L2_TUNER_SUB_MONO;
407 if (val & TDA9840_DS_DUAL)
408 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
409 if (val & TDA9840_ST_STEREO)
410 mode = V4L2_TUNER_SUB_STEREO;
411
412 v4l2_dbg(1, debug, sd,
413 "tda9840_getrxsubchans(): raw chip read: %d, return: %d\n",
414 val, mode);
415 return mode;
416}
417
418static void tda9840_setaudmode(struct CHIPSTATE *chip, int mode)
419{
420 int update = 1;
421 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
422
423 switch (mode) {
424 case V4L2_TUNER_MODE_MONO:
425 t |= TDA9840_MONO;
426 break;
427 case V4L2_TUNER_MODE_STEREO:
428 t |= TDA9840_STEREO;
429 break;
430 case V4L2_TUNER_MODE_LANG1:
431 t |= TDA9840_DUALA;
432 break;
433 case V4L2_TUNER_MODE_LANG2:
434 t |= TDA9840_DUALB;
435 break;
436 case V4L2_TUNER_MODE_LANG1_LANG2:
437 t |= TDA9840_DUALAB;
438 break;
439 default:
440 update = 0;
441 }
442
443 if (update)
444 chip_write(chip, TDA9840_SW, t);
445}
446
447static int tda9840_checkit(struct CHIPSTATE *chip)
448{
449 int rc;
450 rc = chip_read(chip);
451
452 return ((rc & 0x1f) == 0) ? 1 : 0;
453}
454
455
456
457
458
459#define TDA9855_VR 0x00
460#define TDA9855_VL 0x01
461#define TDA9855_BA 0x02
462#define TDA9855_TR 0x03
463#define TDA9855_SW 0x04
464
465
466#define TDA9850_C4 0x04
467
468
469#define TDA985x_C5 0x05
470#define TDA985x_C6 0x06
471#define TDA985x_C7 0x07
472#define TDA985x_A1 0x08
473#define TDA985x_A2 0x09
474#define TDA985x_A3 0x0a
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505#define TDA9855_MUTE 1<<7
506#define TDA9855_AVL 1<<6
507#define TDA9855_LOUD 1<<5
508#define TDA9855_SUR 1<<3
509
510
511
512#define TDA9855_EXT 1<<2
513#define TDA9855_INT 0
514
515
516
517
518
519
520
521
522#define TDA985x_SAP 3<<6
523#define TDA985x_MONOSAP 2<<6
524#define TDA985x_STEREO 1<<6
525#define TDA985x_MONO 0
526#define TDA985x_LMU 1<<3
527
528
529#define TDA9855_TZCM 1<<5
530#define TDA9855_VZCM 1<<4
531#define TDA9855_LINEAR 0
532#define TDA9855_PSEUDO 1
533#define TDA9855_SPAT_30 2
534#define TDA9855_SPAT_50 3
535#define TDA9855_E_MONO 7
536
537
538
539
540
541
542
543
544
545
546#define TDA985x_STP 1<<5
547#define TDA985x_SAPP 1<<6
548#define TDA985x_STS 1<<7
549
550
551
552
553
554#define TDA985x_ADJ 1<<7
555
556static int tda9855_volume(int val) { return val/0x2e8+0x27; }
557static int tda9855_bass(int val) { return val/0xccc+0x06; }
558static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
559
560static int tda985x_getrxsubchans(struct CHIPSTATE *chip)
561{
562 int mode, val;
563
564
565
566 mode = V4L2_TUNER_SUB_MONO;
567 val = chip_read(chip);
568 if (val & TDA985x_STP)
569 mode = V4L2_TUNER_SUB_STEREO;
570 if (val & TDA985x_SAPP)
571 mode |= V4L2_TUNER_SUB_SAP;
572 return mode;
573}
574
575static void tda985x_setaudmode(struct CHIPSTATE *chip, int mode)
576{
577 int update = 1;
578 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
579
580 switch (mode) {
581 case V4L2_TUNER_MODE_MONO:
582 c6 |= TDA985x_MONO;
583 break;
584 case V4L2_TUNER_MODE_STEREO:
585 case V4L2_TUNER_MODE_LANG1:
586 c6 |= TDA985x_STEREO;
587 break;
588 case V4L2_TUNER_MODE_SAP:
589 c6 |= TDA985x_SAP;
590 break;
591 case V4L2_TUNER_MODE_LANG1_LANG2:
592 c6 |= TDA985x_MONOSAP;
593 break;
594 default:
595 update = 0;
596 }
597 if (update)
598 chip_write(chip,TDA985x_C6,c6);
599}
600
601
602
603
604
605
606
607#define TDA9873_SW 0x00
608#define TDA9873_AD 0x01
609#define TDA9873_PT 0x02
610
611
612
613
614
615
616
617
618
619#define TDA9873_INP_MASK 3
620#define TDA9873_INTERNAL 0
621#define TDA9873_EXT_STEREO 2
622#define TDA9873_EXT_MONO 1
623
624
625
626
627
628
629
630
631
632
633
634
635#define TDA9873_TR_MASK (7 << 2)
636#define TDA9873_TR_MONO 4
637#define TDA9873_TR_STEREO 1 << 4
638#define TDA9873_TR_REVERSE ((1 << 3) | (1 << 2))
639#define TDA9873_TR_DUALA 1 << 2
640#define TDA9873_TR_DUALB 1 << 3
641#define TDA9873_TR_DUALAB 0
642
643
644
645
646
647
648
649#define TDA9873_GAIN_NORMAL 1 << 5
650#define TDA9873_MUTE 1 << 6
651#define TDA9873_AUTOMUTE 1 << 7
652
653
654
655
656
657
658
659#define TDA9873_STEREO_ADJ 0x06
660
661
662
663
664
665
666
667
668
669
670#define TDA9873_BG 0
671#define TDA9873_M 1
672#define TDA9873_DK1 2
673#define TDA9873_DK2 3
674#define TDA9873_DK3 4
675#define TDA9873_I 5
676
677
678
679#define TDA9873_IDR_NORM 0
680#define TDA9873_IDR_FAST 1 << 7
681
682
683
684
685
686
687
688
689
690
691
692#define TDA9873_PORTS 3
693
694
695#define TDA9873_TST_PORT 1 << 2
696
697
698
699
700
701
702
703
704#define TDA9873_MOUT_MONO 0
705#define TDA9873_MOUT_FMONO 0
706#define TDA9873_MOUT_DUALA 0
707#define TDA9873_MOUT_DUALB 1 << 3
708#define TDA9873_MOUT_ST 1 << 4
709#define TDA9873_MOUT_EXTM ((1 << 4) | (1 << 3))
710#define TDA9873_MOUT_EXTL 1 << 5
711#define TDA9873_MOUT_EXTR ((1 << 5) | (1 << 3))
712#define TDA9873_MOUT_EXTLR ((1 << 5) | (1 << 4))
713#define TDA9873_MOUT_MUTE ((1 << 5) | (1 << 4) | (1 << 3))
714
715
716#define TDA9873_PONR 0
717#define TDA9873_STEREO 2
718#define TDA9873_DUAL 4
719
720static int tda9873_getrxsubchans(struct CHIPSTATE *chip)
721{
722 struct v4l2_subdev *sd = &chip->sd;
723 int val,mode;
724
725 val = chip_read(chip);
726 mode = V4L2_TUNER_SUB_MONO;
727 if (val & TDA9873_STEREO)
728 mode = V4L2_TUNER_SUB_STEREO;
729 if (val & TDA9873_DUAL)
730 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
731 v4l2_dbg(1, debug, sd,
732 "tda9873_getrxsubchans(): raw chip read: %d, return: %d\n",
733 val, mode);
734 return mode;
735}
736
737static void tda9873_setaudmode(struct CHIPSTATE *chip, int mode)
738{
739 struct v4l2_subdev *sd = &chip->sd;
740 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
741
742
743 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
744 v4l2_dbg(1, debug, sd,
745 "tda9873_setaudmode(): external input\n");
746 return;
747 }
748
749 v4l2_dbg(1, debug, sd,
750 "tda9873_setaudmode(): chip->shadow.bytes[%d] = %d\n",
751 TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
752 v4l2_dbg(1, debug, sd, "tda9873_setaudmode(): sw_data = %d\n",
753 sw_data);
754
755 switch (mode) {
756 case V4L2_TUNER_MODE_MONO:
757 sw_data |= TDA9873_TR_MONO;
758 break;
759 case V4L2_TUNER_MODE_STEREO:
760 sw_data |= TDA9873_TR_STEREO;
761 break;
762 case V4L2_TUNER_MODE_LANG1:
763 sw_data |= TDA9873_TR_DUALA;
764 break;
765 case V4L2_TUNER_MODE_LANG2:
766 sw_data |= TDA9873_TR_DUALB;
767 break;
768 case V4L2_TUNER_MODE_LANG1_LANG2:
769 sw_data |= TDA9873_TR_DUALAB;
770 break;
771 default:
772 return;
773 }
774
775 chip_write(chip, TDA9873_SW, sw_data);
776 v4l2_dbg(1, debug, sd,
777 "tda9873_setaudmode(): req. mode %d; chip_write: %d\n",
778 mode, sw_data);
779}
780
781static int tda9873_checkit(struct CHIPSTATE *chip)
782{
783 int rc;
784
785 if (-1 == (rc = chip_read2(chip,254)))
786 return 0;
787 return (rc & ~0x1f) == 0x80;
788}
789
790
791
792
793
794
795
796#define TDA9874A_AGCGR 0x00
797#define TDA9874A_GCONR 0x01
798#define TDA9874A_MSR 0x02
799#define TDA9874A_C1FRA 0x03
800#define TDA9874A_C1FRB 0x04
801#define TDA9874A_C1FRC 0x05
802#define TDA9874A_C2FRA 0x06
803#define TDA9874A_C2FRB 0x07
804#define TDA9874A_C2FRC 0x08
805#define TDA9874A_DCR 0x09
806#define TDA9874A_FMER 0x0a
807#define TDA9874A_FMMR 0x0b
808#define TDA9874A_C1OLAR 0x0c
809#define TDA9874A_C2OLAR 0x0d
810#define TDA9874A_NCONR 0x0e
811#define TDA9874A_NOLAR 0x0f
812#define TDA9874A_NLELR 0x10
813#define TDA9874A_NUELR 0x11
814#define TDA9874A_AMCONR 0x12
815#define TDA9874A_SDACOSR 0x13
816#define TDA9874A_AOSR 0x14
817#define TDA9874A_DAICONR 0x15
818#define TDA9874A_I2SOSR 0x16
819#define TDA9874A_I2SOLAR 0x17
820#define TDA9874A_MDACOSR 0x18
821#define TDA9874A_ESP 0xFF
822
823
824#define TDA9874A_DSR 0x00
825#define TDA9874A_NSR 0x01
826#define TDA9874A_NECR 0x02
827#define TDA9874A_DR1 0x03
828#define TDA9874A_DR2 0x04
829#define TDA9874A_LLRA 0x05
830#define TDA9874A_LLRB 0x06
831#define TDA9874A_SIFLR 0x07
832#define TDA9874A_TR2 252
833#define TDA9874A_TR1 253
834#define TDA9874A_DIC 254
835#define TDA9874A_SIC 255
836
837
838static int tda9874a_mode = 1;
839static int tda9874a_GCONR = 0xc0;
840static int tda9874a_NCONR = 0x01;
841static int tda9874a_ESP = 0x07;
842static int tda9874a_dic = -1;
843
844
845static unsigned int tda9874a_SIF = UNSET;
846static unsigned int tda9874a_AMSEL = UNSET;
847static unsigned int tda9874a_STD = UNSET;
848module_param(tda9874a_SIF, int, 0444);
849module_param(tda9874a_AMSEL, int, 0444);
850module_param(tda9874a_STD, int, 0444);
851
852
853
854
855
856
857
858
859
860static struct tda9874a_MODES {
861 char *name;
862 audiocmd cmd;
863} tda9874a_modelist[9] = {
864 { "A2, B/G",
865 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
866 { "A2, M (Korea)",
867 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
868 { "A2, D/K (1)",
869 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
870 { "A2, D/K (2)",
871 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
872 { "A2, D/K (3)",
873 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
874 { "NICAM, I",
875 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
876 { "NICAM, B/G",
877 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
878 { "NICAM, D/K",
879 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
880 { "NICAM, L",
881 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
882};
883
884static int tda9874a_setup(struct CHIPSTATE *chip)
885{
886 struct v4l2_subdev *sd = &chip->sd;
887
888 chip_write(chip, TDA9874A_AGCGR, 0x00);
889 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
890 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
891 if(tda9874a_dic == 0x11) {
892 chip_write(chip, TDA9874A_FMMR, 0x80);
893 } else {
894 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
895 chip_write(chip, TDA9874A_FMMR, 0x00);
896 }
897 chip_write(chip, TDA9874A_C1OLAR, 0x00);
898 chip_write(chip, TDA9874A_C2OLAR, 0x00);
899 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
900 chip_write(chip, TDA9874A_NOLAR, 0x00);
901
902
903
904 chip_write(chip, TDA9874A_NLELR, 0x14);
905 chip_write(chip, TDA9874A_NUELR, 0x50);
906
907 if(tda9874a_dic == 0x11) {
908 chip_write(chip, TDA9874A_AMCONR, 0xf9);
909 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
910 chip_write(chip, TDA9874A_AOSR, 0x80);
911 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
912 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
913 } else {
914 chip_write(chip, TDA9874A_AMCONR, 0xfb);
915 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
916 chip_write(chip, TDA9874A_AOSR, 0x00);
917 }
918 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
919 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
920 return 1;
921}
922
923static int tda9874a_getrxsubchans(struct CHIPSTATE *chip)
924{
925 struct v4l2_subdev *sd = &chip->sd;
926 int dsr,nsr,mode;
927 int necr;
928
929 mode = V4L2_TUNER_SUB_MONO;
930
931 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
932 return mode;
933 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
934 return mode;
935 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
936 return mode;
937
938
939 chip->shadow.bytes[MAXREGS-2] = dsr;
940 chip->shadow.bytes[MAXREGS-1] = nsr;
941
942 if(tda9874a_mode) {
943
944
945
946
947
948
949
950
951 if(nsr & 0x02)
952 mode = V4L2_TUNER_SUB_STEREO;
953 if(nsr & 0x01)
954 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
955 } else {
956 if(dsr & 0x02)
957 mode = V4L2_TUNER_SUB_STEREO;
958 if(dsr & 0x04)
959 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
960 }
961
962 v4l2_dbg(1, debug, sd,
963 "tda9874a_getrxsubchans(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
964 dsr, nsr, necr, mode);
965 return mode;
966}
967
968static void tda9874a_setaudmode(struct CHIPSTATE *chip, int mode)
969{
970 struct v4l2_subdev *sd = &chip->sd;
971
972
973
974 if (tda9874a_mode) {
975 if(chip->shadow.bytes[MAXREGS-2] & 0x20)
976 tda9874a_NCONR &= 0xfe;
977 else
978 tda9874a_NCONR |= 0x01;
979 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
980 }
981
982
983
984
985
986
987
988 if(tda9874a_dic == 0x11) {
989 int aosr = 0x80;
990 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
991
992 switch(mode) {
993 case V4L2_TUNER_MODE_MONO:
994 case V4L2_TUNER_MODE_STEREO:
995 break;
996 case V4L2_TUNER_MODE_LANG1:
997 aosr = 0x80;
998 mdacosr = (tda9874a_mode) ? 0x82:0x80;
999 break;
1000 case V4L2_TUNER_MODE_LANG2:
1001 aosr = 0xa0;
1002 mdacosr = (tda9874a_mode) ? 0x83:0x81;
1003 break;
1004 case V4L2_TUNER_MODE_LANG1_LANG2:
1005 aosr = 0x00;
1006 mdacosr = (tda9874a_mode) ? 0x82:0x80;
1007 break;
1008 default:
1009 return;
1010 }
1011 chip_write(chip, TDA9874A_AOSR, aosr);
1012 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
1013
1014 v4l2_dbg(1, debug, sd,
1015 "tda9874a_setaudmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1016 mode, aosr, mdacosr);
1017
1018 } else {
1019 int fmmr,aosr;
1020
1021 switch(mode) {
1022 case V4L2_TUNER_MODE_MONO:
1023 fmmr = 0x00;
1024 aosr = 0x10;
1025 break;
1026 case V4L2_TUNER_MODE_STEREO:
1027 if(tda9874a_mode) {
1028 fmmr = 0x00;
1029 aosr = 0x00;
1030 } else {
1031 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04;
1032 aosr = 0x00;
1033 }
1034 break;
1035 case V4L2_TUNER_MODE_LANG1:
1036 fmmr = 0x02;
1037 aosr = 0x10;
1038 break;
1039 case V4L2_TUNER_MODE_LANG2:
1040 fmmr = 0x02;
1041 aosr = 0x20;
1042 break;
1043 case V4L2_TUNER_MODE_LANG1_LANG2:
1044 fmmr = 0x02;
1045 aosr = 0x00;
1046 break;
1047 default:
1048 return;
1049 }
1050 chip_write(chip, TDA9874A_FMMR, fmmr);
1051 chip_write(chip, TDA9874A_AOSR, aosr);
1052
1053 v4l2_dbg(1, debug, sd,
1054 "tda9874a_setaudmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1055 mode, fmmr, aosr);
1056 }
1057}
1058
1059static int tda9874a_checkit(struct CHIPSTATE *chip)
1060{
1061 struct v4l2_subdev *sd = &chip->sd;
1062 int dic,sic;
1063
1064 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
1065 return 0;
1066 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
1067 return 0;
1068
1069 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1070
1071 if((dic == 0x11)||(dic == 0x07)) {
1072 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1073 tda9874a_dic = dic;
1074 return 1;
1075 }
1076 return 0;
1077}
1078
1079static int tda9874a_initialize(struct CHIPSTATE *chip)
1080{
1081 if (tda9874a_SIF > 2)
1082 tda9874a_SIF = 1;
1083 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1084 tda9874a_STD = 0;
1085 if(tda9874a_AMSEL > 1)
1086 tda9874a_AMSEL = 0;
1087
1088 if(tda9874a_SIF == 1)
1089 tda9874a_GCONR = 0xc0;
1090 else
1091 tda9874a_GCONR = 0xc1;
1092
1093 tda9874a_ESP = tda9874a_STD;
1094 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1095
1096 if(tda9874a_AMSEL == 0)
1097 tda9874a_NCONR = 0x01;
1098 else
1099 tda9874a_NCONR = 0x05;
1100
1101 tda9874a_setup(chip);
1102 return 0;
1103}
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114#define TDA9875_MUT 0x12
1115#define TDA9875_CFG 0x01
1116#define TDA9875_DACOS 0x13
1117#define TDA9875_LOSR 0x16
1118
1119#define TDA9875_CH1V 0x0c
1120#define TDA9875_CH2V 0x0d
1121#define TDA9875_SC1 0x14
1122#define TDA9875_SC2 0x15
1123
1124#define TDA9875_ADCIS 0x17
1125#define TDA9875_AER 0x19
1126#define TDA9875_MCS 0x18
1127#define TDA9875_MVL 0x1a
1128#define TDA9875_MVR 0x1b
1129#define TDA9875_MBA 0x1d
1130#define TDA9875_MTR 0x1e
1131#define TDA9875_ACS 0x1f
1132#define TDA9875_AVL 0x20
1133#define TDA9875_AVR 0x21
1134#define TDA9875_ABA 0x22
1135#define TDA9875_ATR 0x23
1136
1137#define TDA9875_MSR 0x02
1138#define TDA9875_C1MSB 0x03
1139#define TDA9875_C1MIB 0x04
1140#define TDA9875_C1LSB 0x05
1141#define TDA9875_C2MSB 0x06
1142#define TDA9875_C2MIB 0x07
1143#define TDA9875_C2LSB 0x08
1144#define TDA9875_DCR 0x09
1145#define TDA9875_DEEM 0x0a
1146#define TDA9875_FMAT 0x0b
1147
1148
1149#define TDA9875_MUTE_ON 0xff
1150#define TDA9875_MUTE_OFF 0xcc
1151
1152static int tda9875_initialize(struct CHIPSTATE *chip)
1153{
1154 chip_write(chip, TDA9875_CFG, 0xd0);
1155 chip_write(chip, TDA9875_MSR, 0x03);
1156 chip_write(chip, TDA9875_C1MSB, 0x00);
1157 chip_write(chip, TDA9875_C1MIB, 0x00);
1158 chip_write(chip, TDA9875_C1LSB, 0x00);
1159 chip_write(chip, TDA9875_C2MSB, 0x00);
1160 chip_write(chip, TDA9875_C2MIB, 0x00);
1161 chip_write(chip, TDA9875_C2LSB, 0x00);
1162 chip_write(chip, TDA9875_DCR, 0x00);
1163 chip_write(chip, TDA9875_DEEM, 0x44);
1164 chip_write(chip, TDA9875_FMAT, 0x00);
1165 chip_write(chip, TDA9875_SC1, 0x00);
1166 chip_write(chip, TDA9875_SC2, 0x01);
1167
1168 chip_write(chip, TDA9875_CH1V, 0x10);
1169 chip_write(chip, TDA9875_CH2V, 0x10);
1170 chip_write(chip, TDA9875_DACOS, 0x02);
1171 chip_write(chip, TDA9875_ADCIS, 0x6f);
1172 chip_write(chip, TDA9875_LOSR, 0x00);
1173 chip_write(chip, TDA9875_AER, 0x00);
1174 chip_write(chip, TDA9875_MCS, 0x44);
1175 chip_write(chip, TDA9875_MVL, 0x03);
1176 chip_write(chip, TDA9875_MVR, 0x03);
1177 chip_write(chip, TDA9875_MBA, 0x00);
1178 chip_write(chip, TDA9875_MTR, 0x00);
1179 chip_write(chip, TDA9875_ACS, 0x44);
1180 chip_write(chip, TDA9875_AVL, 0x00);
1181 chip_write(chip, TDA9875_AVR, 0x00);
1182 chip_write(chip, TDA9875_ABA, 0x00);
1183 chip_write(chip, TDA9875_ATR, 0x00);
1184
1185 chip_write(chip, TDA9875_MUT, 0xcc);
1186 return 0;
1187}
1188
1189static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1190static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1191static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1192
1193
1194
1195
1196
1197
1198
1199
1200static int tda9875_checkit(struct CHIPSTATE *chip)
1201{
1202 struct v4l2_subdev *sd = &chip->sd;
1203 int dic, rev;
1204
1205 dic = chip_read2(chip, 254);
1206 rev = chip_read2(chip, 255);
1207
1208 if (dic == 0 || dic == 2) {
1209 v4l2_info(sd, "found tda9875%s rev. %d.\n",
1210 dic == 0 ? "" : "A", rev);
1211 return 1;
1212 }
1213 return 0;
1214}
1215
1216
1217
1218
1219#define TEA6300_VL 0x00
1220#define TEA6300_VR 0x01
1221#define TEA6300_BA 0x02
1222#define TEA6300_TR 0x03
1223#define TEA6300_FA 0x04
1224#define TEA6300_S 0x05
1225
1226#define TEA6300_S_SA 0x01
1227#define TEA6300_S_SB 0x02
1228#define TEA6300_S_SC 0x04
1229#define TEA6300_S_GMU 0x80
1230
1231#define TEA6320_V 0x00
1232#define TEA6320_FFR 0x01
1233#define TEA6320_FFL 0x02
1234#define TEA6320_FRR 0x03
1235#define TEA6320_FRL 0x04
1236#define TEA6320_BA 0x05
1237#define TEA6320_TR 0x06
1238#define TEA6320_S 0x07
1239
1240#define TEA6320_S_SA 0x07
1241#define TEA6320_S_SB 0x06
1242#define TEA6320_S_SC 0x05
1243#define TEA6320_S_SD 0x04
1244#define TEA6320_S_GMU 0x80
1245
1246#define TEA6420_S_SA 0x00
1247#define TEA6420_S_SB 0x01
1248#define TEA6420_S_SC 0x02
1249#define TEA6420_S_SD 0x03
1250#define TEA6420_S_SE 0x04
1251#define TEA6420_S_GMU 0x05
1252
1253static int tea6300_shift10(int val) { return val >> 10; }
1254static int tea6300_shift12(int val) { return val >> 12; }
1255
1256
1257
1258static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1259static int tea6320_shift11(int val) { return val >> 11; }
1260static int tea6320_initialize(struct CHIPSTATE * chip)
1261{
1262 chip_write(chip, TEA6320_FFR, 0x3f);
1263 chip_write(chip, TEA6320_FFL, 0x3f);
1264 chip_write(chip, TEA6320_FRR, 0x3f);
1265 chip_write(chip, TEA6320_FRL, 0x3f);
1266
1267 return 0;
1268}
1269
1270
1271
1272
1273
1274#define TDA8425_VL 0x00
1275#define TDA8425_VR 0x01
1276#define TDA8425_BA 0x02
1277#define TDA8425_TR 0x03
1278#define TDA8425_S1 0x08
1279
1280#define TDA8425_S1_OFF 0xEE
1281#define TDA8425_S1_CH1 0xCE
1282#define TDA8425_S1_CH2 0xCF
1283#define TDA8425_S1_MU 0x20
1284#define TDA8425_S1_STEREO 0x18
1285#define TDA8425_S1_STEREO_SPATIAL 0x18
1286#define TDA8425_S1_STEREO_LINEAR 0x08
1287#define TDA8425_S1_STEREO_PSEUDO 0x10
1288#define TDA8425_S1_STEREO_MONO 0x00
1289#define TDA8425_S1_ML 0x06
1290#define TDA8425_S1_ML_SOUND_A 0x02
1291#define TDA8425_S1_ML_SOUND_B 0x04
1292#define TDA8425_S1_ML_STEREO 0x06
1293#define TDA8425_S1_IS 0x01
1294
1295
1296static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1297static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1298
1299static void tda8425_setaudmode(struct CHIPSTATE *chip, int mode)
1300{
1301 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1302
1303 switch (mode) {
1304 case V4L2_TUNER_MODE_LANG1:
1305 s1 |= TDA8425_S1_ML_SOUND_A;
1306 s1 |= TDA8425_S1_STEREO_PSEUDO;
1307 break;
1308 case V4L2_TUNER_MODE_LANG2:
1309 s1 |= TDA8425_S1_ML_SOUND_B;
1310 s1 |= TDA8425_S1_STEREO_PSEUDO;
1311 break;
1312 case V4L2_TUNER_MODE_LANG1_LANG2:
1313 s1 |= TDA8425_S1_ML_STEREO;
1314 s1 |= TDA8425_S1_STEREO_LINEAR;
1315 break;
1316 case V4L2_TUNER_MODE_MONO:
1317 s1 |= TDA8425_S1_ML_STEREO;
1318 s1 |= TDA8425_S1_STEREO_MONO;
1319 break;
1320 case V4L2_TUNER_MODE_STEREO:
1321 s1 |= TDA8425_S1_ML_STEREO;
1322 s1 |= TDA8425_S1_STEREO_SPATIAL;
1323 break;
1324 default:
1325 return;
1326 }
1327 chip_write(chip,TDA8425_S1,s1);
1328}
1329
1330
1331
1332
1333
1334
1335#define PIC16C54_REG_KEY_CODE 0x01
1336#define PIC16C54_REG_MISC 0x02
1337
1338
1339#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01
1340
1341#define PIC16C54_MISC_MTS_MAIN 0x02
1342#define PIC16C54_MISC_MTS_SAP 0x04
1343#define PIC16C54_MISC_MTS_BOTH 0x08
1344#define PIC16C54_MISC_SND_MUTE 0x10
1345#define PIC16C54_MISC_SND_NOTMUTE 0x20
1346#define PIC16C54_MISC_SWITCH_TUNER 0x40
1347#define PIC16C54_MISC_SWITCH_LINE 0x80
1348
1349
1350
1351
1352
1353#define TA8874Z_LED_STE 0x80
1354#define TA8874Z_LED_BIL 0x40
1355#define TA8874Z_LED_EXT 0x20
1356#define TA8874Z_MONO_SET 0x10
1357#define TA8874Z_MUTE 0x08
1358#define TA8874Z_F_MONO 0x04
1359#define TA8874Z_MODE_SUB 0x02
1360#define TA8874Z_MODE_MAIN 0x01
1361
1362
1363
1364#define TA8874Z_SEPARATION 0x3f
1365#define TA8874Z_SEPARATION_DEFAULT 0x10
1366
1367
1368#define TA8874Z_B1 0x80
1369#define TA8874Z_B0 0x40
1370#define TA8874Z_CHAG_FLAG 0x20
1371
1372
1373
1374
1375
1376
1377
1378static int ta8874z_getrxsubchans(struct CHIPSTATE *chip)
1379{
1380 int val, mode;
1381
1382 val = chip_read(chip);
1383 mode = V4L2_TUNER_SUB_MONO;
1384 if (val & TA8874Z_B1){
1385 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1386 }else if (!(val & TA8874Z_B0)){
1387 mode = V4L2_TUNER_SUB_STEREO;
1388 }
1389
1390
1391
1392 return mode;
1393}
1394
1395static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1396static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1397static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1398static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1399static audiocmd ta8874z_both = {2, { TA8874Z_MODE_MAIN | TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1400
1401static void ta8874z_setaudmode(struct CHIPSTATE *chip, int mode)
1402{
1403 struct v4l2_subdev *sd = &chip->sd;
1404 int update = 1;
1405 audiocmd *t = NULL;
1406
1407 v4l2_dbg(1, debug, sd, "ta8874z_setaudmode(): mode: 0x%02x\n", mode);
1408
1409 switch(mode){
1410 case V4L2_TUNER_MODE_MONO:
1411 t = &ta8874z_mono;
1412 break;
1413 case V4L2_TUNER_MODE_STEREO:
1414 t = &ta8874z_stereo;
1415 break;
1416 case V4L2_TUNER_MODE_LANG1:
1417 t = &ta8874z_main;
1418 break;
1419 case V4L2_TUNER_MODE_LANG2:
1420 t = &ta8874z_sub;
1421 break;
1422 case V4L2_TUNER_MODE_LANG1_LANG2:
1423 t = &ta8874z_both;
1424 break;
1425 default:
1426 update = 0;
1427 }
1428
1429 if(update)
1430 chip_cmd(chip, "TA8874Z", t);
1431}
1432
1433static int ta8874z_checkit(struct CHIPSTATE *chip)
1434{
1435 int rc;
1436 rc = chip_read(chip);
1437 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1438}
1439
1440
1441
1442
1443
1444static int tda8425 = 1;
1445static int tda9840 = 1;
1446static int tda9850 = 1;
1447static int tda9855 = 1;
1448static int tda9873 = 1;
1449static int tda9874a = 1;
1450static int tda9875 = 1;
1451static int tea6300;
1452static int tea6320;
1453static int tea6420 = 1;
1454static int pic16c54 = 1;
1455static int ta8874z;
1456
1457module_param(tda8425, int, 0444);
1458module_param(tda9840, int, 0444);
1459module_param(tda9850, int, 0444);
1460module_param(tda9855, int, 0444);
1461module_param(tda9873, int, 0444);
1462module_param(tda9874a, int, 0444);
1463module_param(tda9875, int, 0444);
1464module_param(tea6300, int, 0444);
1465module_param(tea6320, int, 0444);
1466module_param(tea6420, int, 0444);
1467module_param(pic16c54, int, 0444);
1468module_param(ta8874z, int, 0444);
1469
1470static struct CHIPDESC chiplist[] = {
1471 {
1472 .name = "tda9840",
1473 .insmodopt = &tda9840,
1474 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1475 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1476 .registers = 5,
1477 .flags = CHIP_NEED_CHECKMODE,
1478
1479
1480 .checkit = tda9840_checkit,
1481 .getrxsubchans = tda9840_getrxsubchans,
1482 .setaudmode = tda9840_setaudmode,
1483
1484 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1485 } }
1486 },
1487 {
1488 .name = "tda9873h",
1489 .insmodopt = &tda9873,
1490 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1491 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1492 .registers = 3,
1493 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1494
1495
1496 .checkit = tda9873_checkit,
1497 .getrxsubchans = tda9873_getrxsubchans,
1498 .setaudmode = tda9873_setaudmode,
1499
1500 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1501 .inputreg = TDA9873_SW,
1502 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1503 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1504 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1505
1506 },
1507 {
1508 .name = "tda9874h/a",
1509 .insmodopt = &tda9874a,
1510 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1511 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1512 .flags = CHIP_NEED_CHECKMODE,
1513
1514
1515 .initialize = tda9874a_initialize,
1516 .checkit = tda9874a_checkit,
1517 .getrxsubchans = tda9874a_getrxsubchans,
1518 .setaudmode = tda9874a_setaudmode,
1519 },
1520 {
1521 .name = "tda9875",
1522 .insmodopt = &tda9875,
1523 .addr_lo = I2C_ADDR_TDA9875 >> 1,
1524 .addr_hi = I2C_ADDR_TDA9875 >> 1,
1525 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1526
1527
1528 .initialize = tda9875_initialize,
1529 .checkit = tda9875_checkit,
1530 .volfunc = tda9875_volume,
1531 .bassfunc = tda9875_bass,
1532 .treblefunc = tda9875_treble,
1533 .leftreg = TDA9875_MVL,
1534 .rightreg = TDA9875_MVR,
1535 .bassreg = TDA9875_MBA,
1536 .treblereg = TDA9875_MTR,
1537 .volinit = 58880,
1538 },
1539 {
1540 .name = "tda9850",
1541 .insmodopt = &tda9850,
1542 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1543 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1544 .registers = 11,
1545
1546 .getrxsubchans = tda985x_getrxsubchans,
1547 .setaudmode = tda985x_setaudmode,
1548
1549 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1550 },
1551 {
1552 .name = "tda9855",
1553 .insmodopt = &tda9855,
1554 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1555 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1556 .registers = 11,
1557 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1558
1559 .leftreg = TDA9855_VL,
1560 .rightreg = TDA9855_VR,
1561 .bassreg = TDA9855_BA,
1562 .treblereg = TDA9855_TR,
1563
1564
1565 .volfunc = tda9855_volume,
1566 .bassfunc = tda9855_bass,
1567 .treblefunc = tda9855_treble,
1568 .getrxsubchans = tda985x_getrxsubchans,
1569 .setaudmode = tda985x_setaudmode,
1570
1571 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1572 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1573 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1574 0x07, 0x10, 0x10, 0x03 }}
1575 },
1576 {
1577 .name = "tea6300",
1578 .insmodopt = &tea6300,
1579 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1580 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1581 .registers = 6,
1582 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1583
1584 .leftreg = TEA6300_VR,
1585 .rightreg = TEA6300_VL,
1586 .bassreg = TEA6300_BA,
1587 .treblereg = TEA6300_TR,
1588
1589
1590 .volfunc = tea6300_shift10,
1591 .bassfunc = tea6300_shift12,
1592 .treblefunc = tea6300_shift12,
1593
1594 .inputreg = TEA6300_S,
1595 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1596 .inputmute = TEA6300_S_GMU,
1597 },
1598 {
1599 .name = "tea6320",
1600 .insmodopt = &tea6320,
1601 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1602 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1603 .registers = 8,
1604 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1605
1606 .leftreg = TEA6320_V,
1607 .rightreg = TEA6320_V,
1608 .bassreg = TEA6320_BA,
1609 .treblereg = TEA6320_TR,
1610
1611
1612 .initialize = tea6320_initialize,
1613 .volfunc = tea6320_volume,
1614 .bassfunc = tea6320_shift11,
1615 .treblefunc = tea6320_shift11,
1616
1617 .inputreg = TEA6320_S,
1618 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1619 .inputmute = TEA6300_S_GMU,
1620 },
1621 {
1622 .name = "tea6420",
1623 .insmodopt = &tea6420,
1624 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1625 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1626 .registers = 1,
1627 .flags = CHIP_HAS_INPUTSEL,
1628
1629 .inputreg = -1,
1630 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1631 .inputmute = TEA6420_S_GMU,
1632 .inputmask = 0x07,
1633 },
1634 {
1635 .name = "tda8425",
1636 .insmodopt = &tda8425,
1637 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1638 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1639 .registers = 9,
1640 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1641
1642 .leftreg = TDA8425_VL,
1643 .rightreg = TDA8425_VR,
1644 .bassreg = TDA8425_BA,
1645 .treblereg = TDA8425_TR,
1646
1647
1648 .volfunc = tda8425_shift10,
1649 .bassfunc = tda8425_shift12,
1650 .treblefunc = tda8425_shift12,
1651 .setaudmode = tda8425_setaudmode,
1652
1653 .inputreg = TDA8425_S1,
1654 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1655 .inputmute = TDA8425_S1_OFF,
1656
1657 },
1658 {
1659 .name = "pic16c54 (PV951)",
1660 .insmodopt = &pic16c54,
1661 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1662 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1663 .registers = 2,
1664 .flags = CHIP_HAS_INPUTSEL,
1665
1666 .inputreg = PIC16C54_REG_MISC,
1667 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1668 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1669 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1670 PIC16C54_MISC_SND_MUTE},
1671 .inputmute = PIC16C54_MISC_SND_MUTE,
1672 },
1673 {
1674 .name = "ta8874z",
1675 .checkit = ta8874z_checkit,
1676 .insmodopt = &ta8874z,
1677 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1678 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1679 .registers = 2,
1680
1681
1682 .getrxsubchans = ta8874z_getrxsubchans,
1683 .setaudmode = ta8874z_setaudmode,
1684
1685 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1686 },
1687 { .name = NULL }
1688};
1689
1690
1691
1692
1693static int tvaudio_s_ctrl(struct v4l2_ctrl *ctrl)
1694{
1695 struct v4l2_subdev *sd = to_sd(ctrl);
1696 struct CHIPSTATE *chip = to_state(sd);
1697 struct CHIPDESC *desc = chip->desc;
1698
1699 switch (ctrl->id) {
1700 case V4L2_CID_AUDIO_MUTE:
1701 chip->muted = ctrl->val;
1702 if (chip->muted)
1703 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1704 else
1705 chip_write_masked(chip,desc->inputreg,
1706 desc->inputmap[chip->input],desc->inputmask);
1707 return 0;
1708 case V4L2_CID_AUDIO_VOLUME: {
1709 u32 volume, balance;
1710 u32 left, right;
1711
1712 volume = chip->volume->val;
1713 balance = chip->balance->val;
1714 left = (min(65536U - balance, 32768U) * volume) / 32768U;
1715 right = (min(balance, 32768U) * volume) / 32768U;
1716
1717 chip_write(chip, desc->leftreg, desc->volfunc(left));
1718 chip_write(chip, desc->rightreg, desc->volfunc(right));
1719 return 0;
1720 }
1721 case V4L2_CID_AUDIO_BASS:
1722 chip_write(chip, desc->bassreg, desc->bassfunc(ctrl->val));
1723 return 0;
1724 case V4L2_CID_AUDIO_TREBLE:
1725 chip_write(chip, desc->treblereg, desc->treblefunc(ctrl->val));
1726 return 0;
1727 }
1728 return -EINVAL;
1729}
1730
1731
1732
1733
1734
1735static int tvaudio_s_radio(struct v4l2_subdev *sd)
1736{
1737 struct CHIPSTATE *chip = to_state(sd);
1738
1739 chip->radio = 1;
1740
1741 return 0;
1742}
1743
1744static int tvaudio_s_routing(struct v4l2_subdev *sd,
1745 u32 input, u32 output, u32 config)
1746{
1747 struct CHIPSTATE *chip = to_state(sd);
1748 struct CHIPDESC *desc = chip->desc;
1749
1750 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1751 return 0;
1752 if (input >= 4)
1753 return -EINVAL;
1754
1755 chip->input = input;
1756 if (chip->muted)
1757 return 0;
1758 chip_write_masked(chip, desc->inputreg,
1759 desc->inputmap[chip->input], desc->inputmask);
1760 return 0;
1761}
1762
1763static int tvaudio_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *vt)
1764{
1765 struct CHIPSTATE *chip = to_state(sd);
1766 struct CHIPDESC *desc = chip->desc;
1767
1768 if (!desc->setaudmode)
1769 return 0;
1770 if (chip->radio)
1771 return 0;
1772
1773 switch (vt->audmode) {
1774 case V4L2_TUNER_MODE_MONO:
1775 case V4L2_TUNER_MODE_STEREO:
1776 case V4L2_TUNER_MODE_LANG1:
1777 case V4L2_TUNER_MODE_LANG2:
1778 case V4L2_TUNER_MODE_LANG1_LANG2:
1779 break;
1780 default:
1781 return -EINVAL;
1782 }
1783 chip->audmode = vt->audmode;
1784
1785 if (chip->thread)
1786 wake_up_process(chip->thread);
1787 else
1788 desc->setaudmode(chip, vt->audmode);
1789
1790 return 0;
1791}
1792
1793static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1794{
1795 struct CHIPSTATE *chip = to_state(sd);
1796 struct CHIPDESC *desc = chip->desc;
1797
1798 if (!desc->getrxsubchans)
1799 return 0;
1800 if (chip->radio)
1801 return 0;
1802
1803 vt->audmode = chip->audmode;
1804 vt->rxsubchans = desc->getrxsubchans(chip);
1805 vt->capability |= V4L2_TUNER_CAP_STEREO |
1806 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1807
1808 return 0;
1809}
1810
1811static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1812{
1813 struct CHIPSTATE *chip = to_state(sd);
1814
1815 chip->radio = 0;
1816 return 0;
1817}
1818
1819static int tvaudio_s_frequency(struct v4l2_subdev *sd, const struct v4l2_frequency *freq)
1820{
1821 struct CHIPSTATE *chip = to_state(sd);
1822 struct CHIPDESC *desc = chip->desc;
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832 if (chip->thread) {
1833 desc->setaudmode(chip, V4L2_TUNER_MODE_MONO);
1834 chip->prevmode = -1;
1835 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1836 }
1837 return 0;
1838}
1839
1840static int tvaudio_log_status(struct v4l2_subdev *sd)
1841{
1842 struct CHIPSTATE *chip = to_state(sd);
1843 struct CHIPDESC *desc = chip->desc;
1844
1845 v4l2_info(sd, "Chip: %s\n", desc->name);
1846 v4l2_ctrl_handler_log_status(&chip->hdl, sd->name);
1847 return 0;
1848}
1849
1850
1851
1852static const struct v4l2_ctrl_ops tvaudio_ctrl_ops = {
1853 .s_ctrl = tvaudio_s_ctrl,
1854};
1855
1856static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1857 .log_status = tvaudio_log_status,
1858};
1859
1860static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1861 .s_radio = tvaudio_s_radio,
1862 .s_frequency = tvaudio_s_frequency,
1863 .s_tuner = tvaudio_s_tuner,
1864 .g_tuner = tvaudio_g_tuner,
1865};
1866
1867static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1868 .s_routing = tvaudio_s_routing,
1869};
1870
1871static const struct v4l2_subdev_video_ops tvaudio_video_ops = {
1872 .s_std = tvaudio_s_std,
1873};
1874
1875static const struct v4l2_subdev_ops tvaudio_ops = {
1876 .core = &tvaudio_core_ops,
1877 .tuner = &tvaudio_tuner_ops,
1878 .audio = &tvaudio_audio_ops,
1879 .video = &tvaudio_video_ops,
1880};
1881
1882
1883
1884
1885
1886
1887static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1888{
1889 struct CHIPSTATE *chip;
1890 struct CHIPDESC *desc;
1891 struct v4l2_subdev *sd;
1892
1893 if (debug) {
1894 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1895 printk(KERN_INFO "tvaudio: known chips: ");
1896 for (desc = chiplist; desc->name != NULL; desc++)
1897 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1898 printk("\n");
1899 }
1900
1901 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
1902 if (!chip)
1903 return -ENOMEM;
1904 sd = &chip->sd;
1905 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1906
1907
1908 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1909 for (desc = chiplist; desc->name != NULL; desc++) {
1910 if (0 == *(desc->insmodopt))
1911 continue;
1912 if (client->addr < desc->addr_lo ||
1913 client->addr > desc->addr_hi)
1914 continue;
1915 if (desc->checkit && !desc->checkit(chip))
1916 continue;
1917 break;
1918 }
1919 if (desc->name == NULL) {
1920 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1921 return -EIO;
1922 }
1923 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1924 if (desc->flags) {
1925 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1926 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1927 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1928 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1929 }
1930
1931
1932 if (!id)
1933 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1934 chip->desc = desc;
1935 chip->shadow.count = desc->registers+1;
1936 chip->prevmode = -1;
1937 chip->audmode = V4L2_TUNER_MODE_LANG1;
1938
1939
1940 if (desc->initialize != NULL)
1941 desc->initialize(chip);
1942 else
1943 chip_cmd(chip, "init", &desc->init);
1944
1945 v4l2_ctrl_handler_init(&chip->hdl, 5);
1946 if (desc->flags & CHIP_HAS_INPUTSEL)
1947 v4l2_ctrl_new_std(&chip->hdl, &tvaudio_ctrl_ops,
1948 V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0);
1949 if (desc->flags & CHIP_HAS_VOLUME) {
1950 if (!desc->volfunc) {
1951
1952
1953
1954 v4l2_info(sd, "volume callback undefined!\n");
1955 desc->flags &= ~CHIP_HAS_VOLUME;
1956 } else {
1957 chip->volume = v4l2_ctrl_new_std(&chip->hdl,
1958 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_VOLUME,
1959 0, 65535, 65535 / 100,
1960 desc->volinit ? desc->volinit : 65535);
1961 chip->balance = v4l2_ctrl_new_std(&chip->hdl,
1962 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_BALANCE,
1963 0, 65535, 65535 / 100, 32768);
1964 v4l2_ctrl_cluster(2, &chip->volume);
1965 }
1966 }
1967 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1968 if (!desc->bassfunc || !desc->treblefunc) {
1969
1970
1971
1972 v4l2_info(sd, "bass/treble callbacks undefined!\n");
1973 desc->flags &= ~CHIP_HAS_BASSTREBLE;
1974 } else {
1975 v4l2_ctrl_new_std(&chip->hdl,
1976 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_BASS,
1977 0, 65535, 65535 / 100,
1978 desc->bassinit ? desc->bassinit : 32768);
1979 v4l2_ctrl_new_std(&chip->hdl,
1980 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_TREBLE,
1981 0, 65535, 65535 / 100,
1982 desc->trebleinit ? desc->trebleinit : 32768);
1983 }
1984 }
1985
1986 sd->ctrl_handler = &chip->hdl;
1987 if (chip->hdl.error) {
1988 int err = chip->hdl.error;
1989
1990 v4l2_ctrl_handler_free(&chip->hdl);
1991 return err;
1992 }
1993
1994 v4l2_ctrl_handler_setup(&chip->hdl);
1995
1996 chip->thread = NULL;
1997 init_timer(&chip->wt);
1998 if (desc->flags & CHIP_NEED_CHECKMODE) {
1999 if (!desc->getrxsubchans || !desc->setaudmode) {
2000
2001
2002
2003 v4l2_info(sd, "set/get mode callbacks undefined!\n");
2004 return 0;
2005 }
2006
2007 chip->wt.function = chip_thread_wake;
2008 chip->wt.data = (unsigned long)chip;
2009 chip->thread = kthread_run(chip_thread, chip, "%s",
2010 client->name);
2011 if (IS_ERR(chip->thread)) {
2012 v4l2_warn(sd, "failed to create kthread\n");
2013 chip->thread = NULL;
2014 }
2015 }
2016 return 0;
2017}
2018
2019static int tvaudio_remove(struct i2c_client *client)
2020{
2021 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2022 struct CHIPSTATE *chip = to_state(sd);
2023
2024 del_timer_sync(&chip->wt);
2025 if (chip->thread) {
2026
2027 kthread_stop(chip->thread);
2028 chip->thread = NULL;
2029 }
2030
2031 v4l2_device_unregister_subdev(sd);
2032 v4l2_ctrl_handler_free(&chip->hdl);
2033 return 0;
2034}
2035
2036
2037
2038
2039static const struct i2c_device_id tvaudio_id[] = {
2040 { "tvaudio", 0 },
2041 { }
2042};
2043MODULE_DEVICE_TABLE(i2c, tvaudio_id);
2044
2045static struct i2c_driver tvaudio_driver = {
2046 .driver = {
2047 .name = "tvaudio",
2048 },
2049 .probe = tvaudio_probe,
2050 .remove = tvaudio_remove,
2051 .id_table = tvaudio_id,
2052};
2053
2054module_i2c_driver(tvaudio_driver);
2055