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23#include "saa7134.h"
24#include "saa7134-reg.h"
25
26#include <linux/init.h>
27#include <linux/list.h>
28#include <linux/module.h>
29#include <linux/kernel.h>
30
31
32
33static unsigned int vbi_debug;
34module_param(vbi_debug, int, 0644);
35MODULE_PARM_DESC(vbi_debug,"enable debug messages [vbi]");
36
37static unsigned int vbibufs = 4;
38module_param(vbibufs, int, 0444);
39MODULE_PARM_DESC(vbibufs,"number of vbi buffers, range 2-32");
40
41#define vbi_dbg(fmt, arg...) do { \
42 if (vbi_debug) \
43 printk(KERN_DEBUG pr_fmt("vbi: " fmt), ## arg); \
44 } while (0)
45
46
47
48#define VBI_LINE_COUNT 17
49#define VBI_LINE_LENGTH 2048
50#define VBI_SCALE 0x200
51
52static void task_init(struct saa7134_dev *dev, struct saa7134_buf *buf,
53 int task)
54{
55 struct saa7134_tvnorm *norm = dev->tvnorm;
56
57
58 saa_writeb(SAA7134_VBI_H_START1(task), norm->h_start & 0xff);
59 saa_writeb(SAA7134_VBI_H_START2(task), norm->h_start >> 8);
60 saa_writeb(SAA7134_VBI_H_STOP1(task), norm->h_stop & 0xff);
61 saa_writeb(SAA7134_VBI_H_STOP2(task), norm->h_stop >> 8);
62 saa_writeb(SAA7134_VBI_V_START1(task), norm->vbi_v_start_0 & 0xff);
63 saa_writeb(SAA7134_VBI_V_START2(task), norm->vbi_v_start_0 >> 8);
64 saa_writeb(SAA7134_VBI_V_STOP1(task), norm->vbi_v_stop_0 & 0xff);
65 saa_writeb(SAA7134_VBI_V_STOP2(task), norm->vbi_v_stop_0 >> 8);
66
67 saa_writeb(SAA7134_VBI_H_SCALE_INC1(task), VBI_SCALE & 0xff);
68 saa_writeb(SAA7134_VBI_H_SCALE_INC2(task), VBI_SCALE >> 8);
69 saa_writeb(SAA7134_VBI_PHASE_OFFSET_LUMA(task), 0x00);
70 saa_writeb(SAA7134_VBI_PHASE_OFFSET_CHROMA(task), 0x00);
71
72 saa_writeb(SAA7134_VBI_H_LEN1(task), dev->vbi_hlen & 0xff);
73 saa_writeb(SAA7134_VBI_H_LEN2(task), dev->vbi_hlen >> 8);
74 saa_writeb(SAA7134_VBI_V_LEN1(task), dev->vbi_vlen & 0xff);
75 saa_writeb(SAA7134_VBI_V_LEN2(task), dev->vbi_vlen >> 8);
76
77 saa_andorb(SAA7134_DATA_PATH(task), 0xc0, 0x00);
78}
79
80
81
82static int buffer_activate(struct saa7134_dev *dev,
83 struct saa7134_buf *buf,
84 struct saa7134_buf *next)
85{
86 struct saa7134_dmaqueue *dmaq = buf->vb2.vb2_buf.vb2_queue->drv_priv;
87 unsigned long control, base;
88
89 vbi_dbg("buffer_activate [%p]\n", buf);
90 buf->top_seen = 0;
91
92 task_init(dev, buf, TASK_A);
93 task_init(dev, buf, TASK_B);
94 saa_writeb(SAA7134_OFMT_DATA_A, 0x06);
95 saa_writeb(SAA7134_OFMT_DATA_B, 0x06);
96
97
98 base = saa7134_buffer_base(buf);
99 control = SAA7134_RS_CONTROL_BURST_16 |
100 SAA7134_RS_CONTROL_ME |
101 (dmaq->pt.dma >> 12);
102 saa_writel(SAA7134_RS_BA1(2), base);
103 saa_writel(SAA7134_RS_BA2(2), base + dev->vbi_hlen * dev->vbi_vlen);
104 saa_writel(SAA7134_RS_PITCH(2), dev->vbi_hlen);
105 saa_writel(SAA7134_RS_CONTROL(2), control);
106 saa_writel(SAA7134_RS_BA1(3), base);
107 saa_writel(SAA7134_RS_BA2(3), base + dev->vbi_hlen * dev->vbi_vlen);
108 saa_writel(SAA7134_RS_PITCH(3), dev->vbi_hlen);
109 saa_writel(SAA7134_RS_CONTROL(3), control);
110
111
112 saa7134_set_dmabits(dev);
113 mod_timer(&dmaq->timeout, jiffies + BUFFER_TIMEOUT);
114
115 return 0;
116}
117
118static int buffer_prepare(struct vb2_buffer *vb2)
119{
120 struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
121 struct saa7134_dev *dev = dmaq->dev;
122 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
123 struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
124 struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0);
125 unsigned int size;
126
127 if (dma->sgl->offset) {
128 pr_err("The buffer is not page-aligned\n");
129 return -EINVAL;
130 }
131 size = dev->vbi_hlen * dev->vbi_vlen * 2;
132 if (vb2_plane_size(vb2, 0) < size)
133 return -EINVAL;
134
135 vb2_set_plane_payload(vb2, 0, size);
136
137 return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents,
138 saa7134_buffer_startpage(buf));
139}
140
141static int queue_setup(struct vb2_queue *q,
142 unsigned int *nbuffers, unsigned int *nplanes,
143 unsigned int sizes[], struct device *alloc_devs[])
144{
145 struct saa7134_dmaqueue *dmaq = q->drv_priv;
146 struct saa7134_dev *dev = dmaq->dev;
147 unsigned int size;
148
149 dev->vbi_vlen = dev->tvnorm->vbi_v_stop_0 - dev->tvnorm->vbi_v_start_0 + 1;
150 if (dev->vbi_vlen > VBI_LINE_COUNT)
151 dev->vbi_vlen = VBI_LINE_COUNT;
152 dev->vbi_hlen = VBI_LINE_LENGTH;
153 size = dev->vbi_hlen * dev->vbi_vlen * 2;
154
155 *nbuffers = saa7134_buffer_count(size, *nbuffers);
156 *nplanes = 1;
157 sizes[0] = size;
158 return 0;
159}
160
161static int buffer_init(struct vb2_buffer *vb2)
162{
163 struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
164 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
165 struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
166
167 dmaq->curr = NULL;
168 buf->activate = buffer_activate;
169 return 0;
170}
171
172struct vb2_ops saa7134_vbi_qops = {
173 .queue_setup = queue_setup,
174 .buf_init = buffer_init,
175 .buf_prepare = buffer_prepare,
176 .buf_queue = saa7134_vb2_buffer_queue,
177 .wait_prepare = vb2_ops_wait_prepare,
178 .wait_finish = vb2_ops_wait_finish,
179 .start_streaming = saa7134_vb2_start_streaming,
180 .stop_streaming = saa7134_vb2_stop_streaming,
181};
182
183
184
185int saa7134_vbi_init1(struct saa7134_dev *dev)
186{
187 INIT_LIST_HEAD(&dev->vbi_q.queue);
188 init_timer(&dev->vbi_q.timeout);
189 dev->vbi_q.timeout.function = saa7134_buffer_timeout;
190 dev->vbi_q.timeout.data = (unsigned long)(&dev->vbi_q);
191 dev->vbi_q.dev = dev;
192
193 if (vbibufs < 2)
194 vbibufs = 2;
195 if (vbibufs > VIDEO_MAX_FRAME)
196 vbibufs = VIDEO_MAX_FRAME;
197 return 0;
198}
199
200int saa7134_vbi_fini(struct saa7134_dev *dev)
201{
202
203 return 0;
204}
205
206void saa7134_irq_vbi_done(struct saa7134_dev *dev, unsigned long status)
207{
208 spin_lock(&dev->slock);
209 if (dev->vbi_q.curr) {
210
211 if ((status & 0x10) == 0x00) {
212 dev->vbi_q.curr->top_seen = 1;
213 goto done;
214 }
215 if (!dev->vbi_q.curr->top_seen)
216 goto done;
217
218 saa7134_buffer_finish(dev, &dev->vbi_q, VB2_BUF_STATE_DONE);
219 }
220 saa7134_buffer_next(dev, &dev->vbi_q);
221
222 done:
223 spin_unlock(&dev->slock);
224}
225
