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8
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/timer.h>
13#include <linux/delay.h>
14#include <linux/gfp.h>
15#include <linux/io.h>
16#include <linux/atomic.h>
17#include <asm/debug.h>
18#include <asm/qdio.h>
19#include <asm/ipl.h>
20
21#include "cio.h"
22#include "css.h"
23#include "device.h"
24#include "qdio.h"
25#include "qdio_debug.h"
26
27MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
28 "Jan Glauber <jang@linux.vnet.ibm.com>");
29MODULE_DESCRIPTION("QDIO base support");
30MODULE_LICENSE("GPL");
31
32static inline int do_siga_sync(unsigned long schid,
33 unsigned int out_mask, unsigned int in_mask,
34 unsigned int fc)
35{
36 register unsigned long __fc asm ("0") = fc;
37 register unsigned long __schid asm ("1") = schid;
38 register unsigned long out asm ("2") = out_mask;
39 register unsigned long in asm ("3") = in_mask;
40 int cc;
41
42 asm volatile(
43 " siga 0\n"
44 " ipm %0\n"
45 " srl %0,28\n"
46 : "=d" (cc)
47 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
48 return cc;
49}
50
51static inline int do_siga_input(unsigned long schid, unsigned int mask,
52 unsigned int fc)
53{
54 register unsigned long __fc asm ("0") = fc;
55 register unsigned long __schid asm ("1") = schid;
56 register unsigned long __mask asm ("2") = mask;
57 int cc;
58
59 asm volatile(
60 " siga 0\n"
61 " ipm %0\n"
62 " srl %0,28\n"
63 : "=d" (cc)
64 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
65 return cc;
66}
67
68
69
70
71
72
73
74
75
76
77
78static inline int do_siga_output(unsigned long schid, unsigned long mask,
79 unsigned int *bb, unsigned int fc,
80 unsigned long aob)
81{
82 register unsigned long __fc asm("0") = fc;
83 register unsigned long __schid asm("1") = schid;
84 register unsigned long __mask asm("2") = mask;
85 register unsigned long __aob asm("3") = aob;
86 int cc;
87
88 asm volatile(
89 " siga 0\n"
90 " ipm %0\n"
91 " srl %0,28\n"
92 : "=d" (cc), "+d" (__fc), "+d" (__aob)
93 : "d" (__schid), "d" (__mask)
94 : "cc");
95 *bb = __fc >> 31;
96 return cc;
97}
98
99static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
100{
101
102 if (ccq == 0 || ccq == 32)
103 return 0;
104
105 if (ccq == 97)
106 return 1;
107
108 if (ccq == 96)
109 return 2;
110
111 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
112 return -EIO;
113}
114
115
116
117
118
119
120
121
122
123
124
125
126static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
127 int start, int count, int auto_ack)
128{
129 int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
130 unsigned int ccq = 0;
131
132 qperf_inc(q, eqbs);
133
134 if (!q->is_input_q)
135 nr += q->irq_ptr->nr_input_qs;
136again:
137 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
138 auto_ack);
139 rc = qdio_check_ccq(q, ccq);
140 if (!rc)
141 return count - tmp_count;
142
143 if (rc == 1) {
144 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
145 goto again;
146 }
147
148 if (rc == 2) {
149 qperf_inc(q, eqbs_partial);
150 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
151 tmp_count);
152
153
154
155
156 if (!retried++)
157 goto again;
158 else
159 return count - tmp_count;
160 }
161
162 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
163 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
164 q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE,
165 q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
166 return 0;
167}
168
169
170
171
172
173
174
175
176
177
178
179
180static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
181 int count)
182{
183 unsigned int ccq = 0;
184 int tmp_count = count, tmp_start = start;
185 int nr = q->nr;
186 int rc;
187
188 if (!count)
189 return 0;
190 qperf_inc(q, sqbs);
191
192 if (!q->is_input_q)
193 nr += q->irq_ptr->nr_input_qs;
194again:
195 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
196 rc = qdio_check_ccq(q, ccq);
197 if (!rc) {
198 WARN_ON_ONCE(tmp_count);
199 return count - tmp_count;
200 }
201
202 if (rc == 1 || rc == 2) {
203 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
204 qperf_inc(q, sqbs_partial);
205 goto again;
206 }
207
208 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
209 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
210 q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE,
211 q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
212 return 0;
213}
214
215
216static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
217 unsigned char *state, unsigned int count,
218 int auto_ack, int merge_pending)
219{
220 unsigned char __state = 0;
221 int i;
222
223 if (is_qebsm(q))
224 return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
225
226 for (i = 0; i < count; i++) {
227 if (!__state) {
228 __state = q->slsb.val[bufnr];
229 if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
230 __state = SLSB_P_OUTPUT_EMPTY;
231 } else if (merge_pending) {
232 if ((q->slsb.val[bufnr] & __state) != __state)
233 break;
234 } else if (q->slsb.val[bufnr] != __state)
235 break;
236 bufnr = next_buf(bufnr);
237 }
238 *state = __state;
239 return i;
240}
241
242static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
243 unsigned char *state, int auto_ack)
244{
245 return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
246}
247
248
249static inline int set_buf_states(struct qdio_q *q, int bufnr,
250 unsigned char state, int count)
251{
252 int i;
253
254 if (is_qebsm(q))
255 return qdio_do_sqbs(q, state, bufnr, count);
256
257 for (i = 0; i < count; i++) {
258 xchg(&q->slsb.val[bufnr], state);
259 bufnr = next_buf(bufnr);
260 }
261 return count;
262}
263
264static inline int set_buf_state(struct qdio_q *q, int bufnr,
265 unsigned char state)
266{
267 return set_buf_states(q, bufnr, state, 1);
268}
269
270
271static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
272{
273 struct qdio_q *q;
274 int i;
275
276 for_each_input_queue(irq_ptr, q, i)
277 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
278 QDIO_MAX_BUFFERS_PER_Q);
279 for_each_output_queue(irq_ptr, q, i)
280 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
281 QDIO_MAX_BUFFERS_PER_Q);
282}
283
284static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
285 unsigned int input)
286{
287 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
288 unsigned int fc = QDIO_SIGA_SYNC;
289 int cc;
290
291 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
292 qperf_inc(q, siga_sync);
293
294 if (is_qebsm(q)) {
295 schid = q->irq_ptr->sch_token;
296 fc |= QDIO_SIGA_QEBSM_FLAG;
297 }
298
299 cc = do_siga_sync(schid, output, input, fc);
300 if (unlikely(cc))
301 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
302 return (cc) ? -EIO : 0;
303}
304
305static inline int qdio_siga_sync_q(struct qdio_q *q)
306{
307 if (q->is_input_q)
308 return qdio_siga_sync(q, 0, q->mask);
309 else
310 return qdio_siga_sync(q, q->mask, 0);
311}
312
313static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
314 unsigned long aob)
315{
316 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
317 unsigned int fc = QDIO_SIGA_WRITE;
318 u64 start_time = 0;
319 int retries = 0, cc;
320 unsigned long laob = 0;
321
322 WARN_ON_ONCE(aob && ((queue_type(q) != QDIO_IQDIO_QFMT) ||
323 !q->u.out.use_cq));
324 if (q->u.out.use_cq && aob != 0) {
325 fc = QDIO_SIGA_WRITEQ;
326 laob = aob;
327 }
328
329 if (is_qebsm(q)) {
330 schid = q->irq_ptr->sch_token;
331 fc |= QDIO_SIGA_QEBSM_FLAG;
332 }
333again:
334 cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
335
336
337 if (unlikely(*busy_bit)) {
338 retries++;
339
340 if (!start_time) {
341 start_time = get_tod_clock_fast();
342 goto again;
343 }
344 if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
345 goto again;
346 }
347 if (retries) {
348 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
349 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
350 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
351 }
352 return cc;
353}
354
355static inline int qdio_siga_input(struct qdio_q *q)
356{
357 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
358 unsigned int fc = QDIO_SIGA_READ;
359 int cc;
360
361 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
362 qperf_inc(q, siga_read);
363
364 if (is_qebsm(q)) {
365 schid = q->irq_ptr->sch_token;
366 fc |= QDIO_SIGA_QEBSM_FLAG;
367 }
368
369 cc = do_siga_input(schid, q->mask, fc);
370 if (unlikely(cc))
371 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
372 return (cc) ? -EIO : 0;
373}
374
375#define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
376#define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
377
378static inline void qdio_sync_queues(struct qdio_q *q)
379{
380
381 if (pci_out_supported(q))
382 qdio_siga_sync_all(q);
383 else
384 qdio_siga_sync_q(q);
385}
386
387int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
388 unsigned char *state)
389{
390 if (need_siga_sync(q))
391 qdio_siga_sync_q(q);
392 return get_buf_states(q, bufnr, state, 1, 0, 0);
393}
394
395static inline void qdio_stop_polling(struct qdio_q *q)
396{
397 if (!q->u.in.polling)
398 return;
399
400 q->u.in.polling = 0;
401 qperf_inc(q, stop_polling);
402
403
404 if (is_qebsm(q)) {
405 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
406 q->u.in.ack_count);
407 q->u.in.ack_count = 0;
408 } else
409 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
410}
411
412static inline void account_sbals(struct qdio_q *q, unsigned int count)
413{
414 int pos;
415
416 q->q_stats.nr_sbal_total += count;
417 if (count == QDIO_MAX_BUFFERS_MASK) {
418 q->q_stats.nr_sbals[7]++;
419 return;
420 }
421 pos = ilog2(count);
422 q->q_stats.nr_sbals[pos]++;
423}
424
425static void process_buffer_error(struct qdio_q *q, int count)
426{
427 unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
428 SLSB_P_OUTPUT_NOT_INIT;
429
430 q->qdio_error = QDIO_ERROR_SLSB_STATE;
431
432
433 if ((!q->is_input_q &&
434 (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
435 qperf_inc(q, target_full);
436 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
437 q->first_to_check);
438 goto set;
439 }
440
441 DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
442 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
443 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
444 DBF_ERROR("F14:%2x F15:%2x",
445 q->sbal[q->first_to_check]->element[14].sflags,
446 q->sbal[q->first_to_check]->element[15].sflags);
447
448set:
449
450
451
452
453 set_buf_states(q, q->first_to_check, state, count);
454}
455
456static inline void inbound_primed(struct qdio_q *q, int count)
457{
458 int new;
459
460 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
461
462
463 if (is_qebsm(q)) {
464 if (!q->u.in.polling) {
465 q->u.in.polling = 1;
466 q->u.in.ack_count = count;
467 q->u.in.ack_start = q->first_to_check;
468 return;
469 }
470
471
472 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
473 q->u.in.ack_count);
474 q->u.in.ack_count = count;
475 q->u.in.ack_start = q->first_to_check;
476 return;
477 }
478
479
480
481
482
483 new = add_buf(q->first_to_check, count - 1);
484 if (q->u.in.polling) {
485
486 set_buf_state(q, new, SLSB_P_INPUT_ACK);
487 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
488 } else {
489 q->u.in.polling = 1;
490 set_buf_state(q, new, SLSB_P_INPUT_ACK);
491 }
492
493 q->u.in.ack_start = new;
494 count--;
495 if (!count)
496 return;
497
498 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
499}
500
501static int get_inbound_buffer_frontier(struct qdio_q *q)
502{
503 int count, stop;
504 unsigned char state = 0;
505
506 q->timestamp = get_tod_clock_fast();
507
508
509
510
511
512 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
513 stop = add_buf(q->first_to_check, count);
514
515 if (q->first_to_check == stop)
516 goto out;
517
518
519
520
521
522 count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
523 if (!count)
524 goto out;
525
526 switch (state) {
527 case SLSB_P_INPUT_PRIMED:
528 inbound_primed(q, count);
529 q->first_to_check = add_buf(q->first_to_check, count);
530 if (atomic_sub_return(count, &q->nr_buf_used) == 0)
531 qperf_inc(q, inbound_queue_full);
532 if (q->irq_ptr->perf_stat_enabled)
533 account_sbals(q, count);
534 break;
535 case SLSB_P_INPUT_ERROR:
536 process_buffer_error(q, count);
537 q->first_to_check = add_buf(q->first_to_check, count);
538 atomic_sub(count, &q->nr_buf_used);
539 if (q->irq_ptr->perf_stat_enabled)
540 account_sbals_error(q, count);
541 break;
542 case SLSB_CU_INPUT_EMPTY:
543 case SLSB_P_INPUT_NOT_INIT:
544 case SLSB_P_INPUT_ACK:
545 if (q->irq_ptr->perf_stat_enabled)
546 q->q_stats.nr_sbal_nop++;
547 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
548 break;
549 default:
550 WARN_ON_ONCE(1);
551 }
552out:
553 return q->first_to_check;
554}
555
556static int qdio_inbound_q_moved(struct qdio_q *q)
557{
558 int bufnr;
559
560 bufnr = get_inbound_buffer_frontier(q);
561
562 if (bufnr != q->last_move) {
563 q->last_move = bufnr;
564 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
565 q->u.in.timestamp = get_tod_clock();
566 return 1;
567 } else
568 return 0;
569}
570
571static inline int qdio_inbound_q_done(struct qdio_q *q)
572{
573 unsigned char state = 0;
574
575 if (!atomic_read(&q->nr_buf_used))
576 return 1;
577
578 if (need_siga_sync(q))
579 qdio_siga_sync_q(q);
580 get_buf_state(q, q->first_to_check, &state, 0);
581
582 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
583
584 return 0;
585
586 if (is_thinint_irq(q->irq_ptr))
587 return 1;
588
589
590 if (MACHINE_IS_VM)
591 return 1;
592
593
594
595
596
597 if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
598 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
599 q->first_to_check);
600 return 1;
601 } else
602 return 0;
603}
604
605static inline int contains_aobs(struct qdio_q *q)
606{
607 return !q->is_input_q && q->u.out.use_cq;
608}
609
610static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
611{
612 unsigned char state = 0;
613 int j, b = start;
614
615 if (!contains_aobs(q))
616 return;
617
618 for (j = 0; j < count; ++j) {
619 get_buf_state(q, b, &state, 0);
620 if (state == SLSB_P_OUTPUT_PENDING) {
621 struct qaob *aob = q->u.out.aobs[b];
622 if (aob == NULL)
623 continue;
624
625 q->u.out.sbal_state[b].flags |=
626 QDIO_OUTBUF_STATE_FLAG_PENDING;
627 q->u.out.aobs[b] = NULL;
628 } else if (state == SLSB_P_OUTPUT_EMPTY) {
629 q->u.out.sbal_state[b].aob = NULL;
630 }
631 b = next_buf(b);
632 }
633}
634
635static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
636 int bufnr)
637{
638 unsigned long phys_aob = 0;
639
640 if (!q->use_cq)
641 goto out;
642
643 if (!q->aobs[bufnr]) {
644 struct qaob *aob = qdio_allocate_aob();
645 q->aobs[bufnr] = aob;
646 }
647 if (q->aobs[bufnr]) {
648 q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
649 q->sbal_state[bufnr].aob = q->aobs[bufnr];
650 q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
651 phys_aob = virt_to_phys(q->aobs[bufnr]);
652 WARN_ON_ONCE(phys_aob & 0xFF);
653 }
654
655out:
656 return phys_aob;
657}
658
659static void qdio_kick_handler(struct qdio_q *q)
660{
661 int start = q->first_to_kick;
662 int end = q->first_to_check;
663 int count;
664
665 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
666 return;
667
668 count = sub_buf(end, start);
669
670 if (q->is_input_q) {
671 qperf_inc(q, inbound_handler);
672 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
673 } else {
674 qperf_inc(q, outbound_handler);
675 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
676 start, count);
677 }
678
679 qdio_handle_aobs(q, start, count);
680
681 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
682 q->irq_ptr->int_parm);
683
684
685 q->first_to_kick = end;
686 q->qdio_error = 0;
687}
688
689static inline int qdio_tasklet_schedule(struct qdio_q *q)
690{
691 if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) {
692 tasklet_schedule(&q->tasklet);
693 return 0;
694 }
695 return -EPERM;
696}
697
698static void __qdio_inbound_processing(struct qdio_q *q)
699{
700 qperf_inc(q, tasklet_inbound);
701
702 if (!qdio_inbound_q_moved(q))
703 return;
704
705 qdio_kick_handler(q);
706
707 if (!qdio_inbound_q_done(q)) {
708
709 qperf_inc(q, tasklet_inbound_resched);
710 if (!qdio_tasklet_schedule(q))
711 return;
712 }
713
714 qdio_stop_polling(q);
715
716
717
718
719 if (!qdio_inbound_q_done(q)) {
720 qperf_inc(q, tasklet_inbound_resched2);
721 qdio_tasklet_schedule(q);
722 }
723}
724
725void qdio_inbound_processing(unsigned long data)
726{
727 struct qdio_q *q = (struct qdio_q *)data;
728 __qdio_inbound_processing(q);
729}
730
731static int get_outbound_buffer_frontier(struct qdio_q *q)
732{
733 int count, stop;
734 unsigned char state = 0;
735
736 q->timestamp = get_tod_clock_fast();
737
738 if (need_siga_sync(q))
739 if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
740 !pci_out_supported(q)) ||
741 (queue_type(q) == QDIO_IQDIO_QFMT &&
742 multicast_outbound(q)))
743 qdio_siga_sync_q(q);
744
745
746
747
748
749 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
750 stop = add_buf(q->first_to_check, count);
751 if (q->first_to_check == stop)
752 goto out;
753
754 count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
755 if (!count)
756 goto out;
757
758 switch (state) {
759 case SLSB_P_OUTPUT_EMPTY:
760
761 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
762 "out empty:%1d %02x", q->nr, count);
763
764 atomic_sub(count, &q->nr_buf_used);
765 q->first_to_check = add_buf(q->first_to_check, count);
766 if (q->irq_ptr->perf_stat_enabled)
767 account_sbals(q, count);
768
769 break;
770 case SLSB_P_OUTPUT_ERROR:
771 process_buffer_error(q, count);
772 q->first_to_check = add_buf(q->first_to_check, count);
773 atomic_sub(count, &q->nr_buf_used);
774 if (q->irq_ptr->perf_stat_enabled)
775 account_sbals_error(q, count);
776 break;
777 case SLSB_CU_OUTPUT_PRIMED:
778
779 if (q->irq_ptr->perf_stat_enabled)
780 q->q_stats.nr_sbal_nop++;
781 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
782 q->nr);
783 break;
784 case SLSB_P_OUTPUT_NOT_INIT:
785 case SLSB_P_OUTPUT_HALTED:
786 break;
787 default:
788 WARN_ON_ONCE(1);
789 }
790
791out:
792 return q->first_to_check;
793}
794
795
796static inline int qdio_outbound_q_done(struct qdio_q *q)
797{
798 return atomic_read(&q->nr_buf_used) == 0;
799}
800
801static inline int qdio_outbound_q_moved(struct qdio_q *q)
802{
803 int bufnr;
804
805 bufnr = get_outbound_buffer_frontier(q);
806
807 if (bufnr != q->last_move) {
808 q->last_move = bufnr;
809 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
810 return 1;
811 } else
812 return 0;
813}
814
815static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
816{
817 int retries = 0, cc;
818 unsigned int busy_bit;
819
820 if (!need_siga_out(q))
821 return 0;
822
823 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
824retry:
825 qperf_inc(q, siga_write);
826
827 cc = qdio_siga_output(q, &busy_bit, aob);
828 switch (cc) {
829 case 0:
830 break;
831 case 2:
832 if (busy_bit) {
833 while (++retries < QDIO_BUSY_BIT_RETRIES) {
834 mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
835 goto retry;
836 }
837 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
838 cc = -EBUSY;
839 } else {
840 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
841 cc = -ENOBUFS;
842 }
843 break;
844 case 1:
845 case 3:
846 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
847 cc = -EIO;
848 break;
849 }
850 if (retries) {
851 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
852 DBF_ERROR("count:%u", retries);
853 }
854 return cc;
855}
856
857static void __qdio_outbound_processing(struct qdio_q *q)
858{
859 qperf_inc(q, tasklet_outbound);
860 WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
861
862 if (qdio_outbound_q_moved(q))
863 qdio_kick_handler(q);
864
865 if (queue_type(q) == QDIO_ZFCP_QFMT)
866 if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
867 goto sched;
868
869 if (q->u.out.pci_out_enabled)
870 return;
871
872
873
874
875
876
877 if (qdio_outbound_q_done(q))
878 del_timer_sync(&q->u.out.timer);
879 else
880 if (!timer_pending(&q->u.out.timer) &&
881 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
882 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
883 return;
884
885sched:
886 qdio_tasklet_schedule(q);
887}
888
889
890void qdio_outbound_processing(unsigned long data)
891{
892 struct qdio_q *q = (struct qdio_q *)data;
893 __qdio_outbound_processing(q);
894}
895
896void qdio_outbound_timer(unsigned long data)
897{
898 struct qdio_q *q = (struct qdio_q *)data;
899
900 qdio_tasklet_schedule(q);
901}
902
903static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
904{
905 struct qdio_q *out;
906 int i;
907
908 if (!pci_out_supported(q))
909 return;
910
911 for_each_output_queue(q->irq_ptr, out, i)
912 if (!qdio_outbound_q_done(out))
913 qdio_tasklet_schedule(out);
914}
915
916static void __tiqdio_inbound_processing(struct qdio_q *q)
917{
918 qperf_inc(q, tasklet_inbound);
919 if (need_siga_sync(q) && need_siga_sync_after_ai(q))
920 qdio_sync_queues(q);
921
922
923
924
925
926 qdio_check_outbound_after_thinint(q);
927
928 if (!qdio_inbound_q_moved(q))
929 return;
930
931 qdio_kick_handler(q);
932
933 if (!qdio_inbound_q_done(q)) {
934 qperf_inc(q, tasklet_inbound_resched);
935 if (!qdio_tasklet_schedule(q))
936 return;
937 }
938
939 qdio_stop_polling(q);
940
941
942
943
944 if (!qdio_inbound_q_done(q)) {
945 qperf_inc(q, tasklet_inbound_resched2);
946 qdio_tasklet_schedule(q);
947 }
948}
949
950void tiqdio_inbound_processing(unsigned long data)
951{
952 struct qdio_q *q = (struct qdio_q *)data;
953 __tiqdio_inbound_processing(q);
954}
955
956static inline void qdio_set_state(struct qdio_irq *irq_ptr,
957 enum qdio_irq_states state)
958{
959 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
960
961 irq_ptr->state = state;
962 mb();
963}
964
965static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
966{
967 if (irb->esw.esw0.erw.cons) {
968 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
969 DBF_ERROR_HEX(irb, 64);
970 DBF_ERROR_HEX(irb->ecw, 64);
971 }
972}
973
974
975static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
976{
977 int i;
978 struct qdio_q *q;
979
980 if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
981 return;
982
983 for_each_input_queue(irq_ptr, q, i) {
984 if (q->u.in.queue_start_poll) {
985
986 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
987 &q->u.in.queue_irq_state)) {
988 qperf_inc(q, int_discarded);
989 continue;
990 }
991 q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
992 q->irq_ptr->int_parm);
993 } else {
994 tasklet_schedule(&q->tasklet);
995 }
996 }
997
998 if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
999 return;
1000
1001 for_each_output_queue(irq_ptr, q, i) {
1002 if (qdio_outbound_q_done(q))
1003 continue;
1004 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
1005 qdio_siga_sync_q(q);
1006 qdio_tasklet_schedule(q);
1007 }
1008}
1009
1010static void qdio_handle_activate_check(struct ccw_device *cdev,
1011 unsigned long intparm, int cstat, int dstat)
1012{
1013 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1014 struct qdio_q *q;
1015 int count;
1016
1017 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
1018 DBF_ERROR("intp :%lx", intparm);
1019 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1020
1021 if (irq_ptr->nr_input_qs) {
1022 q = irq_ptr->input_qs[0];
1023 } else if (irq_ptr->nr_output_qs) {
1024 q = irq_ptr->output_qs[0];
1025 } else {
1026 dump_stack();
1027 goto no_handler;
1028 }
1029
1030 count = sub_buf(q->first_to_check, q->first_to_kick);
1031 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
1032 q->nr, q->first_to_kick, count, irq_ptr->int_parm);
1033no_handler:
1034 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1035
1036
1037
1038
1039 lgr_info_log();
1040}
1041
1042static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
1043 int dstat)
1044{
1045 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1046
1047 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
1048
1049 if (cstat)
1050 goto error;
1051 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
1052 goto error;
1053 if (!(dstat & DEV_STAT_DEV_END))
1054 goto error;
1055 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
1056 return;
1057
1058error:
1059 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
1060 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1061 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1062}
1063
1064
1065void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
1066 struct irb *irb)
1067{
1068 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1069 struct subchannel_id schid;
1070 int cstat, dstat;
1071
1072 if (!intparm || !irq_ptr) {
1073 ccw_device_get_schid(cdev, &schid);
1074 DBF_ERROR("qint:%4x", schid.sch_no);
1075 return;
1076 }
1077
1078 if (irq_ptr->perf_stat_enabled)
1079 irq_ptr->perf_stat.qdio_int++;
1080
1081 if (IS_ERR(irb)) {
1082 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
1083 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1084 wake_up(&cdev->private->wait_q);
1085 return;
1086 }
1087 qdio_irq_check_sense(irq_ptr, irb);
1088 cstat = irb->scsw.cmd.cstat;
1089 dstat = irb->scsw.cmd.dstat;
1090
1091 switch (irq_ptr->state) {
1092 case QDIO_IRQ_STATE_INACTIVE:
1093 qdio_establish_handle_irq(cdev, cstat, dstat);
1094 break;
1095 case QDIO_IRQ_STATE_CLEANUP:
1096 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1097 break;
1098 case QDIO_IRQ_STATE_ESTABLISHED:
1099 case QDIO_IRQ_STATE_ACTIVE:
1100 if (cstat & SCHN_STAT_PCI) {
1101 qdio_int_handler_pci(irq_ptr);
1102 return;
1103 }
1104 if (cstat || dstat)
1105 qdio_handle_activate_check(cdev, intparm, cstat,
1106 dstat);
1107 break;
1108 case QDIO_IRQ_STATE_STOPPED:
1109 break;
1110 default:
1111 WARN_ON_ONCE(1);
1112 }
1113 wake_up(&cdev->private->wait_q);
1114}
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124int qdio_get_ssqd_desc(struct ccw_device *cdev,
1125 struct qdio_ssqd_desc *data)
1126{
1127 struct subchannel_id schid;
1128
1129 if (!cdev || !cdev->private)
1130 return -EINVAL;
1131
1132 ccw_device_get_schid(cdev, &schid);
1133 DBF_EVENT("get ssqd:%4x", schid.sch_no);
1134 return qdio_setup_get_ssqd(NULL, &schid, data);
1135}
1136EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1137
1138static void qdio_shutdown_queues(struct ccw_device *cdev)
1139{
1140 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1141 struct qdio_q *q;
1142 int i;
1143
1144 for_each_input_queue(irq_ptr, q, i)
1145 tasklet_kill(&q->tasklet);
1146
1147 for_each_output_queue(irq_ptr, q, i) {
1148 del_timer_sync(&q->u.out.timer);
1149 tasklet_kill(&q->tasklet);
1150 }
1151}
1152
1153
1154
1155
1156
1157
1158int qdio_shutdown(struct ccw_device *cdev, int how)
1159{
1160 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1161 struct subchannel_id schid;
1162 int rc;
1163
1164 if (!irq_ptr)
1165 return -ENODEV;
1166
1167 WARN_ON_ONCE(irqs_disabled());
1168 ccw_device_get_schid(cdev, &schid);
1169 DBF_EVENT("qshutdown:%4x", schid.sch_no);
1170
1171 mutex_lock(&irq_ptr->setup_mutex);
1172
1173
1174
1175
1176 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1177 mutex_unlock(&irq_ptr->setup_mutex);
1178 return 0;
1179 }
1180
1181
1182
1183
1184
1185 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1186
1187 tiqdio_remove_input_queues(irq_ptr);
1188 qdio_shutdown_queues(cdev);
1189 qdio_shutdown_debug_entries(irq_ptr);
1190
1191
1192 spin_lock_irq(get_ccwdev_lock(cdev));
1193
1194 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1195 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1196 else
1197
1198 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1199 if (rc) {
1200 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1201 DBF_ERROR("rc:%4d", rc);
1202 goto no_cleanup;
1203 }
1204
1205 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1206 spin_unlock_irq(get_ccwdev_lock(cdev));
1207 wait_event_interruptible_timeout(cdev->private->wait_q,
1208 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1209 irq_ptr->state == QDIO_IRQ_STATE_ERR,
1210 10 * HZ);
1211 spin_lock_irq(get_ccwdev_lock(cdev));
1212
1213no_cleanup:
1214 qdio_shutdown_thinint(irq_ptr);
1215
1216
1217 if ((void *)cdev->handler == (void *)qdio_int_handler)
1218 cdev->handler = irq_ptr->orig_handler;
1219 spin_unlock_irq(get_ccwdev_lock(cdev));
1220
1221 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1222 mutex_unlock(&irq_ptr->setup_mutex);
1223 if (rc)
1224 return rc;
1225 return 0;
1226}
1227EXPORT_SYMBOL_GPL(qdio_shutdown);
1228
1229
1230
1231
1232
1233int qdio_free(struct ccw_device *cdev)
1234{
1235 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1236 struct subchannel_id schid;
1237
1238 if (!irq_ptr)
1239 return -ENODEV;
1240
1241 ccw_device_get_schid(cdev, &schid);
1242 DBF_EVENT("qfree:%4x", schid.sch_no);
1243 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
1244 mutex_lock(&irq_ptr->setup_mutex);
1245
1246 irq_ptr->debug_area = NULL;
1247 cdev->private->qdio_data = NULL;
1248 mutex_unlock(&irq_ptr->setup_mutex);
1249
1250 qdio_release_memory(irq_ptr);
1251 return 0;
1252}
1253EXPORT_SYMBOL_GPL(qdio_free);
1254
1255
1256
1257
1258
1259int qdio_allocate(struct qdio_initialize *init_data)
1260{
1261 struct subchannel_id schid;
1262 struct qdio_irq *irq_ptr;
1263
1264 ccw_device_get_schid(init_data->cdev, &schid);
1265 DBF_EVENT("qallocate:%4x", schid.sch_no);
1266
1267 if ((init_data->no_input_qs && !init_data->input_handler) ||
1268 (init_data->no_output_qs && !init_data->output_handler))
1269 return -EINVAL;
1270
1271 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1272 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1273 return -EINVAL;
1274
1275 if ((!init_data->input_sbal_addr_array) ||
1276 (!init_data->output_sbal_addr_array))
1277 return -EINVAL;
1278
1279
1280 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1281 if (!irq_ptr)
1282 goto out_err;
1283
1284 mutex_init(&irq_ptr->setup_mutex);
1285 if (qdio_allocate_dbf(init_data, irq_ptr))
1286 goto out_rel;
1287
1288
1289
1290
1291
1292
1293
1294 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1295 if (!irq_ptr->chsc_page)
1296 goto out_rel;
1297
1298
1299 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1300 if (!irq_ptr->qdr)
1301 goto out_rel;
1302
1303 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1304 init_data->no_output_qs))
1305 goto out_rel;
1306
1307 init_data->cdev->private->qdio_data = irq_ptr;
1308 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1309 return 0;
1310out_rel:
1311 qdio_release_memory(irq_ptr);
1312out_err:
1313 return -ENOMEM;
1314}
1315EXPORT_SYMBOL_GPL(qdio_allocate);
1316
1317static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
1318{
1319 struct qdio_q *q = irq_ptr->input_qs[0];
1320 int i, use_cq = 0;
1321
1322 if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
1323 use_cq = 1;
1324
1325 for_each_output_queue(irq_ptr, q, i) {
1326 if (use_cq) {
1327 if (qdio_enable_async_operation(&q->u.out) < 0) {
1328 use_cq = 0;
1329 continue;
1330 }
1331 } else
1332 qdio_disable_async_operation(&q->u.out);
1333 }
1334 DBF_EVENT("use_cq:%d", use_cq);
1335}
1336
1337
1338
1339
1340
1341int qdio_establish(struct qdio_initialize *init_data)
1342{
1343 struct ccw_device *cdev = init_data->cdev;
1344 struct subchannel_id schid;
1345 struct qdio_irq *irq_ptr;
1346 int rc;
1347
1348 ccw_device_get_schid(cdev, &schid);
1349 DBF_EVENT("qestablish:%4x", schid.sch_no);
1350
1351 irq_ptr = cdev->private->qdio_data;
1352 if (!irq_ptr)
1353 return -ENODEV;
1354
1355 mutex_lock(&irq_ptr->setup_mutex);
1356 qdio_setup_irq(init_data);
1357
1358 rc = qdio_establish_thinint(irq_ptr);
1359 if (rc) {
1360 mutex_unlock(&irq_ptr->setup_mutex);
1361 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1362 return rc;
1363 }
1364
1365
1366 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1367 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1368 irq_ptr->ccw.count = irq_ptr->equeue.count;
1369 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1370
1371 spin_lock_irq(get_ccwdev_lock(cdev));
1372 ccw_device_set_options_mask(cdev, 0);
1373
1374 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1375 spin_unlock_irq(get_ccwdev_lock(cdev));
1376 if (rc) {
1377 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1378 DBF_ERROR("rc:%4x", rc);
1379 mutex_unlock(&irq_ptr->setup_mutex);
1380 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1381 return rc;
1382 }
1383
1384 wait_event_interruptible_timeout(cdev->private->wait_q,
1385 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1386 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1387
1388 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1389 mutex_unlock(&irq_ptr->setup_mutex);
1390 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1391 return -EIO;
1392 }
1393
1394 qdio_setup_ssqd_info(irq_ptr);
1395
1396 qdio_detect_hsicq(irq_ptr);
1397
1398
1399 qdio_init_buf_states(irq_ptr);
1400
1401 mutex_unlock(&irq_ptr->setup_mutex);
1402 qdio_print_subchannel_info(irq_ptr, cdev);
1403 qdio_setup_debug_entries(irq_ptr, cdev);
1404 return 0;
1405}
1406EXPORT_SYMBOL_GPL(qdio_establish);
1407
1408
1409
1410
1411
1412int qdio_activate(struct ccw_device *cdev)
1413{
1414 struct subchannel_id schid;
1415 struct qdio_irq *irq_ptr;
1416 int rc;
1417
1418 ccw_device_get_schid(cdev, &schid);
1419 DBF_EVENT("qactivate:%4x", schid.sch_no);
1420
1421 irq_ptr = cdev->private->qdio_data;
1422 if (!irq_ptr)
1423 return -ENODEV;
1424
1425 mutex_lock(&irq_ptr->setup_mutex);
1426 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1427 rc = -EBUSY;
1428 goto out;
1429 }
1430
1431 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1432 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1433 irq_ptr->ccw.count = irq_ptr->aqueue.count;
1434 irq_ptr->ccw.cda = 0;
1435
1436 spin_lock_irq(get_ccwdev_lock(cdev));
1437 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1438
1439 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1440 0, DOIO_DENY_PREFETCH);
1441 spin_unlock_irq(get_ccwdev_lock(cdev));
1442 if (rc) {
1443 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1444 DBF_ERROR("rc:%4x", rc);
1445 goto out;
1446 }
1447
1448 if (is_thinint_irq(irq_ptr))
1449 tiqdio_add_input_queues(irq_ptr);
1450
1451
1452 msleep(5);
1453
1454 switch (irq_ptr->state) {
1455 case QDIO_IRQ_STATE_STOPPED:
1456 case QDIO_IRQ_STATE_ERR:
1457 rc = -EIO;
1458 break;
1459 default:
1460 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1461 rc = 0;
1462 }
1463out:
1464 mutex_unlock(&irq_ptr->setup_mutex);
1465 return rc;
1466}
1467EXPORT_SYMBOL_GPL(qdio_activate);
1468
1469static inline int buf_in_between(int bufnr, int start, int count)
1470{
1471 int end = add_buf(start, count);
1472
1473 if (end > start) {
1474 if (bufnr >= start && bufnr < end)
1475 return 1;
1476 else
1477 return 0;
1478 }
1479
1480
1481 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1482 (bufnr < end))
1483 return 1;
1484 else
1485 return 0;
1486}
1487
1488
1489
1490
1491
1492
1493
1494
1495static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1496 int bufnr, int count)
1497{
1498 int diff;
1499
1500 qperf_inc(q, inbound_call);
1501
1502 if (!q->u.in.polling)
1503 goto set;
1504
1505
1506 if (count == QDIO_MAX_BUFFERS_PER_Q) {
1507
1508 q->u.in.polling = 0;
1509 q->u.in.ack_count = 0;
1510 goto set;
1511 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
1512 if (is_qebsm(q)) {
1513
1514 diff = add_buf(bufnr, count);
1515 diff = sub_buf(diff, q->u.in.ack_start);
1516 q->u.in.ack_count -= diff;
1517 if (q->u.in.ack_count <= 0) {
1518 q->u.in.polling = 0;
1519 q->u.in.ack_count = 0;
1520 goto set;
1521 }
1522 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
1523 }
1524 else
1525
1526 q->u.in.polling = 0;
1527 }
1528
1529set:
1530 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
1531 atomic_add(count, &q->nr_buf_used);
1532
1533 if (need_siga_in(q))
1534 return qdio_siga_input(q);
1535
1536 return 0;
1537}
1538
1539
1540
1541
1542
1543
1544
1545
1546static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1547 int bufnr, int count)
1548{
1549 unsigned char state = 0;
1550 int used, rc = 0;
1551
1552 qperf_inc(q, outbound_call);
1553
1554 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1555 used = atomic_add_return(count, &q->nr_buf_used);
1556
1557 if (used == QDIO_MAX_BUFFERS_PER_Q)
1558 qperf_inc(q, outbound_queue_full);
1559
1560 if (callflags & QDIO_FLAG_PCI_OUT) {
1561 q->u.out.pci_out_enabled = 1;
1562 qperf_inc(q, pci_request_int);
1563 } else
1564 q->u.out.pci_out_enabled = 0;
1565
1566 if (queue_type(q) == QDIO_IQDIO_QFMT) {
1567 unsigned long phys_aob = 0;
1568
1569
1570 WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
1571
1572 phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
1573
1574 rc = qdio_kick_outbound_q(q, phys_aob);
1575 } else if (need_siga_sync(q)) {
1576 rc = qdio_siga_sync_q(q);
1577 } else {
1578
1579 get_buf_state(q, prev_buf(bufnr), &state, 0);
1580 if (state != SLSB_CU_OUTPUT_PRIMED)
1581 rc = qdio_kick_outbound_q(q, 0);
1582 else
1583 qperf_inc(q, fast_requeue);
1584 }
1585
1586
1587 if (used >= q->u.out.scan_threshold || rc)
1588 qdio_tasklet_schedule(q);
1589 else
1590
1591 if (!timer_pending(&q->u.out.timer) &&
1592 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
1593 mod_timer(&q->u.out.timer, jiffies + HZ);
1594 return rc;
1595}
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
1606 int q_nr, unsigned int bufnr, unsigned int count)
1607{
1608 struct qdio_irq *irq_ptr;
1609
1610 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
1611 return -EINVAL;
1612
1613 irq_ptr = cdev->private->qdio_data;
1614 if (!irq_ptr)
1615 return -ENODEV;
1616
1617 DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1618 "do%02x b:%02x c:%02x", callflags, bufnr, count);
1619
1620 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1621 return -EIO;
1622 if (!count)
1623 return 0;
1624 if (callflags & QDIO_FLAG_SYNC_INPUT)
1625 return handle_inbound(irq_ptr->input_qs[q_nr],
1626 callflags, bufnr, count);
1627 else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
1628 return handle_outbound(irq_ptr->output_qs[q_nr],
1629 callflags, bufnr, count);
1630 return -EINVAL;
1631}
1632EXPORT_SYMBOL_GPL(do_QDIO);
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643int qdio_start_irq(struct ccw_device *cdev, int nr)
1644{
1645 struct qdio_q *q;
1646 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1647
1648 if (!irq_ptr)
1649 return -ENODEV;
1650 q = irq_ptr->input_qs[nr];
1651
1652 clear_nonshared_ind(irq_ptr);
1653 qdio_stop_polling(q);
1654 clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
1655
1656
1657
1658
1659
1660 if (test_nonshared_ind(irq_ptr))
1661 goto rescan;
1662 if (!qdio_inbound_q_done(q))
1663 goto rescan;
1664 return 0;
1665
1666rescan:
1667 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1668 &q->u.in.queue_irq_state))
1669 return 0;
1670 else
1671 return 1;
1672
1673}
1674EXPORT_SYMBOL(qdio_start_irq);
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
1689 int *error)
1690{
1691 struct qdio_q *q;
1692 int start, end;
1693 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1694
1695 if (!irq_ptr)
1696 return -ENODEV;
1697 q = irq_ptr->input_qs[nr];
1698
1699
1700
1701
1702
1703 if (need_siga_sync(q))
1704 qdio_sync_queues(q);
1705
1706
1707 qdio_check_outbound_after_thinint(q);
1708
1709 if (!qdio_inbound_q_moved(q))
1710 return 0;
1711
1712
1713 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
1714 return -EIO;
1715
1716 start = q->first_to_kick;
1717 end = q->first_to_check;
1718 *bufnr = start;
1719 *error = q->qdio_error;
1720
1721
1722 q->first_to_kick = end;
1723 q->qdio_error = 0;
1724 return sub_buf(end, start);
1725}
1726EXPORT_SYMBOL(qdio_get_next_buffers);
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737int qdio_stop_irq(struct ccw_device *cdev, int nr)
1738{
1739 struct qdio_q *q;
1740 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1741
1742 if (!irq_ptr)
1743 return -ENODEV;
1744 q = irq_ptr->input_qs[nr];
1745
1746 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1747 &q->u.in.queue_irq_state))
1748 return 0;
1749 else
1750 return 1;
1751}
1752EXPORT_SYMBOL(qdio_stop_irq);
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771int qdio_pnso_brinfo(struct subchannel_id schid,
1772 int cnc, u16 *response,
1773 void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
1774 void *entry),
1775 void *priv)
1776{
1777 struct chsc_pnso_area *rr;
1778 int rc;
1779 u32 prev_instance = 0;
1780 int isfirstblock = 1;
1781 int i, size, elems;
1782
1783 rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL);
1784 if (rr == NULL)
1785 return -ENOMEM;
1786 do {
1787
1788 rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc);
1789 if (rc != 0 && rc != -EBUSY)
1790 goto out;
1791 if (rr->response.code != 1) {
1792 rc = -EIO;
1793 continue;
1794 } else
1795 rc = 0;
1796
1797 if (cb == NULL)
1798 continue;
1799
1800 size = rr->naihdr.naids;
1801 elems = (rr->response.length -
1802 sizeof(struct chsc_header) -
1803 sizeof(struct chsc_brinfo_naihdr)) /
1804 size;
1805
1806 if (!isfirstblock && (rr->naihdr.instance != prev_instance)) {
1807
1808
1809 rc = -EAGAIN;
1810 break;
1811 }
1812 isfirstblock = 0;
1813 prev_instance = rr->naihdr.instance;
1814 for (i = 0; i < elems; i++)
1815 switch (size) {
1816 case sizeof(struct qdio_brinfo_entry_l3_ipv6):
1817 (*cb)(priv, l3_ipv6_addr,
1818 &rr->entries.l3_ipv6[i]);
1819 break;
1820 case sizeof(struct qdio_brinfo_entry_l3_ipv4):
1821 (*cb)(priv, l3_ipv4_addr,
1822 &rr->entries.l3_ipv4[i]);
1823 break;
1824 case sizeof(struct qdio_brinfo_entry_l2):
1825 (*cb)(priv, l2_addr_lnid,
1826 &rr->entries.l2[i]);
1827 break;
1828 default:
1829 WARN_ON_ONCE(1);
1830 rc = -EIO;
1831 goto out;
1832 }
1833 } while (rr->response.code == 0x0107 ||
1834 (rr->response.code == 1 &&
1835
1836 (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2)));
1837 (*response) = rr->response.code;
1838
1839out:
1840 free_page((unsigned long)rr);
1841 return rc;
1842}
1843EXPORT_SYMBOL_GPL(qdio_pnso_brinfo);
1844
1845static int __init init_QDIO(void)
1846{
1847 int rc;
1848
1849 rc = qdio_debug_init();
1850 if (rc)
1851 return rc;
1852 rc = qdio_setup_init();
1853 if (rc)
1854 goto out_debug;
1855 rc = tiqdio_allocate_memory();
1856 if (rc)
1857 goto out_cache;
1858 rc = tiqdio_register_thinints();
1859 if (rc)
1860 goto out_ti;
1861 return 0;
1862
1863out_ti:
1864 tiqdio_free_memory();
1865out_cache:
1866 qdio_setup_exit();
1867out_debug:
1868 qdio_debug_exit();
1869 return rc;
1870}
1871
1872static void __exit exit_QDIO(void)
1873{
1874 tiqdio_unregister_thinints();
1875 tiqdio_free_memory();
1876 qdio_setup_exit();
1877 qdio_debug_exit();
1878}
1879
1880module_init(init_QDIO);
1881module_exit(exit_QDIO);
1882