linux/drivers/usb/early/ehci-dbgp.c
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   1/*
   2 * Standalone EHCI usb debug driver
   3 *
   4 * Originally written by:
   5 *  Eric W. Biederman" <ebiederm@xmission.com> and
   6 *  Yinghai Lu <yhlu.kernel@gmail.com>
   7 *
   8 * Changes for early/late printk and HW errata:
   9 *  Jason Wessel <jason.wessel@windriver.com>
  10 *  Copyright (C) 2009 Wind River Systems, Inc.
  11 *
  12 */
  13
  14#include <linux/console.h>
  15#include <linux/errno.h>
  16#include <linux/init.h>
  17#include <linux/pci_regs.h>
  18#include <linux/pci_ids.h>
  19#include <linux/usb/ch9.h>
  20#include <linux/usb/ehci_def.h>
  21#include <linux/delay.h>
  22#include <linux/serial_core.h>
  23#include <linux/kgdb.h>
  24#include <linux/kthread.h>
  25#include <asm/io.h>
  26#include <asm/pci-direct.h>
  27#include <asm/fixmap.h>
  28
  29/* The code here is intended to talk directly to the EHCI debug port
  30 * and does not require that you have any kind of USB host controller
  31 * drivers or USB device drivers compiled into the kernel.
  32 *
  33 * If you make a change to anything in here, the following test cases
  34 * need to pass where a USB debug device works in the following
  35 * configurations.
  36 *
  37 * 1. boot args:  earlyprintk=dbgp
  38 *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  39 *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
  40 * 2. boot args: earlyprintk=dbgp,keep
  41 *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  42 *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
  43 * 3. boot args: earlyprintk=dbgp console=ttyUSB0
  44 *     o kernel has CONFIG_USB_EHCI_HCD=y and
  45 *       CONFIG_USB_SERIAL_DEBUG=y
  46 * 4. boot args: earlyprintk=vga,dbgp
  47 *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  48 *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
  49 *
  50 * For the 4th configuration you can turn on or off the DBGP_DEBUG
  51 * such that you can debug the dbgp device's driver code.
  52 */
  53
  54static int dbgp_phys_port = 1;
  55
  56static struct ehci_caps __iomem *ehci_caps;
  57static struct ehci_regs __iomem *ehci_regs;
  58static struct ehci_dbg_port __iomem *ehci_debug;
  59static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
  60static unsigned int dbgp_endpoint_out;
  61static unsigned int dbgp_endpoint_in;
  62
  63struct ehci_dev {
  64        u32 bus;
  65        u32 slot;
  66        u32 func;
  67};
  68
  69static struct ehci_dev ehci_dev;
  70
  71#define USB_DEBUG_DEVNUM 127
  72
  73#ifdef DBGP_DEBUG
  74#define dbgp_printk printk
  75static void dbgp_ehci_status(char *str)
  76{
  77        if (!ehci_debug)
  78                return;
  79        dbgp_printk("dbgp: %s\n", str);
  80        dbgp_printk("  Debug control: %08x", readl(&ehci_debug->control));
  81        dbgp_printk("  ehci cmd     : %08x", readl(&ehci_regs->command));
  82        dbgp_printk("  ehci conf flg: %08x\n",
  83                    readl(&ehci_regs->configured_flag));
  84        dbgp_printk("  ehci status  : %08x", readl(&ehci_regs->status));
  85        dbgp_printk("  ehci portsc  : %08x\n",
  86                    readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
  87}
  88#else
  89static inline void dbgp_ehci_status(char *str) { }
  90static inline void dbgp_printk(const char *fmt, ...) { }
  91#endif
  92
  93static inline u32 dbgp_len_update(u32 x, u32 len)
  94{
  95        return (x & ~0x0f) | (len & 0x0f);
  96}
  97
  98#ifdef CONFIG_KGDB
  99static struct kgdb_io kgdbdbgp_io_ops;
 100#define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops)
 101#else
 102#define dbgp_kgdb_mode (0)
 103#endif
 104
 105/* Local version of HC_LENGTH macro as ehci struct is not available here */
 106#define EARLY_HC_LENGTH(p)      (0x00ff & (p)) /* bits 7 : 0 */
 107
 108/*
 109 * USB Packet IDs (PIDs)
 110 */
 111
 112/* token */
 113#define USB_PID_OUT             0xe1
 114#define USB_PID_IN              0x69
 115#define USB_PID_SOF             0xa5
 116#define USB_PID_SETUP           0x2d
 117/* handshake */
 118#define USB_PID_ACK             0xd2
 119#define USB_PID_NAK             0x5a
 120#define USB_PID_STALL           0x1e
 121#define USB_PID_NYET            0x96
 122/* data */
 123#define USB_PID_DATA0           0xc3
 124#define USB_PID_DATA1           0x4b
 125#define USB_PID_DATA2           0x87
 126#define USB_PID_MDATA           0x0f
 127/* Special */
 128#define USB_PID_PREAMBLE        0x3c
 129#define USB_PID_ERR             0x3c
 130#define USB_PID_SPLIT           0x78
 131#define USB_PID_PING            0xb4
 132#define USB_PID_UNDEF_0         0xf0
 133
 134#define USB_PID_DATA_TOGGLE     0x88
 135#define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
 136
 137#define PCI_CAP_ID_EHCI_DEBUG   0xa
 138
 139#define HUB_ROOT_RESET_TIME     50      /* times are in msec */
 140#define HUB_SHORT_RESET_TIME    10
 141#define HUB_LONG_RESET_TIME     200
 142#define HUB_RESET_TIMEOUT       500
 143
 144#define DBGP_MAX_PACKET         8
 145#define DBGP_TIMEOUT            (250 * 1000)
 146#define DBGP_LOOPS              1000
 147
 148static inline u32 dbgp_pid_write_update(u32 x, u32 tok)
 149{
 150        static int data0 = USB_PID_DATA1;
 151        data0 ^= USB_PID_DATA_TOGGLE;
 152        return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff);
 153}
 154
 155static inline u32 dbgp_pid_read_update(u32 x, u32 tok)
 156{
 157        return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff);
 158}
 159
 160static int dbgp_wait_until_complete(void)
 161{
 162        u32 ctrl;
 163        int loop = DBGP_TIMEOUT;
 164
 165        do {
 166                ctrl = readl(&ehci_debug->control);
 167                /* Stop when the transaction is finished */
 168                if (ctrl & DBGP_DONE)
 169                        break;
 170                udelay(1);
 171        } while (--loop > 0);
 172
 173        if (!loop)
 174                return -DBGP_TIMEOUT;
 175
 176        /*
 177         * Now that we have observed the completed transaction,
 178         * clear the done bit.
 179         */
 180        writel(ctrl | DBGP_DONE, &ehci_debug->control);
 181        return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
 182}
 183
 184static inline void dbgp_mdelay(int ms)
 185{
 186        int i;
 187
 188        while (ms--) {
 189                for (i = 0; i < 1000; i++)
 190                        outb(0x1, 0x80);
 191        }
 192}
 193
 194static void dbgp_breath(void)
 195{
 196        /* Sleep to give the debug port a chance to breathe */
 197}
 198
 199static int dbgp_wait_until_done(unsigned ctrl, int loop)
 200{
 201        u32 pids, lpid;
 202        int ret;
 203
 204retry:
 205        writel(ctrl | DBGP_GO, &ehci_debug->control);
 206        ret = dbgp_wait_until_complete();
 207        pids = readl(&ehci_debug->pids);
 208        lpid = DBGP_PID_GET(pids);
 209
 210        if (ret < 0) {
 211                /* A -DBGP_TIMEOUT failure here means the device has
 212                 * failed, perhaps because it was unplugged, in which
 213                 * case we do not want to hang the system so the dbgp
 214                 * will be marked as unsafe to use.  EHCI reset is the
 215                 * only way to recover if you unplug the dbgp device.
 216                 */
 217                if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
 218                        dbgp_not_safe = 1;
 219                if (ret == -DBGP_ERR_BAD && --loop > 0)
 220                        goto retry;
 221                return ret;
 222        }
 223
 224        /*
 225         * If the port is getting full or it has dropped data
 226         * start pacing ourselves, not necessary but it's friendly.
 227         */
 228        if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
 229                dbgp_breath();
 230
 231        /* If I get a NACK reissue the transmission */
 232        if (lpid == USB_PID_NAK) {
 233                if (--loop > 0)
 234                        goto retry;
 235        }
 236
 237        return ret;
 238}
 239
 240static inline void dbgp_set_data(const void *buf, int size)
 241{
 242        const unsigned char *bytes = buf;
 243        u32 lo, hi;
 244        int i;
 245
 246        lo = hi = 0;
 247        for (i = 0; i < 4 && i < size; i++)
 248                lo |= bytes[i] << (8*i);
 249        for (; i < 8 && i < size; i++)
 250                hi |= bytes[i] << (8*(i - 4));
 251        writel(lo, &ehci_debug->data03);
 252        writel(hi, &ehci_debug->data47);
 253}
 254
 255static inline void dbgp_get_data(void *buf, int size)
 256{
 257        unsigned char *bytes = buf;
 258        u32 lo, hi;
 259        int i;
 260
 261        lo = readl(&ehci_debug->data03);
 262        hi = readl(&ehci_debug->data47);
 263        for (i = 0; i < 4 && i < size; i++)
 264                bytes[i] = (lo >> (8*i)) & 0xff;
 265        for (; i < 8 && i < size; i++)
 266                bytes[i] = (hi >> (8*(i - 4))) & 0xff;
 267}
 268
 269static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
 270                         const char *bytes, int size)
 271{
 272        int ret;
 273        u32 addr;
 274        u32 pids, ctrl;
 275
 276        if (size > DBGP_MAX_PACKET)
 277                return -1;
 278
 279        addr = DBGP_EPADDR(devnum, endpoint);
 280
 281        pids = readl(&ehci_debug->pids);
 282        pids = dbgp_pid_write_update(pids, USB_PID_OUT);
 283
 284        ctrl = readl(&ehci_debug->control);
 285        ctrl = dbgp_len_update(ctrl, size);
 286        ctrl |= DBGP_OUT;
 287        ctrl |= DBGP_GO;
 288
 289        dbgp_set_data(bytes, size);
 290        writel(addr, &ehci_debug->address);
 291        writel(pids, &ehci_debug->pids);
 292        ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
 293
 294        return ret;
 295}
 296
 297static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
 298                          int size, int loops)
 299{
 300        u32 pids, addr, ctrl;
 301        int ret;
 302
 303        if (size > DBGP_MAX_PACKET)
 304                return -1;
 305
 306        addr = DBGP_EPADDR(devnum, endpoint);
 307
 308        pids = readl(&ehci_debug->pids);
 309        pids = dbgp_pid_read_update(pids, USB_PID_IN);
 310
 311        ctrl = readl(&ehci_debug->control);
 312        ctrl = dbgp_len_update(ctrl, size);
 313        ctrl &= ~DBGP_OUT;
 314        ctrl |= DBGP_GO;
 315
 316        writel(addr, &ehci_debug->address);
 317        writel(pids, &ehci_debug->pids);
 318        ret = dbgp_wait_until_done(ctrl, loops);
 319        if (ret < 0)
 320                return ret;
 321
 322        if (size > ret)
 323                size = ret;
 324        dbgp_get_data(data, size);
 325        return ret;
 326}
 327
 328static int dbgp_control_msg(unsigned devnum, int requesttype,
 329        int request, int value, int index, void *data, int size)
 330{
 331        u32 pids, addr, ctrl;
 332        struct usb_ctrlrequest req;
 333        int read;
 334        int ret;
 335
 336        read = (requesttype & USB_DIR_IN) != 0;
 337        if (size > (read ? DBGP_MAX_PACKET : 0))
 338                return -1;
 339
 340        /* Compute the control message */
 341        req.bRequestType = requesttype;
 342        req.bRequest = request;
 343        req.wValue = cpu_to_le16(value);
 344        req.wIndex = cpu_to_le16(index);
 345        req.wLength = cpu_to_le16(size);
 346
 347        pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
 348        addr = DBGP_EPADDR(devnum, 0);
 349
 350        ctrl = readl(&ehci_debug->control);
 351        ctrl = dbgp_len_update(ctrl, sizeof(req));
 352        ctrl |= DBGP_OUT;
 353        ctrl |= DBGP_GO;
 354
 355        /* Send the setup message */
 356        dbgp_set_data(&req, sizeof(req));
 357        writel(addr, &ehci_debug->address);
 358        writel(pids, &ehci_debug->pids);
 359        ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
 360        if (ret < 0)
 361                return ret;
 362
 363        /* Read the result */
 364        return dbgp_bulk_read(devnum, 0, data, size, DBGP_LOOPS);
 365}
 366
 367/* Find a PCI capability */
 368static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
 369{
 370        u8 pos;
 371        int bytes;
 372
 373        if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
 374                PCI_STATUS_CAP_LIST))
 375                return 0;
 376
 377        pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
 378        for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
 379                u8 id;
 380
 381                pos &= ~3;
 382                id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
 383                if (id == 0xff)
 384                        break;
 385                if (id == cap)
 386                        return pos;
 387
 388                pos = read_pci_config_byte(num, slot, func,
 389                                                 pos+PCI_CAP_LIST_NEXT);
 390        }
 391        return 0;
 392}
 393
 394static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
 395{
 396        u32 class;
 397
 398        class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
 399        if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
 400                return 0;
 401
 402        return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
 403}
 404
 405static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
 406{
 407        u32 bus, slot, func;
 408
 409        for (bus = 0; bus < 256; bus++) {
 410                for (slot = 0; slot < 32; slot++) {
 411                        for (func = 0; func < 8; func++) {
 412                                unsigned cap;
 413
 414                                cap = __find_dbgp(bus, slot, func);
 415
 416                                if (!cap)
 417                                        continue;
 418                                if (ehci_num-- != 0)
 419                                        continue;
 420                                *rbus = bus;
 421                                *rslot = slot;
 422                                *rfunc = func;
 423                                return cap;
 424                        }
 425                }
 426        }
 427        return 0;
 428}
 429
 430static int dbgp_ehci_startup(void)
 431{
 432        u32 ctrl, cmd, status;
 433        int loop;
 434
 435        /* Claim ownership, but do not enable yet */
 436        ctrl = readl(&ehci_debug->control);
 437        ctrl |= DBGP_OWNER;
 438        ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
 439        writel(ctrl, &ehci_debug->control);
 440        udelay(1);
 441
 442        dbgp_ehci_status("EHCI startup");
 443        /* Start the ehci running */
 444        cmd = readl(&ehci_regs->command);
 445        cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
 446        cmd |= CMD_RUN;
 447        writel(cmd, &ehci_regs->command);
 448
 449        /* Ensure everything is routed to the EHCI */
 450        writel(FLAG_CF, &ehci_regs->configured_flag);
 451
 452        /* Wait until the controller is no longer halted */
 453        loop = 1000;
 454        do {
 455                status = readl(&ehci_regs->status);
 456                if (!(status & STS_HALT))
 457                        break;
 458                udelay(1);
 459        } while (--loop > 0);
 460
 461        if (!loop) {
 462                dbgp_printk("ehci can not be started\n");
 463                return -ENODEV;
 464        }
 465        dbgp_printk("ehci started\n");
 466        return 0;
 467}
 468
 469static int dbgp_ehci_controller_reset(void)
 470{
 471        int loop = 250 * 1000;
 472        u32 cmd;
 473
 474        /* Reset the EHCI controller */
 475        cmd = readl(&ehci_regs->command);
 476        cmd |= CMD_RESET;
 477        writel(cmd, &ehci_regs->command);
 478        do {
 479                cmd = readl(&ehci_regs->command);
 480        } while ((cmd & CMD_RESET) && (--loop > 0));
 481
 482        if (!loop) {
 483                dbgp_printk("can not reset ehci\n");
 484                return -1;
 485        }
 486        dbgp_ehci_status("ehci reset done");
 487        return 0;
 488}
 489static int ehci_wait_for_port(int port);
 490/* Return 0 on success
 491 * Return -ENODEV for any general failure
 492 * Return -EIO if wait for port fails
 493 */
 494static int _dbgp_external_startup(void)
 495{
 496        int devnum;
 497        struct usb_debug_descriptor dbgp_desc;
 498        int ret;
 499        u32 ctrl, portsc, cmd;
 500        int dbg_port = dbgp_phys_port;
 501        int tries = 3;
 502        int reset_port_tries = 1;
 503        int try_hard_once = 1;
 504
 505try_port_reset_again:
 506        ret = dbgp_ehci_startup();
 507        if (ret)
 508                return ret;
 509
 510        /* Wait for a device to show up in the debug port */
 511        ret = ehci_wait_for_port(dbg_port);
 512        if (ret < 0) {
 513                portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
 514                if (!(portsc & PORT_CONNECT) && try_hard_once) {
 515                        /* Last ditch effort to try to force enable
 516                         * the debug device by using the packet test
 517                         * ehci command to try and wake it up. */
 518                        try_hard_once = 0;
 519                        cmd = readl(&ehci_regs->command);
 520                        cmd &= ~CMD_RUN;
 521                        writel(cmd, &ehci_regs->command);
 522                        portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
 523                        portsc |= PORT_TEST_PKT;
 524                        writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
 525                        dbgp_ehci_status("Trying to force debug port online");
 526                        mdelay(50);
 527                        dbgp_ehci_controller_reset();
 528                        goto try_port_reset_again;
 529                } else if (reset_port_tries--) {
 530                        goto try_port_reset_again;
 531                }
 532                dbgp_printk("No device found in debug port\n");
 533                return -EIO;
 534        }
 535        dbgp_ehci_status("wait for port done");
 536
 537        /* Enable the debug port */
 538        ctrl = readl(&ehci_debug->control);
 539        ctrl |= DBGP_CLAIM;
 540        writel(ctrl, &ehci_debug->control);
 541        ctrl = readl(&ehci_debug->control);
 542        if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
 543                dbgp_printk("No device in debug port\n");
 544                writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
 545                return -ENODEV;
 546        }
 547        dbgp_ehci_status("debug ported enabled");
 548
 549        /* Completely transfer the debug device to the debug controller */
 550        portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
 551        portsc &= ~PORT_PE;
 552        writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
 553
 554        dbgp_mdelay(100);
 555
 556try_again:
 557        /* Find the debug device and make it device number 127 */
 558        for (devnum = 0; devnum <= 127; devnum++) {
 559                ret = dbgp_control_msg(devnum,
 560                        USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
 561                        USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
 562                        &dbgp_desc, sizeof(dbgp_desc));
 563                if (ret > 0)
 564                        break;
 565        }
 566        if (devnum > 127) {
 567                dbgp_printk("Could not find attached debug device\n");
 568                goto err;
 569        }
 570        dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
 571        dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
 572
 573        /* Move the device to 127 if it isn't already there */
 574        if (devnum != USB_DEBUG_DEVNUM) {
 575                ret = dbgp_control_msg(devnum,
 576                        USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
 577                        USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
 578                if (ret < 0) {
 579                        dbgp_printk("Could not move attached device to %d\n",
 580                                USB_DEBUG_DEVNUM);
 581                        goto err;
 582                }
 583                devnum = USB_DEBUG_DEVNUM;
 584                dbgp_printk("debug device renamed to 127\n");
 585        }
 586
 587        /* Enable the debug interface */
 588        ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
 589                USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
 590                USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
 591        if (ret < 0) {
 592                dbgp_printk(" Could not enable the debug device\n");
 593                goto err;
 594        }
 595        dbgp_printk("debug interface enabled\n");
 596        /* Perform a small write to get the even/odd data state in sync
 597         */
 598        ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
 599        if (ret < 0) {
 600                dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
 601                goto err;
 602        }
 603        dbgp_printk("small write done\n");
 604        dbgp_not_safe = 0;
 605
 606        return 0;
 607err:
 608        if (tries--)
 609                goto try_again;
 610        return -ENODEV;
 611}
 612
 613static int ehci_reset_port(int port)
 614{
 615        u32 portsc;
 616        u32 delay_time, delay;
 617        int loop;
 618
 619        dbgp_ehci_status("reset port");
 620        /* Reset the usb debug port */
 621        portsc = readl(&ehci_regs->port_status[port - 1]);
 622        portsc &= ~PORT_PE;
 623        portsc |= PORT_RESET;
 624        writel(portsc, &ehci_regs->port_status[port - 1]);
 625
 626        delay = HUB_ROOT_RESET_TIME;
 627        for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
 628             delay_time += delay) {
 629                dbgp_mdelay(delay);
 630                portsc = readl(&ehci_regs->port_status[port - 1]);
 631                if (!(portsc & PORT_RESET))
 632                        break;
 633        }
 634                if (portsc & PORT_RESET) {
 635                        /* force reset to complete */
 636                        loop = 100 * 1000;
 637                        writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
 638                                &ehci_regs->port_status[port - 1]);
 639                        do {
 640                                udelay(1);
 641                                portsc = readl(&ehci_regs->port_status[port-1]);
 642                        } while ((portsc & PORT_RESET) && (--loop > 0));
 643                }
 644
 645                /* Device went away? */
 646                if (!(portsc & PORT_CONNECT))
 647                        return -ENOTCONN;
 648
 649                /* bomb out completely if something weird happened */
 650                if ((portsc & PORT_CSC))
 651                        return -EINVAL;
 652
 653                /* If we've finished resetting, then break out of the loop */
 654                if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
 655                        return 0;
 656        return -EBUSY;
 657}
 658
 659static int ehci_wait_for_port(int port)
 660{
 661        u32 status;
 662        int ret, reps;
 663
 664        for (reps = 0; reps < 300; reps++) {
 665                status = readl(&ehci_regs->status);
 666                if (status & STS_PCD)
 667                        break;
 668                dbgp_mdelay(1);
 669        }
 670        ret = ehci_reset_port(port);
 671        if (ret == 0)
 672                return 0;
 673        return -ENOTCONN;
 674}
 675
 676typedef void (*set_debug_port_t)(int port);
 677
 678static void __init default_set_debug_port(int port)
 679{
 680}
 681
 682static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
 683
 684static void __init nvidia_set_debug_port(int port)
 685{
 686        u32 dword;
 687        dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
 688                                 0x74);
 689        dword &= ~(0x0f<<12);
 690        dword |= ((port & 0x0f)<<12);
 691        write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
 692                                 dword);
 693        dbgp_printk("set debug port to %d\n", port);
 694}
 695
 696static void __init detect_set_debug_port(void)
 697{
 698        u32 vendorid;
 699
 700        vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
 701                 0x00);
 702
 703        if ((vendorid & 0xffff) == 0x10de) {
 704                dbgp_printk("using nvidia set_debug_port\n");
 705                set_debug_port = nvidia_set_debug_port;
 706        }
 707}
 708
 709/* The code in early_ehci_bios_handoff() is derived from the usb pci
 710 * quirk initialization, but altered so as to use the early PCI
 711 * routines. */
 712#define EHCI_USBLEGSUP_BIOS     (1 << 16)       /* BIOS semaphore */
 713#define EHCI_USBLEGCTLSTS       4               /* legacy control/status */
 714static void __init early_ehci_bios_handoff(void)
 715{
 716        u32 hcc_params = readl(&ehci_caps->hcc_params);
 717        int offset = (hcc_params >> 8) & 0xff;
 718        u32 cap;
 719        int msec;
 720
 721        if (!offset)
 722                return;
 723
 724        cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
 725                              ehci_dev.func, offset);
 726        dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
 727
 728        if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
 729                dbgp_printk("dbgp: BIOS handoff\n");
 730                write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
 731                                      ehci_dev.func, offset + 3, 1);
 732        }
 733
 734        /* if boot firmware now owns EHCI, spin till it hands it over. */
 735        msec = 1000;
 736        while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
 737                mdelay(10);
 738                msec -= 10;
 739                cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
 740                                      ehci_dev.func, offset);
 741        }
 742
 743        if (cap & EHCI_USBLEGSUP_BIOS) {
 744                /* well, possibly buggy BIOS... try to shut it down,
 745                 * and hope nothing goes too wrong */
 746                dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
 747                write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
 748                                      ehci_dev.func, offset + 2, 0);
 749        }
 750
 751        /* just in case, always disable EHCI SMIs */
 752        write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
 753                              offset + EHCI_USBLEGCTLSTS, 0);
 754}
 755
 756static int __init ehci_setup(void)
 757{
 758        u32 ctrl, portsc, hcs_params;
 759        u32 debug_port, new_debug_port = 0, n_ports;
 760        int ret, i;
 761        int port_map_tried;
 762        int playtimes = 3;
 763
 764        early_ehci_bios_handoff();
 765
 766try_next_time:
 767        port_map_tried = 0;
 768
 769try_next_port:
 770
 771        hcs_params = readl(&ehci_caps->hcs_params);
 772        debug_port = HCS_DEBUG_PORT(hcs_params);
 773        dbgp_phys_port = debug_port;
 774        n_ports    = HCS_N_PORTS(hcs_params);
 775
 776        dbgp_printk("debug_port: %d\n", debug_port);
 777        dbgp_printk("n_ports:    %d\n", n_ports);
 778        dbgp_ehci_status("");
 779
 780        for (i = 1; i <= n_ports; i++) {
 781                portsc = readl(&ehci_regs->port_status[i-1]);
 782                dbgp_printk("portstatus%d: %08x\n", i, portsc);
 783        }
 784
 785        if (port_map_tried && (new_debug_port != debug_port)) {
 786                if (--playtimes) {
 787                        set_debug_port(new_debug_port);
 788                        goto try_next_time;
 789                }
 790                return -1;
 791        }
 792
 793        /* Only reset the controller if it is not already in the
 794         * configured state */
 795        if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
 796                if (dbgp_ehci_controller_reset() != 0)
 797                        return -1;
 798        } else {
 799                dbgp_ehci_status("ehci skip - already configured");
 800        }
 801
 802        ret = _dbgp_external_startup();
 803        if (ret == -EIO)
 804                goto next_debug_port;
 805
 806        if (ret < 0) {
 807                /* Things didn't work so remove my claim */
 808                ctrl = readl(&ehci_debug->control);
 809                ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
 810                writel(ctrl, &ehci_debug->control);
 811                return -1;
 812        }
 813        return 0;
 814
 815next_debug_port:
 816        port_map_tried |= (1<<(debug_port - 1));
 817        new_debug_port = ((debug_port-1+1)%n_ports) + 1;
 818        if (port_map_tried != ((1<<n_ports) - 1)) {
 819                set_debug_port(new_debug_port);
 820                goto try_next_port;
 821        }
 822        if (--playtimes) {
 823                set_debug_port(new_debug_port);
 824                goto try_next_time;
 825        }
 826
 827        return -1;
 828}
 829
 830int __init early_dbgp_init(char *s)
 831{
 832        u32 debug_port, bar, offset;
 833        u32 bus, slot, func, cap;
 834        void __iomem *ehci_bar;
 835        u32 dbgp_num;
 836        u32 bar_val;
 837        char *e;
 838        int ret;
 839        u8 byte;
 840
 841        if (!early_pci_allowed())
 842                return -1;
 843
 844        dbgp_num = 0;
 845        if (*s)
 846                dbgp_num = simple_strtoul(s, &e, 10);
 847        dbgp_printk("dbgp_num: %d\n", dbgp_num);
 848
 849        cap = find_dbgp(dbgp_num, &bus, &slot, &func);
 850        if (!cap)
 851                return -1;
 852
 853        dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
 854                         func);
 855
 856        debug_port = read_pci_config(bus, slot, func, cap);
 857        bar = (debug_port >> 29) & 0x7;
 858        bar = (bar * 4) + 0xc;
 859        offset = (debug_port >> 16) & 0xfff;
 860        dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
 861        if (bar != PCI_BASE_ADDRESS_0) {
 862                dbgp_printk("only debug ports on bar 1 handled.\n");
 863
 864                return -1;
 865        }
 866
 867        bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
 868        dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
 869        if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
 870                dbgp_printk("only simple 32bit mmio bars supported\n");
 871
 872                return -1;
 873        }
 874
 875        /* double check if the mem space is enabled */
 876        byte = read_pci_config_byte(bus, slot, func, 0x04);
 877        if (!(byte & 0x2)) {
 878                byte  |= 0x02;
 879                write_pci_config_byte(bus, slot, func, 0x04, byte);
 880                dbgp_printk("mmio for ehci enabled\n");
 881        }
 882
 883        /*
 884         * FIXME I don't have the bar size so just guess PAGE_SIZE is more
 885         * than enough.  1K is the biggest I have seen.
 886         */
 887        set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
 888        ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
 889        ehci_bar += bar_val & ~PAGE_MASK;
 890        dbgp_printk("ehci_bar: %p\n", ehci_bar);
 891
 892        ehci_caps  = ehci_bar;
 893        ehci_regs  = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase));
 894        ehci_debug = ehci_bar + offset;
 895        ehci_dev.bus = bus;
 896        ehci_dev.slot = slot;
 897        ehci_dev.func = func;
 898
 899        detect_set_debug_port();
 900
 901        ret = ehci_setup();
 902        if (ret < 0) {
 903                dbgp_printk("ehci_setup failed\n");
 904                ehci_debug = NULL;
 905
 906                return -1;
 907        }
 908        dbgp_ehci_status("early_init_complete");
 909
 910        return 0;
 911}
 912
 913static void early_dbgp_write(struct console *con, const char *str, u32 n)
 914{
 915        int chunk, ret;
 916        char buf[DBGP_MAX_PACKET];
 917        int use_cr = 0;
 918        u32 cmd, ctrl;
 919        int reset_run = 0;
 920
 921        if (!ehci_debug || dbgp_not_safe)
 922                return;
 923
 924        cmd = readl(&ehci_regs->command);
 925        if (unlikely(!(cmd & CMD_RUN))) {
 926                /* If the ehci controller is not in the run state do extended
 927                 * checks to see if the acpi or some other initialization also
 928                 * reset the ehci debug port */
 929                ctrl = readl(&ehci_debug->control);
 930                if (!(ctrl & DBGP_ENABLED)) {
 931                        dbgp_not_safe = 1;
 932                        _dbgp_external_startup();
 933                } else {
 934                        cmd |= CMD_RUN;
 935                        writel(cmd, &ehci_regs->command);
 936                        reset_run = 1;
 937                }
 938        }
 939        while (n > 0) {
 940                for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
 941                     str++, chunk++, n--) {
 942                        if (!use_cr && *str == '\n') {
 943                                use_cr = 1;
 944                                buf[chunk] = '\r';
 945                                str--;
 946                                n++;
 947                                continue;
 948                        }
 949                        if (use_cr)
 950                                use_cr = 0;
 951                        buf[chunk] = *str;
 952                }
 953                if (chunk > 0) {
 954                        ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
 955                                      dbgp_endpoint_out, buf, chunk);
 956                }
 957        }
 958        if (unlikely(reset_run)) {
 959                cmd = readl(&ehci_regs->command);
 960                cmd &= ~CMD_RUN;
 961                writel(cmd, &ehci_regs->command);
 962        }
 963}
 964
 965struct console early_dbgp_console = {
 966        .name =         "earlydbg",
 967        .write =        early_dbgp_write,
 968        .flags =        CON_PRINTBUFFER,
 969        .index =        -1,
 970};
 971
 972#if IS_ENABLED(CONFIG_USB)
 973int dbgp_reset_prep(struct usb_hcd *hcd)
 974{
 975        int ret = xen_dbgp_reset_prep(hcd);
 976        u32 ctrl;
 977
 978        if (ret)
 979                return ret;
 980
 981        dbgp_not_safe = 1;
 982        if (!ehci_debug)
 983                return 0;
 984
 985        if ((early_dbgp_console.index != -1 &&
 986             !(early_dbgp_console.flags & CON_BOOT)) ||
 987            dbgp_kgdb_mode)
 988                return 1;
 989        /* This means the console is not initialized, or should get
 990         * shutdown so as to allow for reuse of the usb device, which
 991         * means it is time to shutdown the usb debug port. */
 992        ctrl = readl(&ehci_debug->control);
 993        if (ctrl & DBGP_ENABLED) {
 994                ctrl &= ~(DBGP_CLAIM);
 995                writel(ctrl, &ehci_debug->control);
 996        }
 997        return 0;
 998}
 999EXPORT_SYMBOL_GPL(dbgp_reset_prep);
1000
1001int dbgp_external_startup(struct usb_hcd *hcd)
1002{
1003        return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup();
1004}
1005EXPORT_SYMBOL_GPL(dbgp_external_startup);
1006#endif /* USB */
1007
1008#ifdef CONFIG_KGDB
1009
1010static char kgdbdbgp_buf[DBGP_MAX_PACKET];
1011static int kgdbdbgp_buf_sz;
1012static int kgdbdbgp_buf_idx;
1013static int kgdbdbgp_loop_cnt = DBGP_LOOPS;
1014
1015static int kgdbdbgp_read_char(void)
1016{
1017        int ret;
1018
1019        if (kgdbdbgp_buf_idx < kgdbdbgp_buf_sz) {
1020                char ch = kgdbdbgp_buf[kgdbdbgp_buf_idx++];
1021                return ch;
1022        }
1023
1024        ret = dbgp_bulk_read(USB_DEBUG_DEVNUM, dbgp_endpoint_in,
1025                             &kgdbdbgp_buf, DBGP_MAX_PACKET,
1026                             kgdbdbgp_loop_cnt);
1027        if (ret <= 0)
1028                return NO_POLL_CHAR;
1029        kgdbdbgp_buf_sz = ret;
1030        kgdbdbgp_buf_idx = 1;
1031        return kgdbdbgp_buf[0];
1032}
1033
1034static void kgdbdbgp_write_char(u8 chr)
1035{
1036        early_dbgp_write(NULL, &chr, 1);
1037}
1038
1039static struct kgdb_io kgdbdbgp_io_ops = {
1040        .name = "kgdbdbgp",
1041        .read_char = kgdbdbgp_read_char,
1042        .write_char = kgdbdbgp_write_char,
1043};
1044
1045static int kgdbdbgp_wait_time;
1046
1047static int __init kgdbdbgp_parse_config(char *str)
1048{
1049        char *ptr;
1050
1051        if (!ehci_debug) {
1052                if (early_dbgp_init(str))
1053                        return -1;
1054        }
1055        ptr = strchr(str, ',');
1056        if (ptr) {
1057                ptr++;
1058                kgdbdbgp_wait_time = simple_strtoul(ptr, &ptr, 10);
1059        }
1060        kgdb_register_io_module(&kgdbdbgp_io_ops);
1061        kgdbdbgp_io_ops.is_console = early_dbgp_console.index != -1;
1062
1063        return 0;
1064}
1065early_param("kgdbdbgp", kgdbdbgp_parse_config);
1066
1067static int kgdbdbgp_reader_thread(void *ptr)
1068{
1069        int ret;
1070
1071        while (readl(&ehci_debug->control) & DBGP_ENABLED) {
1072                kgdbdbgp_loop_cnt = 1;
1073                ret = kgdbdbgp_read_char();
1074                kgdbdbgp_loop_cnt = DBGP_LOOPS;
1075                if (ret != NO_POLL_CHAR) {
1076                        if (ret == 0x3 || ret == '$') {
1077                                if (ret == '$')
1078                                        kgdbdbgp_buf_idx--;
1079                                kgdb_breakpoint();
1080                        }
1081                        continue;
1082                }
1083                schedule_timeout_interruptible(kgdbdbgp_wait_time * HZ);
1084        }
1085        return 0;
1086}
1087
1088static int __init kgdbdbgp_start_thread(void)
1089{
1090        if (dbgp_kgdb_mode && kgdbdbgp_wait_time)
1091                kthread_run(kgdbdbgp_reader_thread, NULL, "%s", "dbgp");
1092
1093        return 0;
1094}
1095device_initcall(kgdbdbgp_start_thread);
1096#endif /* CONFIG_KGDB */
1097